IS61LV5128 |
ISSI® |
512K x 8 HIGH-SPEED CMOS STATIC RAM
JULY 2001
FEATURES
•High-speed access times: 10, 12 and 15 ns
•High-performance, low-power CMOS process
•Multiple center power and ground pins for greater noise immunity
•Easy memory expansion with CE and OE options
•CE power-down
•Fully static operation: no clock or refresh required
•TTL compatible inputs and outputs
•Single 3.3V power supply
•Packages available:
–36-pin 400-mil SOJ
–36-pin miniBGA
–44-pin TSOP (Type II)
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION
The ISSI IS61LV5128 is a very high-speed, low power, 524,288-word by 8-bit CMOS static RAM. The IS61LV5128 is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices.
When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 µW (typical) with CMOS input levels.
The IS61LV5128 operates from a single 3.3V power supply and all inputs are TTL-compatible.
The IS61LV5128 is available in 36-pin 400-mil SOJ, 36pin mini BGA, and 44-pin TSOP (Type II) packages.
A0-A18 |
DECODER |
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512K X 8 |
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MEMORY ARRAY |
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VCC
GND
I/O
I/O0-I/O7 DATA COLUMN I/O
CIRCUIT
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CE |
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CONTROL |
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CIRCUIT |
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ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774 |
1 |
Rev. B
07/16/01
IS61LV5128 |
ISSI® |
PIN CONFIGURATION |
44-Pin TSOP (Type II) |
36 mini BGA |
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6 |
NC |
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44 |
NC |
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NC |
2 |
43 |
NC |
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A0 |
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42 |
NC |
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A1 |
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41 |
A18 |
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A2 |
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40 |
A17 |
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A |
A0 |
A1 |
NC |
A3 |
A6 |
A8 |
A3 |
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39 |
A16 |
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A4 |
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38 |
A15 |
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B |
I/O4 |
A2 |
WE |
A4 |
A7 |
I/O0 |
CE |
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37 |
OE |
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C |
I/O5 |
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NC |
A5 |
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I/O1 |
I/O0 |
9 |
36 |
I/O7 |
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I/O1 |
10 |
35 |
I/O6 |
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D |
GND |
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Vcc |
Vcc |
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34 |
GND |
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E |
Vcc |
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GND |
GND |
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33 |
Vcc |
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I/O2 |
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I/O5 |
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F |
I/O6 |
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A18 |
A17 |
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I/O2 |
I/O3 |
14 |
31 |
I/O4 |
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G |
I/O7 |
OE |
CE |
A16 |
A15 |
I/O3 |
WE |
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30 |
A14 |
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A5 |
16 |
29 |
A13 |
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H |
A9 |
A10 |
A11 |
A12 |
A13 |
A14 |
A6 |
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28 |
A12 |
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A7 |
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27 |
A11 |
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A8 |
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26 |
A10 |
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A9 |
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25 |
NC |
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NC |
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NC |
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NC |
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NC |
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PIN DESCRIPTIONS |
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36-Pin SOJ |
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A0-A18 |
Address Inputs |
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A0 |
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1 |
36 |
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NC |
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CE |
Chip Enable Input |
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35 |
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A18 |
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A1 |
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34 |
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A17 |
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OE |
Output Enable Input |
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A2 |
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3 |
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33 |
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A16 |
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A3 |
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4 |
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WE |
Write Enable Input |
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A4 |
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5 |
32 |
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A15 |
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I/O0-I/O7 |
Bidirectional Ports |
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6 |
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CE |
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OE |
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30 |
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I/O7 |
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I/O0 |
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7 |
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Vcc |
Power |
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I/O1 |
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I/O6 |
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GND |
Ground |
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28 |
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GND |
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Vcc |
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9 |
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27 |
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Vcc |
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NC |
No Connection |
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GND |
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I/O2 |
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11 |
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I/O5 |
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25 |
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I/O4 |
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I/O3 |
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13 |
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A14 |
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WE |
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TRUTH TABLE |
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A5 |
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14 |
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A13 |
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A6 |
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15 |
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A12 |
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Mode |
WE |
CE |
OE |
I/O Operation |
Vcc Current |
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A11 |
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A7 |
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A8 |
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A10 |
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Not Selected |
X |
H |
X |
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High-Z |
ISB1, ISB2 |
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A9 |
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18 |
19 |
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NC |
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(Power-down) |
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Output Disabled H |
L |
H |
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High-Z |
ICC |
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Read |
H |
L |
L |
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DOUT |
ICC |
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Write |
L |
L |
X |
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DIN |
ICC |
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2 |
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Integrated Silicon Solution, Inc. — 1-800-379-4774 |
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Rev. B |
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07/16/01 |
IS61LV5128 |
ISSI® |
ABSOLUTE MAXIMUM RATINGS(1)
Symbol |
Parameter |
Value |
Unit |
VTERM |
Terminal Voltage with Respect to GND |
–0.5 to Vcc + 0.5 |
V |
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TBIAS |
Temperature Under Bias |
–55 to +125 |
°C |
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TSTG |
Storage Temperature |
–65 to +150 |
°C |
PT |
Power Dissipation |
1.0 |
W |
Notes:
1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
OPERATING RANGE
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10 ns |
12 ns, 15 ns |
Range |
Ambient Temperature |
VCC |
VCC |
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Commercial |
0°C to +70°C |
3.3V +10%, -5% |
3.3V ± 10% |
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Industrial |
–40°C to +85°C |
3.3V +10%, -5% |
3.3V ± 10% |
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CAPACITANCE(1,2)
Symbol |
Parameter |
Conditions |
Max. |
Unit |
CIN |
Input Capacitance |
VIN = 0V |
6 |
pF |
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CI/O |
Input/Output Capacitance |
VOUT = 0V |
8 |
pF |
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Notes:
1.Tested initially and after any design or process changes that may affect these parameters.
2.Test conditions: TA = 25°C, f = 1 MHz, Vcc = 3.3V.
Integrated Silicon Solution, Inc. — 1-800-379-4774 |
3 |
Rev. B
07/16/01