ISSI IS61LV256-20TI, IS61LV256-20T, IS61LV256-20JI, IS61LV256-20J, IS61LV256-15T Datasheet

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IS61LV256

ISSI®

32K x 8 LOW VOLTAGE CMOS STATIC RAM

FEATURES

High-speed access times:

--8, 10, 12, 15, 20 ns

Automatic power-down when chip is deselected

CMOS low power operation

--345 mW (max.) operating

--7 mW (max.) CMOS standby

TTL compatible interface levels

Single 3.3V power supply

Fully static operation: no clock or refresh required

Three-state outputs

OCTOBER 1999

DESCRIPTION

The ISSI IS61LV256 is a very high-speed, low power, 32,768-word by 8-bit static RAM. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns maximum.

When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation is reduced to 50 µW (typical) with CMOS input levels.

Easy memory expansion is provided by using an active LOW Chip Enable (CE). The active LOW Write Enable (WE) controls both writing and reading of the memory.

The IS61LV256 is available in the JEDEC standard 28-pin, 300-mil SOJ and the 450-mil TSOP (Type I) package.

FUNCTIONAL BLOCK DIAGRAM

A0-A14

DECODER

 

256 X 1024

 

MEMORY ARRAY

 

 

 

 

 

 

 

VCC

GND

I/O

I/O0-I/O7 DATA COLUMN I/O

CIRCUIT

CE

CONTROL

OE CIRCUIT

WE

ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc.

Integrated Silicon Solution, Inc. — 1-800-379-4774

1

Rev. I

11/09/99

ISSI IS61LV256-20TI, IS61LV256-20T, IS61LV256-20JI, IS61LV256-20J, IS61LV256-15T Datasheet

IS61LV256

 

 

 

 

 

 

 

 

 

 

 

 

ISSI®

PIN CONFIGURATION

 

 

 

 

PIN CONFIGURATION

 

 

 

 

 

28-Pin SOJ

 

 

 

 

 

 

28-Pin TSOP (Type I)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A14

 

1

28

 

VCC

 

 

 

 

 

 

22

21

 

A10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OE

 

 

 

A12

 

2

27

 

WE

 

 

 

 

 

 

 

 

A11

 

23

20

 

 

 

 

 

 

 

26

 

A13

 

 

 

 

CE

 

A7

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

19

 

I/O7

 

 

 

25

 

A8

 

 

 

A9

24

 

A6

4

 

 

 

 

 

 

 

 

18

 

I/O6

A5

 

 

24

 

A9

 

 

 

A8

25

 

 

5

 

 

 

 

 

 

 

 

17

 

I/O5

A13

26

 

A4

 

 

23

 

A11

 

 

 

 

 

 

 

 

 

27

16

 

I/O4

 

6

 

 

 

WE

 

 

 

A3

 

 

22

 

 

 

 

 

VCC

 

28

15

 

I/O3

 

7

 

 

OE

 

 

 

 

 

 

 

21

 

A10

 

A14

 

1

14

 

GND

A2

8

 

 

 

 

 

 

A12

 

2

13

 

I/O2

 

 

 

 

 

 

 

 

 

 

 

A1

9

20

 

CE

 

 

 

A7

 

3

12

 

I/O1

 

 

 

19

 

I/O7

 

 

 

 

 

A0

10

 

 

 

 

A6

 

4

11

 

I/O0

I/O0

 

11

18

 

I/O6

 

 

 

 

 

 

 

 

 

 

A5

 

5

10

 

A0

 

 

 

 

I/O1

 

 

17

 

I/O5

 

 

 

 

 

 

12

 

 

 

 

A4

 

6

9

 

A1

 

 

 

 

 

 

 

 

I/O2

 

16

 

I/O4

 

 

 

A3

 

7

8

 

A2

 

13

 

 

 

 

 

 

GND

 

15

 

I/O3

 

 

 

 

 

 

 

 

 

 

 

 

 

14

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PIN DESCRIPTIONS

A0-A14

Address Inputs

 

 

CE

Chip Enable Input

 

 

OE

Output Enable Input

 

 

WE

Write Enable Input

 

 

I/O0-I/O7

Input/Output

 

 

Vcc

Power

 

 

GND

Ground

 

 

TRUTH TABLE

Mode

WE

CE

OE

I/O Operation

Vcc Current

 

 

 

 

 

 

Not Selected

X

H

X

High-Z

ISB1, ISB2

(Power-down)

 

 

 

 

 

Output Disabled

H

L

H

High-Z

ICC

 

 

 

 

 

 

Read

H

L

L

DOUT

ICC

 

 

 

 

 

 

Write

L

L

X

DIN

ICC

 

 

 

 

 

 

ABSOLUTE MAXIMUM RATINGS(1)

Symbol

Parameter

 

Value

Unit

VCC

Power Supply Voltage Relative to GND

 

–0.5 to +4.6

V

 

 

 

 

 

VTERM

Terminal Voltage with Respect to GND

 

–0.5 to +4.6

V

 

 

 

 

 

TBIAS

Temperature Under Bias

Com.

–10 to +85

°C

 

 

Ind.

–45 to +90

 

 

 

 

 

 

TSTG

Storage Temperature

 

–65 to +150

°C

 

 

 

 

 

PD

Power Dissipation

 

1

W

 

 

 

 

 

IOUT

DC Output Current

 

±20

mA

 

 

 

 

 

Notes:

1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

2 Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. I

11/09/99

 

IS61LV256

 

 

 

 

 

ISSI®

 

OPERATING RANGE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Range

 

Ambient Temperature

Speed

VCC

 

 

 

 

 

 

Commercial

0°C to +70°C

8, 10, 12

3.3V, +10%, –5%

 

 

 

 

 

 

 

 

 

15, 20

3.3V ± 10%

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Industrial

 

–40°C to +85°C

All

3.3V + 10%, –5%

 

 

 

 

 

 

 

 

 

DC ELECTRICAL CHARACTERISTICS (Over Operating Range)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

Parameter

Test Conditions

 

Min.

Max.

Unit

 

 

 

 

 

 

 

 

 

 

 

 

VOH

Output HIGH Voltage

VCC = Min., IOH = –2.0 mA

 

2.4

V

 

 

 

 

 

 

 

 

 

 

 

 

VOL

Output LOW Voltage

VCC = Min., IOL = 4.0 mA

 

0.4

V

 

 

 

 

 

 

 

 

 

 

 

 

 

VIH

Input HIGH Voltage

 

 

 

2.2

VCC + 0.3

V

 

 

 

 

 

 

 

 

 

 

 

 

 

VIL

Input LOW Voltage(1)

 

 

 

–0.3

0.8

V

 

 

 

 

 

 

 

 

 

 

 

 

 

ILI

Input Leakage

GND

VIN VCC

Com.

–1

1

µA

 

 

 

 

 

 

 

Ind.

–5

5

 

 

 

 

ILO

Output Leakage

GND

VOUT VCC, Outputs Disabled Com.

–1

1

µA

 

 

 

 

 

 

 

Ind.

–5

5

 

 

Notes:

1.VIL (min.) = –0.3V (DC); VIL (min.) = –2.0V (pulse width 2.0 ns).

VIH (max.) = VCC + 0.5V (DC); VIH (max.) = Vcc + 2.0V (pulse width 2.0 ns).

2.Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.

POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)

 

 

 

 

-8 ns(2)

-10 ns(2)

-12 ns

-15 ns

-20 ns

 

Sym.

Parameter

TestConditions

 

Min. Max.

Min. Max.

Min. Max.

Min. Max.

Min. Max.

Unit

ICC

VccDynamicOperating

VCC =Max.,CE= VIL

Com.

120

110

100

90

80

mA

 

SupplyCurrent

IOUT = 0 mA, f = fMAX

Ind.

120

110

100

90

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ISB1

TTLStandbyCurrent

VCC =Max.,

Com.

15

10

10

10

10

mA

 

(TTLInputs)

VIN =VIH orVIL

Ind.

20

20

20

20

 

 

 

CEVIH, f = 0

 

 

 

 

 

 

 

 

 

 

 

 

ISB2

CMOSStandby

VCC =Max.,

Com.

2

2

2

2

2

mA

 

Current(CMOSInputs)

CEVCC –0.2V,

Ind.

5

5

5

5

 

 

 

VIN >VCC –0.2V, or

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN 0.2V, f = 0

 

 

 

 

 

 

 

 

 

 

 

 

Notes:

1.At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

2.Shaded area = PREPRODUCTION AVAILABILITY.

CAPACITANCE(1,2)

Symbol

Parameter

Conditions

Max.

Unit

CIN

Input Capacitance

VIN = 0V

6

pF

 

 

 

 

 

COUT

Output Capacitance

VOUT = 0V

5

pF

 

 

 

 

 

Notes:

1.Tested initially and after any design or process changes that may affect these parameters.

2.Test conditions: TA = 25°C, f = 1 MHz, Vcc = 3.3V.

Integrated Silicon Solution, Inc. — 1-800-379-4774

3

Rev. I

11/09/99

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