ISSI IS61LV2568-8T, IS61LV2568-8KI, IS61LV2568-8K, IS61LV2568-15T, IS61LV2568-15KI Datasheet

IS61LV2568	ISSI®

256K x 8 HIGH-SPEED CMOS STATIC RAM

DECEMBER 2000

FEATURES

•High-speed access times: 8, 10, 12 and 15 ns

•High-performance, low-power CMOS process

•Multiple center power and ground pins for greater noise immunity

•Easy memory expansion with CE and OE options

•CE power-down

•Low power: 540 mW @ 10 ns 36 mW standby mode

•TTL compatible inputs and outputs

•Single 3.3V ±10% power supply

•Packages available:

–36-pin 400-mil SOJ

–44-pin TSOP (Type II)

DESCRIPTION

The ISSI IS61LV2568 is a very high-speed, low power, 262,144-word by 8-bit CMOS static RAM. The IS61LV2568 is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices.

When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 36mW (max.) with CMOS input levels.

The IS61LV2568 operates from a single 3.3V power supply and all inputs are TTL-compatible.

The IS61LV2568 is available in 36-pin 400-mil SOJ, and 44-pin TSOP (Type II) packages.

FUNCTIONAL BLOCK DIAGRAM

A0-A17	DECODER		256K X 8
			MEMORY ARRAY

VCC

GND

I/O

I/O0-I/O7 DATA COLUMN I/O

CIRCUIT

CE

CONTROL

OE

CIRCUIT

WE

ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.

Integrated Silicon Solution, Inc. — 1-800-379-4774

1

Rev. A

12/19/00

IS61LV2568																					ISSI®
PIN CONFIGURATION
36-Pin SOJ													44-Pin TSOP (Type II)
		A4					1	36			NC									44			NC
								35			A5				NC			1
		A3					2								NC				2	43			NC
		A2					3	34			A6					A4			3	42			NC
		A1					4	33			A7					A3			4	41			A5
		A0					5	32			A8					A2		5		40			A6
																				39			A7
																A1		6
							6	31
		CE									OE					A0			7	38			A8
																				37
I/O0							7	30			I/O7					CE			8				OE
I/O1							8	29			I/O6			I/O0					9	36			I/O7
								28			GND			I/O1					10	35			I/O6
	Vcc						9							Vcc					11	34			GND
								27			Vcc			GND						33			Vcc
GND							10												12
I/O2							11	26			I/O5			I/O2					13	32			I/O5
I/O3							12	25			I/O4			I/O3					14	31			I/O4
															WE				15	30			A9
							13	24			A9			A17					16	29			A10
	WE
A17							14	23			A10			A16					17	28			A11
A16							15	22			A11			A15					18	27			A12
								21			A12			A14					19	26			NC
A15							16							A13					20	25			NC
A14							17	20			NC				NC				21	24			NC
A13							18	19			NC				NC				22	23			NC

PIN DESCRIPTIONS

A0-A17	Address Inputs
CE	Chip Enable Input
OE	Output Enable Input
WE	Write Enable Input
I/O0-I/O7	Bidirectional Ports
Vcc	Power
GND	Ground
NC	No Connection

TRUTH TABLE

Mode	WE	CE	OE	I/O Operation	Vcc Current
Not Selected	X	H	X	High-Z	ISB1, ISB2
(Power-down)
Output Disabled H		L	H	High-Z	ICC
Read	H	L	L	DOUT	ICC
Write	L	L	X	DIN	ICC

ABSOLUTE MAXIMUM RATINGS(1)

Symbol	Parameter		Value	Unit
VCC	Supply voltage with Respect to GND		–0.5 to +4.6	V
VTERM	Terminal Voltage with Respect to GND		–0.5 to Vcc + 0.5	V
TBIAS	Temperature Under Bias	Com.	–10 to +85	°C
		Ind.	–45 to +90
TSTG	Storage Temperature		–65 to +150	°C
PD	Power Dissipation		1.0	W

Notes:

1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

2	Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. A

12/19/00

IS61LV2568									ISSI®
OPERATING RANGE
	Range		Ambient Temperature		VCC
	Commercial		0°C to +70°C		3.3V ± 10%
	Industrial		–40°C to +85°C		3.3V ± 10%
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
	Symbol	Parameter		Test Conditions				Min.	Max.	Unit
	VOH	Output HIGH Voltage		VCC = Min., IOH = –4.0 mA				2.4	—	V
	VOL	Output LOW Voltage		VCC = Min., IOL = 8.0 mA				—	0.4	V
	VIH	Input HIGH Voltage(1)						2.0	VCC + 0.3	V
	VIL	Input LOW Voltage(1)						–0.3	0.8	V
	ILI	Input Leakage		GND - VIN - VCC			Com.	–1	1	µA
							Ind.	–5	5
	ILO	Output Leakage		GND - VOUT - VCC, Outputs Disabled			Com.	–1	1	µA
							Ind.	–5	5

Note:

1.VIL(min) = –0.3V (DC); VIL(min) = –2.0V (pulse width - 2.0 ns).

VIH(max) = VCC + 0.3V (DC); VIH(max) = Vcc + 2.0V (pulse width - 2.0 ns).

POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)

				-8 ns		-10 ns		-12 ns		-15 ns
Symbol	Parameter	Test Conditions		Min. Max.		Min. Max.		Min. Max.		Min. Max.		Unit
ICC	Vcc Operating	VCC = Max., CE = VIL	Com.	—	150	—	125	—	110	—	90	mA
	Supply Current	IOUT = 0 mA, f = Max.	Ind.	—	160	—	135	—	120	—	100
ISB1	TTL Standby	VCC = Max.,	Com.	—	50	—	40	—	35	—	30	mA
	Current	VIN = VIH or VIL	Ind.	—	60	—	50	—	45	—	40
	(TTL Inputs)	CE • VIH, f = max
ISB2	CMOS Standby	VCC = Max.,	Com.	—	10	—	10	—	10	—	10	mA
	Current	CE - VCC – 0.2V,	Ind.	—	20	—	20	—	20	—	20
	(CMOS Inputs)	VIN > VCC – 0.2V, or
		VIN - 0.2V, f = 0

Note:

1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

CAPACITANCE(1,2)

Symbol	Parameter	Conditions	Max.	Unit
CIN	Input Capacitance	VIN = 0V	6	pF
CI/O	Input/Output Capacitance	VOUT = 0V	8	pF

Notes:

1.Tested initially and after any design or process changes that may affect these parameters.

2.Test conditions: TA = 25°C, f = 1 MHz, Vcc = 3.3V.

Integrated Silicon Solution, Inc. — 1-800-379-4774

3

Rev. A

12/19/00