IS61C64B |
ISSI® |
8K x 8 HIGH-SPEED CMOS STATIC RAM
JULY 2001
FEATURES
•High-speed access time: 10, 12, and 15 ns
•Automatic power-down when chip is deselected
•CMOS low power operation
—450 mW (typical) operating
—250 µW (typical) standby
•TTL compatible interface levels
•Single 5V power supply
•Fully static operation: no clock or refresh required
•Three state outputs
•One Chip Enables (CE) for increased speed
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION
The ISSI IS61C64B is a very high-speed, low power, 8192-word by 8-bit static RAM. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 10 ns with low power consumption.
When CEis HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 µW (typical) with CMOS input levels.
Easy memory expansion is provided by using one Chip Enable input, CE. The active LOW Write Enable (WE) controls both writing and reading of the memory.
The IS61C64B is packaged in the JEDEC standard 28-pin, 300-mil DIP and SOJ, and TSOP.
A0-A12 |
DECODER |
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256 X 256 |
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MEMORY ARRAY |
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VCC
GND
I/O
I/O0-I/O7 DATA COLUMN I/O
CIRCUIT
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CE |
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CONTROL |
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OE |
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CIRCUIT |
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WE |
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ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774 |
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Rev. C
07/17/01
IS61C64B |
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ISSI® |
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PIN CONFIGURATION |
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PIN CONFIGURATION |
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28-Pin DIP and SOJ |
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28-Pin TSOP (Type 1) |
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NC |
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1 |
28 |
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VCC |
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21 |
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A10 |
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A12 |
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2 |
27 |
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OE |
22 |
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WE |
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20 |
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A11 |
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CE |
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26 |
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* |
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A7 |
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3 |
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A9 |
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24 |
19 |
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I/O7 |
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A6 |
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4 |
25 |
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A8 |
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A8 |
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25 |
18 |
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I/O6 |
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A5 |
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5 |
24 |
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A9 |
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* |
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26 |
17 |
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I/O5 |
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27 |
16 |
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I/O4 |
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A4 |
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23 |
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A11 |
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WE |
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22 |
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VCC |
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28 |
15 |
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I/O3 |
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A3 |
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7 |
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OE |
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A2 |
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8 |
21 |
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A10 |
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NC |
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1 |
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GND |
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A12 |
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2 |
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I/O2 |
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A1 |
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20 |
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CE |
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A7 |
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3 |
12 |
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I/O1 |
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A0 |
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10 |
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I/O7 |
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I/O0 |
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11 |
18 |
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I/O6 |
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A6 |
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4 |
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I/O0 |
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I/O1 |
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12 |
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I/O5 |
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A5 |
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10 |
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A0 |
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A4 |
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A1 |
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16 |
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I/O2 |
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13 |
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I/O4 |
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A3 |
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7 |
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A2 |
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15 |
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GND |
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14 |
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I/O3 |
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PIN DESCRIPTIONS
A0-A12 |
Address Inputs |
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CE |
Chip Enable 1 Input |
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OE |
Output Enable Input |
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WE |
Write Enable Input |
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I/O0-I/O7 |
Input/Output |
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* |
Must be tied to either |
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Vcc or GND |
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Vcc |
Power |
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GND |
Ground |
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TRUTH TABLE
Mode |
WE |
CE |
OE |
I/O Operation |
Vcc Current |
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Not Selected |
X |
H |
X |
High-Z |
ISB1, ISB2 |
(Power-down) |
X |
X |
X |
High-Z |
ISB1, ISB2 |
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Output Disabled |
H |
L |
H |
High-Z |
ICC |
Read |
H |
L |
L |
DOUT |
ICC |
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Write |
L |
L |
X |
DIN |
ICC |
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OPERATING RANGE
Range |
Ambient Temperature |
Speed |
VCC |
Commercial |
0°C to +70°C |
10 ns |
5V ± 5% |
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12 ns |
5V ± 10% |
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15 ns |
5V ± 10% |
ABSOLUTE MAXIMUM RATINGS(1)
Symbol |
Parameter |
Value |
Unit |
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VTERM |
Terminal Voltage with Respect to GND |
–0.5 to |
+7.0 |
V |
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TBIAS |
Temperature Under Bias |
–10 to |
+85 |
°C |
TSTG |
Storage Temperature |
–65 to +150 |
°C |
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PT |
Power Dissipation |
1.0 |
W |
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IOUT |
DC Output Current (LOW) |
20 |
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mA |
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Notes:
1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2 Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. C
07/17/01
IS61C64B |
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ISSI® |
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DC ELECTRICAL CHARACTERISTICS (Over Operating Range) |
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Symbol |
Parameter |
Test Conditions |
Min. |
Max. |
Unit |
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VOH |
Output HIGH Voltage |
VCC = Min., IOH = –4.0 mA |
2.4 |
— |
V |
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VOL |
Output LOW Voltage |
VCC = Min., IOL = 8.0 mA |
— |
0.4 |
V |
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VIH |
Input HIGH Voltage |
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2.2 |
VCC + 0.5 |
V |
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VIL |
Input LOW Voltage(1) |
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–0.5 |
0.8 |
V |
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ILI |
Input Leakage |
GND - VIN - VCC |
–2 |
2 |
µA |
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ILO |
Output Leakage |
GND - VOUT - VCC, Outputs Disabled |
–2 |
2 |
µA |
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Notes:
1. VIL = –3.0V for pulse width less than 10 ns.
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
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-10ns |
-12ns |
-15ns |
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Symbol |
Parameter |
Test Conditions |
Min. |
Max. |
Min. Max. |
Min. |
Max. |
Unit |
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ICC |
Vcc Dynamic Operating |
VCC = Max., |
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185 |
— |
175 |
— |
135 |
mA |
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Supply Current |
IOUT = 0 mA, f = fMAX |
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ISB1 |
TTL Standby Current |
VCC = Max., |
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30 |
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30 |
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30 |
mA |
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(TTL Inputs) |
VIN = VIH or VIL |
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CE1 • VIH or |
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CE2 - VIL, f = 0 |
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ISB2 |
CMOS Standby |
VCC = Max., |
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10 |
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10 |
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10 |
mA |
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Current (CMOS Inputs) |
CE1 • VCC – 0.2V, |
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CE2 - 0.2V, |
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VIN • VCC – 0.2V, or
VIN - 0.2V, f = 0
Notes:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CAPACITANCE(1,2)
Symbol |
Parameter |
Conditions |
Max. |
Unit |
CIN |
Input Capacitance |
VIN = 0V |
8 |
pF |
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COUT |
Output Capacitance |
VOUT = 0V |
10 |
pF |
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Notes:
1.Tested initially and after any design or process changes that may affect these parameters.
2.Test conditions: TA = 25°C, f = 1 MHz, Vcc = 5.0V.
Integrated Silicon Solution, Inc. — 1-800-379-4774 |
3 |
Rev. C
07/17/01