IS61C256AH |
ISSI® |
32K x 8 HIGH-SPEED CMOS STATIC RAM
MAY 1999
FEATURES
•High-speed access time: 10, 12, 15, 20, 25 ns
•Low active power: 400 mW (typical)
•Low standby power
—250 W (typical) CMOS standby
—55 mW (typical) TTL standby
•Fully static operation: no clock or refresh required
•TTL compatible inputs and outputs
•Single 5V power supply
DESCRIPTION
The ISSI IS61C256AH is a very high-speed, low power, 32,768 word by 8-bit static RAMs. They are fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 10 ns maximum.
When CEis HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 W (typical) with CMOS input levels.
Easy memory expansion is provided by using an active LOW Chip Enable (CE) input and an active LOW Output Enable (OE) input. The active LOW Write Enable (WE) controls both writing and reading of the memory.
The IS61C256AH is pin compatible with other 32K x 8 SRAMs and are available in 28-pin PDIP, SOJ, and TSOP (Type I) packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A14 |
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32K X 8 |
DECODER |
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MEMORY ARRAY |
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VCC
GND
I/O
I/O0-I/O7 DATA COLUMN I/O
CIRCUIT
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CE |
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CONTROL |
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OE |
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CIRCUIT |
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WE |
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ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774 |
1 |
SR020-1O 05/24/99
IS61C256AH |
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ISSI® |
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PIN CONFIGURATION |
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PIN CONFIGURATION |
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28-Pin DIP and SOJ |
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28-Pin TSOP |
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A14 |
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1 |
28 |
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VCC |
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21 |
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A10 |
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A12 |
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27 |
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OE |
22 |
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2 |
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WE |
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A11 |
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23 |
20 |
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CE |
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A7 |
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3 |
26 |
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A13 |
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A9 |
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24 |
19 |
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I/O7 |
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25 |
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A8 |
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A8 |
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25 |
18 |
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I/O6 |
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A6 |
4 |
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17 |
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I/O5 |
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A13 |
26 |
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A5 |
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24 |
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A9 |
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5 |
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27 |
16 |
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I/O4 |
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WE |
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A4 |
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6 |
23 |
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A11 |
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VCC |
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28 |
15 |
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I/O3 |
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A14 |
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1 |
14 |
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GND |
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A3 |
7 |
22 |
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OE |
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A12 |
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2 |
13 |
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I/O2 |
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A2 |
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21 |
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A10 |
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8 |
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A7 |
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3 |
12 |
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I/O1 |
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A1 |
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20 |
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A6 |
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4 |
11 |
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I/O0 |
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9 |
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CE |
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19 |
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I/O7 |
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A5 |
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5 |
10 |
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A0 |
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A0 |
10 |
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A4 |
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9 |
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A1 |
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I/O0 |
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18 |
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I/O6 |
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11 |
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A3 |
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7 |
8 |
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A2 |
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I/O1 |
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17 |
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I/O5 |
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12 |
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I/O2 |
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16 |
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I/O4 |
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13 |
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GND |
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14 |
15 |
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I/O3 |
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PIN DESCRIPTIONS
A0-A14 |
Address Inputs |
CE |
Chip Enable Input |
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OE |
Output Enable Input |
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WE |
Write Enable Input |
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I/O0-I/O7 |
Bidirectional Ports |
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Vcc |
Power |
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GND |
Ground |
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TRUTH TABLE
Mode |
WE |
CE |
OE |
I/O Operation |
Vcc Current |
Not Selected |
X |
H |
X |
High-Z |
ISB1, ISB2 |
(Power-down) |
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Output Disabled H |
L |
H |
High-Z |
ICC |
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Read |
H |
L |
L |
DOUT |
ICC |
Write |
L |
L |
X |
DIN |
ICC |
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ABSOLUTE MAXIMUM RATINGS(1)
Symbol |
Parameter |
Value |
Unit |
VTERM |
Terminal Voltage with Respect to GND |
–0.5 to +7.0 |
V |
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TBIAS |
Temperature Under Bias |
–55 to +125 |
°C |
TSTG |
Storage Temperature |
–65 to +150 |
°C |
PT |
Power Dissipation |
1.5 |
W |
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IOUT |
DC Output Current (LOW) |
20 |
mA |
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Note:
1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2 |
Integrated Silicon Solution, Inc. — 1-800-379-4774 |
SR020-1O 05/24/99
IS61C256AH |
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ISSI® |
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OPERATING RANGE |
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Range |
Ambient Temperature |
Speed |
VCC |
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Commercial |
0°C to +70°C |
-10, -12 |
5V ± 5% |
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-15, -20, -25 |
5V ± 10% |
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Industrial |
–40°C to +85°C |
-12 |
5V ± 5% |
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-15, -20, -25 |
5V ± 10% |
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DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol |
Parameter |
Test Conditions |
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Min. |
Max. |
Unit |
VOH |
Output HIGH Voltage |
VCC = Min., IOH = –4.0 mA |
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2.4 |
— |
V |
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VOL |
Output LOW Voltage |
VCC = Min., IOL = 8.0 mA |
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0.4 |
V |
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VIH |
Input HIGH Voltage |
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2.2 |
VCC + 0.5 |
V |
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VIL |
Input LOW Voltage(1) |
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–0.5 |
0.8 |
V |
ILI |
Input Leakage |
GND ≤ VIN ≤ VCC |
Com. |
–5 |
5 |
A |
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Ind. |
–10 |
10 |
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ILO |
Output Leakage |
GND ≤ VOUT ≤ VCC, |
Com. |
–5 |
5 |
A |
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Outputs Disabled |
Ind. |
–10 |
10 |
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Note:
1. VIL = –3.0V for pulse width less than 10 ns.
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
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-10 |
-12 |
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-15 |
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-20 |
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-25 |
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Symbol |
Parameter |
Test Conditions |
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Min. |
Max. |
Min. |
Max. |
Min. |
Max. |
Min. |
Max. |
Min. |
Max. |
Unit |
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ICC |
Vcc Dynamic Operating |
VCC = Max., CE = VIL |
Com. |
— |
165 |
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155 |
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145 |
— |
135 |
— |
125 |
mA |
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Supply Current |
IOUT = 0 mA, f = fMAX |
Ind. |
— |
— |
— |
165 |
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155 |
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145 |
— |
135 |
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ISB1 |
TTL Standby Current |
VCC = Max., |
Com. |
— |
25 |
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25 |
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25 |
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25 |
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25 |
mA |
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(TTL Inputs) |
VIN = VIH or VIL |
Ind. |
— |
— |
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30 |
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30 |
— |
30 |
— |
30 |
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CE ≥ VIH, f = 0 |
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ISB2 |
CMOS Standby |
VCC = Max., |
Com. |
— |
2 |
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2 |
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2 |
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2 |
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2 |
mA |
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Current (CMOS Inputs) |
CE ≥ VCC – 0.2V, |
Ind. |
— |
— |
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10 |
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10 |
— |
10 |
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10 |
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VIN ≥ VCC – 0.2V, or |
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VIN ≤ 0.2V, f = 0 |
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Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CAPACITANCE(1,2)
Symbol |
Parameter |
Conditions |
Max. |
Unit |
CIN |
Input Capacitance |
VIN = 0V |
8 |
pF |
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COUT |
Output Capacitance |
VOUT = 0V |
10 |
pF |
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Notes:
1.Tested initially and after any design or process changes that may affect these parameters.
2.Test conditions: TA = 25°C, f = 1 MHz, Vcc = 5.0V.
Integrated Silicon Solution, Inc. — 1-800-379-4774 |
3 |
SR020-1O 05/24/99