iRobot ALT240ROB Chipset Datasheet

Download

Page 1

CC2541

www.ti.com

SWRS110D –JANUARY 2012–REVISED JUNE 2013

2.4-GHz Bluetooth™ low energy and Proprietary System-on-Chip

Check for Samples: CC2541

FEATURES

• RF – High-Performance and Low-Power 8051 – 2.4-GHz Bluetooth low energy Compliant

and Proprietary RF System-on-Chip – In-System-Programmable Flash, 128- or

– Supports 250-kbps, 500-kbps, 1-Mbps, 2-

Mbps Data Rates – 8-KB RAM With Retention in All Power

– Excellent Link Budget, Enabling Long-

Range Applications Without External Front – Hardware Debug Support

End – Programmable Output Power up to 0 dBm Auto-Acknowledgment and Address – Excellent Receiver Sensitivity (–94 dBm at

1 Mbps), Selectivity, and Blocking – Retention of All Relevant Registers in All

Performance Power Modes – Suitable for Systems Targeting Compliance • Peripherals

With Worldwide Radio Frequency

Regulations: ETSI EN 300 328 and EN 300

440 Class 2 (Europe), FCC CFR47 Part 15

(US), and ARIB STD-T66 (Japan)

• Layout – Few External Components – Reference Design Provided – 6-mm × 6-mm QFN-40 Package – Pin-Compatible With CC2540 (When Not

Using USB or I2C)

• Low Power – Active-Mode RX Down to: 17.9 mA – Active-Mode TX (0 dBm): 18.2 mA – Power Mode 1 (4-µs Wake-Up): 270 µA – Power Mode 2 (Sleep Timer On): 1 µA – Power Mode 3 (External Interrupts): 0.5 µA – Wide Supply-Voltage Range (2 V–3.6 V)

• TPS62730 Compatible Low Power in Active Mode

– RX Down to: 14.7 mA (3-V supply) – TX (0 dBm): 14.3 mA (3-V supply)

White space White space White space White space White space White space

• Microcontroller

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2Bluetooth is a trademark of Bluetooth SIG, Inc.. 3ZigBee is a registered trademark of ZigBee Alliance.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Microcontroller Core With Code Prefetch

256-KB

Modes

– Extensive Baseband Automation, Including

Decoding

– Powerful Five-Channel DMA – General-Purpose Timers (One 16-Bit, Two

8-Bit) – IR Generation Circuitry – 32-kHz Sleep Timer With Capture – Accurate Digital RSSI Support – Battery Monitor and Temperature Sensor – 12-Bit ADC With Eight Channels and

Configurable Resolution – AES Security Coprocessor – Two Powerful USARTs With Support for

Several Serial Protocols – 23 General-Purpose I/O Pins

(21 × 4 mA, 2 × 20 mA) – I2C interface – 2 I/O Pins Have LED Driving Capabilities – Watchdog Timer – Integrated High-Performance Comparator

• Development Tools – CC2541 Evaluation Module Kit

(CC2541EMK)

– CC2541 Mini Development Kit (CC2541DK-

MINI) – SmartRF™ Software – IAR Embedded Workbench™ Available

Page 2

CC2541

SWRS110D –JANUARY 2012–REVISED JUNE 2013

www.ti.com

SOFTWARE FEATURES CC2541 WITH TPS62730

• Bluetooth v4.0 Compliant Protocol Stack for • TPS62730 is a 2-MHz Step-Down Converter Single-Mode BLE Solution With Bypass Mode

– Complete Power-Optimized Stack, • Extends Battery Lifetime by up to 20%

Including Controller and Host – GAP – Central, Peripheral, Observer, or

Broadcaster (Including Combination

Roles) – ATT / GATT – Client and Server – SMP – AES-128 Encryption and

Decryption – L2CAP

– Sample Applications and Profiles

– Generic Applications for GAP Central

and Peripheral Roles – Proximity, Accelerometer, Simple Keys,

and Battery GATT Services – More Applications Supported in BLE

Software Stack

– Multiple Configuration Options

– Single-Chip Configuration, Allowing

Applications to Run on CC2541 – Network Processor Interface for

Applications Running on an External

Microcontroller

– BTool – Windows PC Application for

Evaluation, Development, and Test

APPLICATIONS

• 2.4-GHz Bluetooth low energy Systems

• Proprietary 2.4-GHz Systems

• Human-Interface Devices (Keyboard, Mouse, Remote Control)

• Sports and Leisure Equipment

• Mobile Phone Accessories

• Consumer Electronics

• Reduced Current in All Active Modes

• 30-nA Bypass Mode Current to Support LowPower Modes

• RF Performance Unchanged

• Small Package Allows for Small Solution Size

• CC2541 Controllable

DESCRIPTION

The CC2541 is a power-optimized true system-onchip (SoC) solution for both Bluetooth low energy and proprietary 2.4-GHz applications. It enables robust network nodes to be built with low total bill-of-material costs. The CC2541 combines the excellent performance of a leading RF transceiver with an industry-standard enhanced 8051 MCU, in-system programmable flash memory, 8-KB RAM, and many other powerful supporting features and peripherals. The CC2541 is highly suited for systems where ultralow power consumption is required. This is specified by various operating modes. Short transition times between operating modes further enable low power consumption.

The CC2541 is pin-compatible with the CC2540 in the 6-mm × 6-mm QFN40 package, if the USB is not used on the CC2540 and the I2C/extra I/O is not used on the CC2541. Compared to the CC2540, the CC2541 provides lower RF current consumption. The CC2541 does not have the USB interface of the CC2540, and provides lower maximum output power in TX mode. The CC2541 also adds a HW I2C interface.

The CC2541 is pin-compatible with the CC2533 RF4CE-optimized IEEE 802.15.4 SoC.

The CC2541 comes in two different versions: CC2541F128/F256, with 128 KB and 256 KB of flash memory, respectively.

For the CC2541 block diagram, see Figure 1.

Product Folder Links: CC2541

Page 3

SFR bus SFR bus

MEMORY

ARBITRATOR

8051 CPU

CORE

DMA

FLASH

SRAM

FLASH CTRL

DEBUG

INTERFACE

RESET

RESET_N

P2_4

P2_3

P2_2

P2_1

P2_0

P1_4

P1_3

P1_2

P1_1

P1_0

P1_7

P1_6

P1_5

P0_4

P0_3

P0_2

P0_1

P0_0

P0_7

P0_6

P0_5

32.768-kHz

CRYSTAL OSC

32-MHZ

CRYSTAL OSC

HIGH SPEED

RC-OSC

32-kHz

RC-OSC

CLOCK MUX and

CALIBRATION

RAM

USART 0

USART 1

TIMER 1 (16-Bit)

TIMER 3 (8-bit)

TIMER 2

(BLE LL TIMER)

TIMER 4 (8-bit)

AES

ENCRYPTION

and

DECRYPTION

WATCHDOG TIMER

IRQ

CTRL

FLASH

UNIFIED

RF_P RF_N

SYNTH

MODULATOR

POWER-ON RESET

BROWN OUT

RADIO

REGISTERS

POWER MGT. CONTROLLER

SLEEP TIMER

PDATA

XRAM

IRAM

SFR

XOSC_Q2

XOSC_Q1

DS ADC

AUDIO / DC

DIGITAL

ANALOG

MIXED

VDD (2 V–3.6 V)

DCOUPL

ON-CHIP VOLTAGE

REGULATOR

Link Layer Engine

FREQUENCY

SYNTHESIZER

I2C

DEMODULATOR

RECEIVE TRANSMIT

OP-

ANALOG COMPARATOR

I/O CONTROLLER

1-KB SRAM

Radio Arbiter

FIFOCTRL

SDA

SCL

CC2541

www.ti.com

SWRS110D –JANUARY 2012–REVISED JUNE 2013

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

Figure 1. Block Diagram

Product Folder Links: CC2541

Page 4

CC2541

SWRS110D –JANUARY 2012–REVISED JUNE 2013

ABSOLUTE MAXIMUM RATINGS

(1)

www.ti.com

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

Supply voltage All supply pins must have the same voltage –0.3 3.9 V Voltage on any digital pin –0.3 VDD + 0.3 ≤ 3.9 V Input RF level 10 dBm Storage temperature range –40 125 °C

All pins, excluding pins 25 and 26, according to human-body model, JEDEC STD 22, method A114

(2)

ESD

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) CAUTION: ESD sesnsitive device. Precautions should be used when handling the device in order to prevent permanent damage.

All pins, according to human-body model, JEDEC STD 22, method A114

According to charged-device model, JEDEC STD 22, method C101

2 kV

1 kV

500 V

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN NOM MAX UNIT

Operating ambient temperature range, T Operating supply voltage 2 3.6 V

–40 85 °C

ELECTRICAL CHARACTERISTICS

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V,

1 Mbps, GFSK, 250-kHz deviation, Bluetooth low energy mode, and 0.1% BER

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

RX mode, standard mode, no peripherals active, low MCU activity

RX mode, high-gain mode, no peripherals active, low MCU activity

TX mode, –20 dBm output power, no peripherals active, low MCU activity

TX mode, 0 dBm output power, no peripherals active, low MCU activity

Core current consumption

core

Peripheral current consumption (Adds to core current I

peri

peripheral unit activated)

core

for each

Power mode 1. Digital regulator on; 16-MHz RCOSC and 32MHz crystal oscillator off; 32.768-kHz XOSC, POR, BOD and 270 sleep timer active; RAM and register retention

Power mode 2. Digital regulator off; 16-MHz RCOSC and 32MHz crystal oscillator off; 32.768-kHz XOSC, POR, and sleep 1 timer active; RAM and register retention

Power mode 3. Digital regulator off; no clocks; POR active; RAM and register retention

Low MCU activity: 32-MHz XOSC running. No radio or peripherals. Limited flash access, no RAM access.

Timer 1. Timer running, 32-MHz XOSC used 90 Timer 2. Timer running, 32-MHz XOSC used 90 Timer 3. Timer running, 32-MHz XOSC used 60 μA Timer 4. Timer running, 32-MHz XOSC used 70 Sleep timer, including 32.753-kHz RCOSC 0.6 ADC, when converting 1.2 mA

17.9

20.2 mA

16.8

18.2

µA

0.5

6.7 mA

Product Folder Links: CC2541

Page 5

CC2541

www.ti.com

SWRS110D –JANUARY 2012–REVISED JUNE 2013

GENERAL CHARACTERISTICS

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

WAKE-UP AND TIMING

Power mode 1 → Active 4 μs

Power mode 2 or 3 → Active 120 μs

Active → TX or RX

RX/TX turnaround μs

RADIO PART

RF frequency range Programmable in 1-MHz steps 2379 2496 MHz

Data rate and modulation format 1 Mbps, GFSK, 160-kHz deviation

Digital regulator on, 16-MHz RCOSC and 32-MHz crystal oscillator off. Start-up of 16-MHz RCOSC

Digital regulator off, 16-MHz RCOSC and 32-MHz crystal oscillator off. Start-up of regulator and 16-MHz RCOSC

Crystal ESR = 16 Ω. Initially running on 16-MHz RCOSC, with 32-MHz XOSC OFF

With 32-MHz XOSC initially on 180 μs Proprietary auto mode 130 BLE mode 150

2 Mbps, GFSK, 500-kHz deviation 2 Mbps, GFSK, 320-kHz deviation 1 Mbps, GFSK, 250-kHz deviation

500 kbps, MSK 250 kbps, GFSK, 160-kHz deviation 250 kbps, MSK

500 μs

RF RECEIVE SECTION

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C, VDD = 3 V, fc= 2440 MHz

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

2 Mbps, GFSK, 500-kHz Deviation, 0.1% BER

Receiver sensitivity –90 dBm Saturation BER < 0.1% –1 dBm Co-channel rejection Wanted signal at –67 dBm –9 dB

±2 MHz offset, 0.1% BER, wanted signal –67 dBm –2

In-band blocking rejection ±4 MHz offset, 0.1% BER, wanted signal –67 dBm 36 dB

±6 MHz or greater offset, 0.1% BER, wanted signal –67 dBm 41 Including both initial tolerance and drift. Sensitivity better than –67dBm,

Frequency error tolerance Symbol rate error Maximum packet length. Sensitivity better than–67dBm, 250 byte

tolerance

2 Mbps, GFSK, 320-kHz Deviation, 0.1% BER

Receiver sensitivity –86 dBm Saturation BER < 0.1% –7 dBm Co-channel rejection Wanted signal at –67 dBm –12 dB

In-band blocking rejection ±4 MHz offset, 0.1% BER, wanted signal –67 dBm 34 dB

Frequency error tolerance Symbol rate error Maximum packet length. Sensitivity better than –67 dBm, 250 byte

tolerance

(1) Difference between center frequency of the received RF signal and local oscillator frequency (2) Difference between incoming symbol rate and the internally generated symbol rate

(2)

(1)

250 byte payload. BER 0.1%

payload. BER 0.1%

±2 MHz offset, 0.1% BER, wanted signal –67 dBm –1

±6 MHz or greater offset, 0.1% BER, wanted signal –67 dBm 39 Including both initial tolerance and drift. Sensitivity better than –67 dBm,

(1)

250 byte payload. BER 0.1%

payload. BER 0.1%

–300 300 kHz

–120 120 ppm

–300 300 kHz

–120 120 ppm

Product Folder Links: CC2541

Page 6

CC2541

SWRS110D –JANUARY 2012–REVISED JUNE 2013

www.ti.com

RF RECEIVE SECTION (continued)

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C, VDD = 3 V, fc= 2440 MHz

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

1 Mbps, GFSK, 250-kHz Deviation, Bluetooth low energy Mode, 0.1% BER

Receiver sensitivity

Saturation

(4)

Co-channel rejection

(3)(4)

(4)

In-band blocking rejection

Out-of-band blocking rejection

Intermodulation

(4)

Frequency error tolerance Symbol rate error Maximum packet length. Sensitivity better than –67 dBm, 250 byte

tolerance

(6)

1 Mbps, GFSK, 160-kHz Deviation, 0.1% BER

Receiver sensitivity

(7)

Saturation BER < 0.1% 0 dBm Co-channel rejection Wanted signal 10 dB above sensitivity level –9 dB

In-band blocking rejection dB

Frequency error tolerance Symbol rate error Maximum packet length. Sensitivity better than –67 dBm, 250-byte

tolerance

(6)

500 kbps, MSK, 0.1% BER

Receiver sensitivity

(7)

Saturation BER < 0.1% 0 dBm Co-channel rejection Wanted signal –67 dBm –5 dB

In-band blocking rejection ±2-MHz offset, 0.1% BER, wanted signal –67 dBm 27 dB

Frequency error tolerance –150 150 kHz

Symbol rate error tolerance –80 80 ppm

(3) The receiver sensitivity setting is programmable using a TI BLE stack vendor-specific API command. The default value is standard

mode. (4) Results based on standard-gain mode. (5) Difference between center frequency of the received RF signal and local oscillator frequency (6) Difference between incoming symbol rate and the internally generated symbol rate (7) Results based on high-gain mode.

High-gain mode –94 Standard mode –88 BER < 0.1% 5 dBm Wanted signal –67 dBm –6 dB ±1 MHz offset, 0.1% BER, wanted signal –67 dBm –2 ±2 MHz offset, 0.1% BER, wanted signal –67 dBm 26

(4)

±3 MHz offset, 0.1% BER, wanted signal –67 dBm 34 >6 MHz offset, 0.1% BER, wanted signal –67 dBm 33 Minimum interferer level < 2 GHz (Wanted signal –67 dBm) –21 Minimum interferer level [2 GHz, 3 GHz] (Wanted signal –67 dBm) –25 dBm Minimum interferer level > 3 GHz (Wanted signal –67 dBm) –7 Minimum interferer level –36 dBm Including both initial tolerance and drift. Sensitivity better than -67dBm,

(5)

250 byte payload. BER 0.1%

payload. BER 0.1%

–250 250 kHz

–80 80 ppm

–91 dBm

±1-MHz offset, 0.1% BER, wanted signal –67 dBm 2 ±2-MHz offset, 0.1% BER, wanted signal –67 dBm 24 ±3-MHz offset, 0.1% BER, wanted signal -–67 dBm 27 >6-MHz offset, 0.1% BER, wanted signal –67 dBm 32 Including both initial tolerance and drift. Sensitivity better than –67 dBm,

(5)

250-byte payload. BER 0.1%

payload. BER 0.1%

–200 200 kHz

–80 80 ppm

–99 dBm

±1-MHz offset, 0.1% BER, wanted signal –67 dBm 20

>2-MHz offset, 0.1% BER, wanted signal –67 dBm 28 Including both initial tolerance and drift. Sensitivity better than –67 dBm,

250-byte payload. BER 0.1% Maximum packet length. Sensitivity better than –67 dBm, 250-byte

payload. BER 0.1%

dBm

Product Folder Links: CC2541

Page 7

CC2541

www.ti.com

SWRS110D –JANUARY 2012–REVISED JUNE 2013

RF RECEIVE SECTION (continued)

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C, VDD = 3 V, fc= 2440 MHz

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

250 kbps, GFSK, 160 kHz Deviation, 0.1% BER

Receiver sensitivity Saturation BER < 0.1% 0 dBm Co-channel rejection Wanted signal -67 dBm –3 dB

In-band blocking rejection ±2-MHz offset, 0.1% BER, wanted signal –67 dBm 28 dB

Frequency error tolerance Symbol rate error Maximum packet length. Sensitivity better than –67 dBm, 250-byte

tolerance

(10)

250 kbps, MSK, 0.1% BER

Receiver sensitivity Saturation BER < 0.1% 0 dBm Co-channel rejection Wanted signal -67 dBm –5 dB

In-band blocking rejection ±2-MHz offset, 0.1% BER, wanted signal –67 dBm 29 dB

Frequency error tolerance –150 150 kHz

Symbol rate error tolerance –80 80 ppm

ALL RATES/FORMATS

Spurious emission in RX. Conducted measurement

(8) Results based on standard-gain mode. (9) Difference between center frequency of the received RF signal and local oscillator frequency (10) Difference between incoming symbol rate and the internally generated symbol rate (11) Results based on high-gain mode.

(8)

(11)

–98 dBm

±1-MHz offset, 0.1% BER, wanted signal –67 dBm 23

>2-MHz offset, 0.1% BER, wanted signal –67 dBm 29 Including both initial tolerance and drift. Sensitivity better than –67 dBm,

(9)

250-byte payload. BER 0.1%

payload. BER 0.1%

–150 150 kHz

–80 80 ppm

–99 dBm

±1-MHz offset, 0.1% BER, wanted signal –67 dBm 20

>2-MHz offset, 0.1% BER, wanted signal –67 dBm 30 Including both initial tolerance and drift. Sensitivity better than –67 dBm,

250-byte payload. BER 0.1% Maximum packet length. Sensitivity better than –67 dBm, 250-byte

payload. BER 0.1%

f < 1 GHz –67 dBm

f > 1 GHz –57 dBm

Product Folder Links: CC2541

Page 8

CC2541

SWRS110D –JANUARY 2012–REVISED JUNE 2013

www.ti.com

RF TRANSMIT SECTION

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C, VDD = 3 V and fc= 2440 MHz

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Delivered to a single-ended 50-Ω load through a balun using

Output power dBm

Programmable output power Delivered to a single-ended 50-Ω load through a balun using 23 dB range minimum recommended output power setting

Spurious emission conducted f > 1 GHz –48 dBm measurement

Optimum load impedance 70 +j30 Ω

maximum recommended output power setting Delivered to a single-ended 50-Ω load through a balun using

minimum recommended output power setting

f < 1 GHz –52 dBm

Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan)

Differential impedance as seen from the RF port (RF_P and RF_N) toward the antenna

–23

Designs with antenna connectors that require conducted ETSI compliance at 64 MHz should insert an LC resonator in front of the antenna connector. Use a 1.6-nH inductor in parallel with a 1.8-pF capacitor. Connect both from the signal trace to a good RF ground.

CURRENT CONSUMPTION WITH TPS62730

Measured on Texas Instruments CC2541 TPA62730 EM reference design with TA= 25°C, VDD = 3 V and fc= 2440 MHz,

1 Mbsp, GFSK, 250-kHz deviation, Bluetooth™ low energy Mode, 1% BER

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

RX mode, standard mode, no peripherals active, low MCU activity, MCU at 1 MHz

RX mode, high-gain mode, no peripherals active, low MCU activity,

Current consumption mA

(1) 0.1% BER maps to 30.8% PER

MCU at 1 MHz TX mode, –20 dBm output power, no peripherals active, low MCU activity, 13.1

MCU at 1 MHz TX mode, 0 dBm output power, no peripherals active, low MCU activity,

MCU at 1 MHz

(1)

14.7

16.7

14.3

32-MHz CRYSTAL OSCILLATOR

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Crystal frequency 32 MHz Crystal frequency accuracy

requirement ESR Equivalent series resistance 6 60 Ω C

Crystal shunt capacitance 1 7 pF

Crystal load capacitance 10 16 pF

Start-up time 0.25 ms

Power-down guard time 3 ms

(1) Including aging and temperature dependency, as specified by [1]

(1)

The crystal oscillator must be in power down for a guard time before it is used again. This requirement is valid for all modes of operation. The need for power-down guard time can vary with crystal type and load.

Product Folder Links: CC2541

–40 40 ppm

Page 9

CC2541

www.ti.com

SWRS110D –JANUARY 2012–REVISED JUNE 2013

32.768-kHz CRYSTAL OSCILLATOR

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Crystal frequency 32.768 kHz

Crystal frequency accuracy requirement ESR Equivalent series resistance 40 130 kΩ C

Crystal shunt capacitance 0.9 2 pF

Crystal load capacitance 12 16 pF

Start-up time 0.4 s

(1) Including aging and temperature dependency, as specified by [1]

(1)

–40 40 ppm

32-kHz RC OSCILLATOR

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Calibrated frequency Frequency accuracy after calibration ±0.2% Temperature coefficient Supply-voltage coefficient Calibration time

(1) The calibrated 32-kHz RC oscillator frequency is the 32-MHz XTAL frequency divided by 977. (2) Frequency drift when temperature changes after calibration (3) Frequency drift when supply voltage changes after calibration (4) When the 32-kHz RC oscillator is enabled, it is calibrated when a switch from the 16-MHz RC oscillator to the 32-MHz crystal oscillator

is performed while SLEEPCMD.OSC32K_CALDIS is set to 0.

(1)

(2)

(3)

(4)

32.753 kHz

0.4 %/°C 3 %/V 2 ms

16-MHz RC OSCILLATOR

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Frequency Uncalibrated frequency accuracy ±18% Calibrated frequency accuracy ±0.6% Start-up time 10 μs Initial calibration time

(1) The calibrated 16-MHz RC oscillator frequency is the 32-MHz XTAL frequency divided by 2. (2) When the 16-MHz RC oscillator is enabled, it is calibrated when a switch from the 16-MHz RC oscillator to the 32-MHz crystal oscillator

(1)

(2)

is performed while SLEEPCMD.OSC_PD is set to 0.

16 MHz

50 μs

Product Folder Links: CC2541

Page 10

CC2541

SWRS110D –JANUARY 2012–REVISED JUNE 2013

www.ti.com

RSSI CHARACTERISTICS

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

2 Mbps, GFSK, 320-kHz Deviation, 0.1% BER and 2 Mbps, GFSK, 500-kHz Deviation, 0.1% BER

Useful RSSI range

RSSI offset

Absolute uncalibrated accuracy Step size (LSB value) 1 dB

All Other Rates/Formats

Useful RSSI range

RSSI offset

Absolute uncalibrated accuracy Step size (LSB value) 1 dB

(1) Assuming CC2541 EM reference design. Other RF designs give an offset from the reported value.

(1)

Reduced gain by AGC algorithm 64 High gain by AGC algorithm 64 Reduced gain by AGC algorithm 79 High gain by AGC algorithm 99

±6 dB

Standard mode 64 High-gain mode 64 Standard mode 98 High-gain mode 107

±3 dB

dBm

FREQUENCY SYNTHESIZER CHARACTERISTICS

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C, VDD = 3 V and fc= 2440 MHz

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

At ±1-MHz offset from carrier –109

Phase noise, unmodulated carrier At ±3-MHz offset from carrier –112 dBc/Hz

At ±5-MHz offset from carrier –119

ANALOG TEMPERATURE SENSOR

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Output 1480 12-bit Temperature coefficient 4.5 / 1°C Voltage coefficient 1 0.1 V Initial accuracy without calibration ±10 °C Accuracy using 1-point calibration ±5 °C Current consumption when enabled 0.5 mA

Measured using integrated ADC, internal band-gap voltage reference, and maximum resolution

COMPARATOR CHARACTERISTICS

TA= 25°C, VDD = 3 V. All measurement results are obtained using the CC2541 reference designs, post-calibration.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Common-mode maximum voltage VDD V Common-mode minimum voltage –0.3 Input offset voltage 1 mV Offset vs temperature 16 µV/°C Offset vs operating voltage 4 mV/V Supply current 230 nA Hysteresis 0.15 mV

Product Folder Links: CC2541

Page 11

CC2541

www.ti.com

SWRS110D –JANUARY 2012–REVISED JUNE 2013

ADC CHARACTERISTICS

TA= 25°C and VDD = 3 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Input voltage VDD is voltage on AVDD5 pin 0 VDD V External reference voltage VDD is voltage on AVDD5 pin 0 VDD V External reference voltage differential VDD is voltage on AVDD5 pin 0 VDD V Input resistance, signal Simulated using 4-MHz clock speed 197 kΩ Full-scale signal

(1)

ENOB

Effective number of bits bits

Useful power bandwidth 7-bit setting, both single and differential 0–20 kHz

THD Total harmonic distortion dB

Signal to nonharmonic ratio dB

CMRR Common-mode rejection ratio >84 dB

Crosstalk >84 dB Offset Midscale –3 mV

Gain error 0.68%

DNL Differential nonlinearity LSB

INL Integral nonlinearity LSB

SINAD (–THD+N)

Signal-to-noise-and-distortion dB

Conversion time μs

(1)

Peak-to-peak, defines 0 dBFS 2.97 V Single-ended input, 7-bit setting 5.7 Single-ended input, 9-bit setting 7.5 Single-ended input, 10-bit setting 9.3 Single-ended input, 12-bit setting 10.3 Differential input, 7-bit setting 6.5 Differential input, 9-bit setting 8.3 Differential input, 10-bit setting 10 Differential input, 12-bit setting 11.5 10-bit setting, clocked by RCOSC 9.7 12-bit setting, clocked by RCOSC 10.9

Single ended input, 12-bit setting, –6 dBFS Differential input, 12-bit setting, –6 dBFS Single-ended input, 12-bit setting Differential input, 12-bit setting

(1)

Single-ended input, 12-bit setting, –6 dBFS Differential input, 12-bit setting, –6 dBFS

(1)

–75.2 –86.6

70.2

79.3

(1)

78.8

88.9

Differential input, 12-bit setting, 1-kHz sine (0 dBFS), limited by ADC resolution

Single ended input, 12-bit setting, 1-kHz sine (0 dBFS), limited by ADC resolution

12-bit setting, mean 12-bit setting, maximum 12-bit setting, mean 12-bit setting, maximum

(1)

0.05

0.9

4.6

13.3 12-bit setting, mean, clocked by RCOSC 10 12-bit setting, max, clocked by RCOSC 29 Single ended input, 7-bit setting Single ended input, 9-bit setting Single ended input, 10-bit setting Single ended input, 12-bit setting Differential input, 7-bit setting Differential input, 9-bit setting Differential input, 10-bit setting Differential input, 12-bit setting

(1) (1)

(1)

(1) (1) (1)

(1) (1)

35.4

46.8

57.5

66.6

40.7

51.6

61.8

70.8 7-bit setting 20 9-bit setting 36 10-bit setting 68 12-bit setting 132

(1) Measured with 300-Hz sine-wave input and VDD as reference.

Product Folder Links: CC2541

Page 12

RESET_N

Px.n

T0299-01

1 2

CC2541

SWRS110D –JANUARY 2012–REVISED JUNE 2013

www.ti.com

ADC CHARACTERISTICS (continued)

TA= 25°C and VDD = 3 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Power consumption 1.2 mA Internal reference VDD coefficient 4 mV/V Internal reference temperature

coefficient Internal reference voltage 1.24 V

0.4 mV/10°C

CONTROL INPUT AC CHARACTERISTICS

TA= –40°C to 85°C, VDD = 2 V to 3.6 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

System clock, f t

SYSCLK

RESET_N low duration 1 µs

Interrupt pulse duration 20 ns

= 1/ f

SYSCLK

The undivided system clock is 32 MHz when crystal oscillator is used. The undivided system clock is 16 MHz when calibrated 16-MHz RC 16 32 MHz oscillator is used.

See item 1, Figure 2. This is the shortest pulse that is recognized as a complete reset pin request. Note that shorter pulses may be recognized but do not lead to complete reset of all modules within the chip.

See item 2, Figure 2.This is the shortest pulse that is recognized as an interrupt request.

Figure 2. Control Input AC Characteristics

Product Folder Links: CC2541

Page 13

SCK

SSN

MOSI

MISO

T0478-01

CC2541

www.ti.com

SWRS110D –JANUARY 2012–REVISED JUNE 2013

SPI AC CHARACTERISTICS

TA= –40°C to 85°C, VDD = 2 V to 3.6 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

SCK period ns

SCK duty cycle Master 50%

SSN low to SCK ns

SCK to SSN high ns

MOSI early out Master, load = 10 pF 7 ns

MOSI late out Master, load = 10 pF 10 ns

MISO setup Master 90 ns

MISO hold Master 10 ns

SCK duty cycle Slave 50% ns

MOSI setup Slave 35 ns

MOSI hold Slave 10 ns

MISO late out Slave, load = 10 pF 95 ns

Operating frequency MHz

Master, RX and TX 250 Slave, RX and TX 250

Master 63 Slave 63 Master 63 Slave 63

Master, TX only 8 Master, RX and TX 4 Slave, RX only 8 Slave, RX and TX 4

Figure 3. SPI Master AC Characteristics

Product Folder Links: CC2541

Page 14

Time

DEBUG_CLK

P2_2

1/f

clk_dbg

T0436-01

T0479-01

SCK

SSN

MOSI

MISO

CC2541

SWRS110D –JANUARY 2012–REVISED JUNE 2013

Figure 4. SPI Slave AC Characteristics

DEBUG INTERFACE AC CHARACTERISTICS

TA= –40°C to 85°C, VDD = 2 V to 3.6 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

clk_dbg

Debug clock frequency (see Figure 5) 12 MHz Allowed high pulse on clock (see Figure 5) 35 ns Allowed low pulse on clock (see Figure 5) 35 ns EXT_RESET_N low to first falling edge on debug clock (see

Figure 7)

Falling edge on clock to EXT_RESET_N high (see Figure 7) 83 ns EXT_RESET_N high to first debug command (see Figure 7) 83 ns Debug data setup (see Figure 6) 2 ns Debug data hold (see Figure 6) 4 ns Clock-to-data delay (see Figure 6) Load = 10 pF 30 ns

www.ti.com

167 ns

Figure 5. Debug Clock – Basic Timing

Product Folder Links: CC2541

Page 15

Time

DEBUG_CLK

P2_2

DEBUG_DATA

(to CC2541)

P2_1

DEBUG_DATA

(from CC2541)

P2_1

RESET_N

Time

DEBUG_CLK

P2_2

T0437-01

CC2541

www.ti.com

SWRS110D –JANUARY 2012–REVISED JUNE 2013

Figure 6. Debug Enable Timing

Figure 7. Data Setup and Hold Timing

TIMER INPUTS AC CHARACTERISTICS

TA= –40°C to 85°C, VDD = 2 V to 3.6 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Synchronizers determine the shortest input pulse that can be

Input capture pulse duration recognized. The synchronizers operate at the current system 1.5 t

clock rate (16 MHz or 32 MHz).

Product Folder Links: CC2541

SYSCLK

Page 16

CC2541

RHA Package

(Top View)

P0_1

RESET_N

P2_3 / OSC32K_Q2

AVDD6

R_BIAS

P0_2

P0_0

AVDD4

P0_3

AVDD1

P0_4

AVDD2

P0_5

RF_N

P0_6

RF_P

P0_7

AVDD3

XOSC_Q1

P1_0

XOSC_Q2

AVDD5

P2_2

P2_4 / OSC32K_Q1

SCL

P2_1

SDA

P2_0

GND

P1_7

P1_5

P1_6

P1_4

DVDD1

P1_3

P1_1

DCOUPL

P1_2

DVDD2

256 24

18 20

33 31

34 32

GND

Ground Pad

CC2541

SWRS110D –JANUARY 2012–REVISED JUNE 2013

www.ti.com

DC CHARACTERISTICS

TA= 25°C, VDD = 3 V

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Logic-0 input voltage 0.5 V Logic-1 input voltage 2.4 V Logic-0 input current Input equals 0 V –50 50 nA Logic-1 input current Input equals VDD –50 50 nA I/O-pin pullup and pulldown resistors 20 kΩ Logic-0 output voltage, 4- mA pins Output load 4 mA 0.5 V Logic-1 output voltage, 4-mA pins Output load 4 mA 2.5 V Logic-0 output voltage, 20- mA pins Output load 20 mA 0.5 V Logic-1 output voltage, 20-mA pins Output load 20 mA 2.5 V

DEVICE INFORMATION

PIN DESCRIPTIONS

The CC2541 pinout is shown in Figure 8 and a short description of the pins follows.

NOTE: The exposed ground pad must be connected to a solid ground plane, as this is the ground connection for the chip.

Figure 8. Pinout Top View

Product Folder Links: CC2541

Page 17

CC2541

www.ti.com

SWRS110D –JANUARY 2012–REVISED JUNE 2013

PIN DESCRIPTIONS

PIN NAME PIN PIN TYPE DESCRIPTION

AVDD1 28 Power (analog) 2-V–3.6-V analog power-supply connection AVDD2 27 Power (analog) 2-V–3.6-V analog power-supply connection AVDD3 24 Power (analog) 2-V–3.6-V analog power-supply connection AVDD4 29 Power (analog) 2-V–3.6-V analog power-supply connection AVDD5 21 Power (analog) 2-V–3.6-V analog power-supply connection AVDD6 31 Power (analog) 2-V–3.6-V analog power-supply connection DCOUPL 40 Power (digital) 1.8-V digital power-supply decoupling. Do not use for supplying external circuits. DVDD1 39 Power (digital) 2-V–3.6-V digital power-supply connection DVDD2 10 Power (digital) 2-V–3.6-V digital power-supply connection GND 1 Ground pin Connect to GND GND — Ground The ground pad must be connected to a solid ground plane. NC 4 Unused pins Not connected P0_0 19 Digital I/O Port 0.0 P0_1 18 Digital I/O Port 0.1 P0_2 17 Digital I/O Port 0.2 P0_3 16 Digital I/O Port 0.3 P0_4 15 Digital I/O Port 0.4 P0_5 14 Digital I/O Port 0.5 P0_6 13 Digital I/O Port 0.6 P0_7 12 Digital I/O Port 0.7 P1_0 11 Digital I/O Port 1.0 – 20-mA drive capability P1_1 9 Digital I/O Port 1.1 – 20-mA drive capability P1_2 8 Digital I/O Port 1.2 P1_3 7 Digital I/O Port 1.3 P1_4 6 Digital I/O Port 1.4 P1_5 5 Digital I/O Port 1.5 P1_6 38 Digital I/O Port 1.6 P1_7 37 Digital I/O Port 1.7 P2_0 36 Digital I/O Port 2.0 P2_1/DD 35 Digital I/O Port 2.1 / debug data P2_2/DC 34 Digital I/O Port 2.2 / debug clock P2_3/ 33 Digital I/O, Analog I/O Port 2.3/32.768 kHz XOSC

OSC32K_Q2 P2_4/ 32 Digital I/O, Analog I/O Port 2.4/32.768 kHz XOSC

OSC32K_Q1 RBIAS 30 Analog I/O External precision bias resistor for reference current RESET_N 20 Digital input Reset, active-low RF_N 26 RF I/O Negative RF input signal to LNA during RX

RF_P 25 RF I/O Positive RF input signal to LNA during RX

SCL 2 I2C clock or digital I/O Can be used as I2C clock pin or digital I/O. Leave floating if not used. If grounded

SDA 3 I2C clock or digital I/O Can be used as I2C data pin or digital I/O. Leave floating if not used. If grounded

XOSC_Q1 22 Analog I/O 32-MHz crystal oscillator pin 1 or external clock input XOSC_Q2 23 Analog I/O 32-MHz crystal oscillator pin 2

Negative RF output signal from PA during TX

Positive RF output signal from PA during TX

disable pull up

Product Folder Links: CC2541

Page 18

SFR bus SFR bus

MEMORY

ARBITRATOR

8051 CPU

CORE

DMA

FLASH

SRAM

FLASH CTRL

DEBUG

INTERFACE

RESET

RESET_N

P2_4

P2_3

P2_2

P2_1

P2_0

P1_4

P1_3

P1_2

P1_1

P1_0

P1_7

P1_6

P1_5

P0_4

P0_3

P0_2

P0_1

P0_0

P0_7

P0_6

P0_5

32.768-kHz

CRYSTAL OSC

32-MHZ

CRYSTAL OSC

HIGH SPEED

RC-OSC

32-kHz

RC-OSC

CLOCK MUX and

CALIBRATION

RAM

USART 0

USART 1

TIMER 1 (16-Bit)

TIMER 3 (8-bit)

TIMER 2

(BLE LL TIMER)

TIMER 4 (8-bit)

AES

ENCRYPTION

and

DECRYPTION

WATCHDOG TIMER

IRQ

CTRL

FLASH

UNIFIED

RF_P RF_N

SYNTH

MODULATOR

POWER-ON RESET

BROWN OUT

RADIO

REGISTERS

POWER MGT. CONTROLLER

SLEEP TIMER

PDATA

XRAM

IRAM

SFR

XOSC_Q2

XOSC_Q1

DS ADC

AUDIO / DC

DIGITAL

ANALOG

MIXED

VDD (2 V–3.6 V)

DCOUPL

ON-CHIP VOLTAGE

REGULATOR

Link Layer Engine

FREQUENCY

SYNTHESIZER

I2C

DEMODULATOR

RECEIVE TRANSMIT

OP-

ANALOG COMPARATOR

I/O CONTROLLER

1-KB SRAM

Radio Arbiter

FIFOCTRL

SDA

SCL

CC2541

SWRS110D –JANUARY 2012–REVISED JUNE 2013

www.ti.com

BLOCK DIAGRAM

A block diagram of the CC2541 is shown in Figure 9. The modules can be roughly divided into one of three categories: CPU-related modules; modules related to power, test, and clock distribution; and radio-related modules. In the following subsections, a short description of each module is given.

Figure 9. CC2541 Block Diagram

Product Folder Links: CC2541

Page 19

CC2541

www.ti.com

SWRS110D –JANUARY 2012–REVISED JUNE 2013

BLOCK DESCRIPTIONS

CPU and Memory

The 8051 CPU core is a single-cycle 8051-compatible core. It has three different memory access busses (SFR, DATA, and CODE/XDATA), a debug interface, and an 18-input extended interrupt unit.

The memory arbiter is at the heart of the system, as it connects the CPU and DMA controller with the physical memories and all peripherals through the SFR bus. The memory arbiter has four memory-access points, access of which can map to one of three physical memories: an SRAM, flash memory, and XREG/SFR registers. It is responsible for performing arbitration and sequencing between simultaneous memory accesses to the same physical memory.

The SFR bus is drawn conceptually in Figure 9 as a common bus that connects all hardware peripherals to the memory arbiter. The SFR bus in the block diagram also provides access to the radio registers in the radio register bank, even though these are indeed mapped into XDATA memory space.

The 8-KB SRAM maps to the DATA memory space and to parts of the XDATA memory spaces. The SRAM is an ultralow-power SRAM that retains its contents even when the digital part is powered off (power mode 2 and mode 3).

The 128/256 KB flash block provides in-circuit programmable non-volatile program memory for the device, and maps into the CODE and XDATA memory spaces.

Peripherals

Writing to the flash block is performed through a flash controller that allows page-wise erasure and 4-bytewise programming. See User Guide for details on the flash controller.

A versatile five-channel DMA controller is available in the system, accesses memory using the XDATA memory space, and thus has access to all physical memories. Each channel (trigger, priority, transfer mode, addressing mode, source and destination pointers, and transfer count) is configured with DMA descriptors that can be located anywhere in memory. Many of the hardware peripherals (AES core, flash controller, USARTs, timers, ADC interface, etc.) can be used with the DMA controller for efficient operation by performing data transfers between a single SFR or XREG address and flash/SRAM.

Each CC2541 contains a unique 48-bit IEEE address that can be used as the public device address for a Bluetooth device. Designers are free to use this address, or provide their own, as described in the Bluetooth specfication.

The interrupt controller services a total of 18 interrupt sources, divided into six interrupt groups, each of which is associated with one of four interrupt priorities. I/O and sleep timer interrupt requests are serviced even if the device is in a sleep mode (power modes 1 and 2) by bringing the CC2541 back to the active mode.

The debug interface implements a proprietary two-wire serial interface that is used for in-circuit debugging. Through this debug interface, it is possible to erase or program the entire flash memory, control which oscillators are enabled, stop and start execution of the user program, execute instructions on the 8051 core, set code breakpoints, and single-step through instructions in the code. Using these techniques, it is possible to perform incircuit debugging and external flash programming elegantly.

The I/O controller is responsible for all general-purpose I/O pins. The CPU can configure whether peripheral modules control certain pins or whether they are under software control, and if so, whether each pin is configured as an input or output and if a pullup or pulldown resistor in the pad is connected. Each peripheral that connects to the I/O pins can choose between two different I/O pin locations to ensure flexibility in various applications.

The sleep timer is an ultralow-power timer that can either use an external 32.768-kHz crystal oscillator or an internal 32.753-kHz RC oscillator. The sleep timer runs continuously in all operating modes except power mode

3. Typical applications of this timer are as a real-time counter or as a wake-up timer to get out of power mode 1 or mode 2.

A built-in watchdog timer allows the CC2541 to reset itself if the firmware hangs. When enabled by software, the watchdog timer must be cleared periodically; otherwise, it resets the device when it times out.

Product Folder Links: CC2541

Page 20

CC2541

SWRS110D –JANUARY 2012–REVISED JUNE 2013

www.ti.com

Timer 1 is a 16-bit timer with timer/counter/PWM functionality. It has a programmable prescaler, a 16-bit period

value, and five individually programmable counter/capture channels, each with a 16-bit compare value. Each of the counter/capture channels can be used as a PWM output or to capture the timing of edges on input signals. It can also be configured in IR generation mode, where it counts timer 3 periods and the output is ANDed with the output of timer 3 to generate modulated consumer IR signals with minimal CPU interaction.

Timer 2 is a 40-bit timer. It has a 16-bit counter with a configurable timer period and a 24-bit overflow counter that can be used to keep track of the number of periods that have transpired. A 40-bit capture register is also used to record the exact time at which a start-of-frame delimiter is received/transmitted or the exact time at which transmission ends. There are two 16-bit output compare registers and two 24-bit overflow compare registers that can be used to give exact timing for start of RX or TX to the radio or general interrupts.

Timer 3 and timer 4 are 8-bit timers with timer/counter/PWM functionality. They have a programmable prescaler, an 8-bit period value, and one programmable counter channel with an 8-bit compare value. Each of the counter channels can be used as PWM output.

USART 0 and USART 1 are each configurable as either an SPI master/slave or a UART. They provide double buffering on both RX and TX and hardware flow control and are thus well suited to high-throughput full-duplex applications. Each USART has its own high-precision baud-rate generator, thus leaving the ordinary timers free for other uses. When configured as SPI slaves, the USARTs sample the input signal using SCK directly instead of using some oversampling scheme, and are thus well-suited for high data rates.

The AES encryption/decryption core allows the user to encrypt and decrypt data using the AES algorithm with 128-bit keys. The AES core also supports ECB, CBC, CFB, OFB, CTR, and CBC-MAC, as well as hardware support for CCM.

The ADC supports 7 to 12 bits of resolution with a corresponding range of bandwidths from 30-kHz to 4-kHz, respectively. DC and audio conversions with up to eight input channels (I/O controller pins) are possible. The inputs can be selected as single-ended or differential. The reference voltage can be internal, AVDD, or a singleended or differential external signal. The ADC also has a temperature-sensor input channel. The ADC can automate the process of periodic sampling or conversion over a sequence of channels.

The I2C module provides a digital peripheral connection with two pins and supports both master and slave operation. I2C support is compliant with the NXP I2C specification version 2.1 and supports standard mode (up to 100 kbps) and fast mode (up to 400 kbps). In addition, 7-bit device addressing modes are supported, as well as master and slave modes.

The ultralow-power analog comparator enables applications to wake up from PM2 or PM3 based on an analog signal. Both inputs are brought out to pins; the reference voltage must be provided externally. The comparator output is connected to the I/O controller interrupt detector and can be treated by the MCU as a regular I/O pin interrupt.

Product Folder Links: CC2541

Page 21

16.5

17.5

18.5

19.5

2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6

Voltage (V)

Current (mA)

1 Mbps GFSK 250 kHz Standard Gain Setting Input = −70 dBm TA = 25°C

G005

16.5

17.5

18.5

19.5

2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6

Voltage (V)

Current (mA)

TX Power Setting = 0 dBm TA = 25°C

G006

−92

−90

−88

−86

−84

−40 −20 0 20 40 60 80 Temperature (°C)

Level (dBm)

1 Mbps GFSK 250 kHz Standard Gain Setting VCC = 3 V

G003

−4.0

−2.0

0.0

2.0

4.0

−40 −20 0 20 40 60 80 Temperature (°C)

Level (dBm)

TX Power Setting = 0 dBm VCC = 3 V

G004

16.5

17.5

18.5

−40 −20 0 20 40 60 80 Temperature (°C)

Current (mA)

1 Mbps GFSK 250 kHz Standard Gain Setting Input = −70 dBm VCC = 3 V

G001

17.5

18.5

19.5

−40 −20 0 20 40 60 80 Temperature (°C)

Current (mA)

TX Power Setting = 0 dBm VCC = 3 V

G002

CC2541

www.ti.com

SWRS110D –JANUARY 2012–REVISED JUNE 2013

TYPICAL CHARACTERISTICS

RX CURRENT TX CURRENT

vs vs

TEMPERATURE TEMPERATURE

Figure 10. Figure 11.

RX SENSITIVITY TX POWER

vs vs

TEMPERATURE TEMPERATURE

Figure 12. Figure 13.

RX CURRENT TX CURRENT

SUPPLY VOLTAGE SUPPLY VOLTAGE

Figure 14. Figure 15.

vs vs

Product Folder Links: CC2541

Page 22

−92

−90

−88

−86

−84

2400 2410 2420 2430 2440 2450 2460 2470 2480

Frequency (MHz)

Level (dBm)

1 Mbps GFSK 250 kHz Standard Gain Setting TA = 25°C VCC = 3 V

G009

−4

−2

2400 2410 2420 2430 2440 2450 2460 2470 2480

Frequency (MHz)

Level (dBm)

TX Power Setting = 0 dBm TA = 25°C VCC = 3 V

G010

−92

−90

−88

−86

−84

2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6

Voltage (V)

Level (dBm)

1 Mbps GFSK 250 kHz Standard Gain Setting TA = 25°C

G007

−4

−2

2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6

Voltage (V)

Level (dBm)

TX Power Setting = 0 dBm TA = 25°C

G008

CC2541

SWRS110D –JANUARY 2012–REVISED JUNE 2013

TYPICAL CHARACTERISTICS (continued)

RX SENSITIVITY TX POWER

SUPPLY VOLTAGE SUPPLY VOLTAGE

vs vs

Figure 16. Figure 17.

RX SENSITIVITY TX POWER

vs vs

FREQUENCY FREQUENCY

www.ti.com

Figure 18. Figure 19.

TXPOWER Setting Typical Output Power (dBm)

0xE1 0 0xD1 –2 0xC1 –4 0xB1 –6 0xA1 –8 0x91 –10 0x81 –12 0x71 –14 0x61 –16 0x51 –18

(1) Measured on Texas Instruments CC2541 EM reference design with TA= 25°C, VDD = 3 V and fc= 2440 MHz. See SWRU191 for

0x41 –20 0x31 –23

recommended register settings.

(2) 1 Mbsp, GFSK, 250-kHz deviation, Bluetooth™ low energy mode, 1% BER

Table 1. Output Power

Product Folder Links: CC2541

(1)(2)

Page 23

Current Consumption RX SG

CLKCONMOD 0xBF

Current (mA)

Current Savings (%)

2.1 2.4 2.7 3 3.3 3.6 Supply (V)

DC/DC OFF DC/DC ON Current Savings

Current Consumption TX 0 dBm

2.1 2.4 2.7 3 3.3 3.6 Supply (V)

Current (mA)

Current Savings (%)

DC/DC OFF DC/DC ON Current Savings

CC2541

www.ti.com

Table 2. Output Power and Current Consumption

Typical Output Power (dBm)

0 18.2 14.3

–20 16.8 13.1

(1) Measured on Texas Instruments CC2541 EM reference design with TA= 25°C, VDD = 3 V and fc=

2440 MHz. See SWRU191 for recommended register settings.

(2) Measured on Texas Instruments CC2541 TPS62730 EM reference design with TA= 25°C, VDD = 3 V

and fc= 2440 MHz. See SWRU191 for recommended register settings.

Typical Current Consumption Typical Current Consumption

(mA)

(1)

TYPICAL CURRENT SAVINGS WHEN USING TPS62730

SWRS110D –JANUARY 2012–REVISED JUNE 2013

With TPS62730 (mA)

(2)

Figure 20. Current Savings in TX at Room Figure 21. Current Savings in RX at Room

Temperature Temperature

The application note (SWRA365) has information regarding the CC2541 and TPS62730 combo board and the current savings that can be achieved using the combo board.

Product Folder Links: CC2541

Page 24

GND SCL SDA NC P1_5

DVDD2

P1_1

P1_2

P1_3

P1_4

2-V to 3.6-V Power Supply

R301

XTAL1

C221

C231

XTAL2

C321

C331

C401

32-kHz Crystal

(1)

CC2541

DIE ATTACH PAD

RBIAS AVDD4 AVDD1 AVDD2

RF_N

AVDD5

XOSC_Q1

XOSC_Q2

AVDD3

RF_P

P1_0

P0_7

P0_6

P0_5

P0_4

RESET_N

P0_0

P0_1

P0_2

P0_3

DCOUPL

DVDD1

P1_6

P1_7

P2_0

AVDD6

P2_4/XOSC32K_Q1

P2_3/XOSC32K_Q2

P2_2

P2_1

Antenna

(50 )W

1 2 3 4 5 6 7 8 9

Power Supply Decoupling Capacitors are Not Shown Digital I/O Not Connected

CC2541

SWRS110D –JANUARY 2012–REVISED JUNE 2013

www.ti.com

APPLICATION INFORMATION

Few external components are required for the operation of the CC2541. A typical application circuit is shown in

Figure 22.

Component Description Value

Input/Output Matching

When using an unbalanced antenna such as a monopole, a balun should be used to optimize performance. The balun can be implemented using low-cost discrete inductors and capacitors. See reference design, CC2541EM, for recommended balun.

(1) 32-kHz crystal is mandatory when running the BLE protocol stack in low-power modes, except if the link layer is in the standby state (Vol. 6 Part B Section 1.1 in [1]).

NOTE: Different antenna alternatives will be provided as reference designs.

Figure 22. CC2541 Application Circuit

Table 3. Overview of External Components (Excluding Supply Decoupling Capacitors)

C401 Decoupling capacitor for the internal 1.8-V digital voltage regulator 1 µF R301 Precision resistor ±1%, used for internal biasing 56 kΩ

Product Folder Links: CC2541

Page 25

L parasitic

321 331

C C

1 1

C C

= +

L parasitic

221 231

C C

1 1

C C

= +

CC2541

www.ti.com

SWRS110D –JANUARY 2012–REVISED JUNE 2013

Crystal

An external 32-MHz crystal, XTAL1, with two loading capacitors (C221 and C231) is used for the 32-MHz crystal oscillator. See 32-MHz CRYSTAL OSCILLATOR for details. The load capacitance seen by the 32-MHz crystal is given by:

(1)

XTAL2 is an optional 32.768-kHz crystal, with two loading capacitors (C321 and C331) used for the 32.768-kHz crystal oscillator. The 32.768-kHz crystal oscillator is used in applications where both very low sleep-current consumption and accurate wake-up times are needed. The load capacitance seen by the 32.768-kHz crystal is given by:

(2)

A series resistor may be used to comply with the ESR requirement.

On-Chip 1.8-V Voltage Regulator Decoupling

The 1.8-V on-chip voltage regulator supplies the 1.8-V digital logic. This regulator requires a decoupling capacitor (C401) for stable operation.

Power-Supply Decoupling and Filtering

Proper power-supply decoupling must be used for optimum performance. The placement and size of the decoupling capacitors and the power supply filtering are very important to achieve the best performance in an application. TI provides a compact reference design that should be followed very closely.

References

1. Bluetooth® Core Technical Specification document, version 4.0

http://www.bluetooth.com/SiteCollectionDocuments/Core_V40.zip

2. CC253x System-on-Chip Solution for 2.4-GHz IEEE 802.15.4 and ZigBee®Applications/CC2541 System-onChip Solution for 2.4-GHz Bluetooth low energy Applications (SWRU191)

3. Current Savings in CC254x Using the TPS62730 (SWRA365).

Additional Information

Texas Instruments offers a wide selection of cost-effective, low-power RF solutions for proprietary and standardbased wireless applications for use in industrial and consumer applications. Our selection includes RF transceivers, RF transmitters, RF front ends, and System-on-Chips as well as various software solutions for the sub-1- and 2.4-GHz frequency bands.

In addition, Texas Instruments provides a large selection of support collateral such as development tools, technical documentation, reference designs, application expertise, customer support, third-party and university programs.

The Low-Power RF E2E Online Community provides technical support forums, videos and blogs, and the chance to interact with fellow engineers from all over the world.

With a broad selection of product solutions, end application possibilities, and a range of technical support, Texas Instruments offers the broadest low-power RF portfolio. We make RF easy!

The following subsections point to where to find more information.

Product Folder Links: CC2541

Page 26

CC2541

SWRS110D –JANUARY 2012–REVISED JUNE 2013

www.ti.com

Texas Instruments Low-Power RF Web Site

• Forums, videos, and blogs

• RF design help

• E2E interaction Join us today at www.ti.com/lprf-forum.

Texas Instruments Low-Power RF Developer Network

Texas Instruments has launched an extensive network of low-power RF development partners to help customers speed up their application development. The network consists of recommended companies, RF consultants, and independent design houses that provide a series of hardware module products and design services, including:

• RF circuit, low-power RF, and ZigBee®design services

• Low-power RF and ZigBee module solutions and development tools

• RF certification services and RF circuit manufacturing Need help with modules, engineering services or development tools? Search the Low-Power RF Developer Network tool to find a suitable partner.

www.ti.com/lprfnetwork

Low-Power RF eNewsletter

The Low-Power RF eNewsletter keeps you up-to-date on new products, news releases, developers’ news, and other news and events associated with low-power RF products from TI. The Low-Power RF eNewsletter articles include links to get more online information.

www.ti.com/lprfnewsletter

Spacer

REVISION HISTORY

Changes from Original (January 2012) to Revision A Page

• Changed data sheet status from Product Preview to Production Data ................................................................................ 1

Changes from Revision A (February 2012) to Revision B Page

• Changed the Temperature coefficient Unit value From: mV/°C To: / 0.1°C ....................................................................... 10

• Changed Figure 22 text From: Optional 32-kHz Crystal To: 32-kHz Crystal ..................................................................... 24

Changes from Revision B (August 2012) to Revision C Page

• Changed the "Internal reference voltage" TYP value From 1.15 V To: 1.24 V .................................................................. 12

• Changed pin XOSC_Q1 Pin Type From Analog O To: Analog I/O, and changed the Pin Description .............................. 17

• Changed pin XOSC_Q2 Pin Type From Analog O To: Analog I/O .................................................................................... 17

Changes from Revision C (November 2012) to Revision D Page

• Changed the RF TRANSMIT SECTION, Output power TYP value From: –20 To: –23 ....................................................... 8

• Changed the RF TRANSMIT SECTION, Programmable output power range TYP value From: 20 To: 23 ........................ 8

• Added row 0x31 to Table 1 ................................................................................................................................................. 22

Product Folder Links: CC2541

Page 27

PACKAGE OPTION ADDENDUM

www.ti.com

23-Sep-2014

PACKAGING INFORMATION

Orderable Device Status

CC2541F128RHAR ACTIVE VQFN RHA 40 2500 Green (RoHS

CC2541F128RHAT ACTIVE VQFN RHA 40 250 Green (RoHS

CC2541F256RHAR ACTIVE VQFN RHA 40 2500 Green (RoHS

CC2541F256RHAT ACTIVE VQFN RHA 40 250 Green (RoHS

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

Package Type Package

(1)

Drawing

Pins Package

Qty

Eco Plan

(2)

& no Sb/Br)

Lead/Ball Finish

(6)

CU NIPDAU Level-3-260C-168 HR -40 to 85 CC2541

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

F128

F256

(4/5)

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)

There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)

Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Samples

Addendum-Page 1

Page 28

PACKAGE OPTION ADDENDUM

www.ti.com

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

23-Sep-2014

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF CC2541 :

Automotive: CC2541-Q1

•

NOTE: Qualified Version Definitions:

Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

•

Addendum-Page 2

Page 29

PACKAGE MATERIALS INFORMATION

www.ti.com 13-Nov-2014

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type

CC2541F128RHAR VQFN RHA 40 2500 330.0 16.4 6.3 6.3 1.5 12.0 16.0 Q2 CC2541F128RHAT VQFN RHA 40 250 180.0 16.4 6.3 6.3 1.5 12.0 16.0 Q2 CC2541F256RHAR VQFN RHA 40 2500 330.0 16.4 6.3 6.3 1.5 12.0 16.0 Q2 CC2541F256RHAT VQFN RHA 40 250 180.0 16.4 6.3 6.3 1.5 12.0 16.0 Q2

Package Drawing

Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm)B0(mm)K0(mm)P1(mm)W(mm)

Pin1

Quadrant

Pack Materials-Page 1

Page 30

PACKAGE MATERIALS INFORMATION

www.ti.com 13-Nov-2014

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

CC2541F128RHAR VQFN RHA 40 2500 336.6 336.6 28.6 CC2541F128RHAT VQFN RHA 40 250 213.0 191.0 55.0 CC2541F256RHAR VQFN RHA 40 2500 336.6 336.6 28.6 CC2541F256RHAT VQFN RHA 40 250 213.0 191.0 55.0

Pack Materials-Page 2

Page 31

Page 32

Page 33

Page 34

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed.

TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions.

Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.

Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications.

In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms.

No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use.

Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use.

TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.

Products Applications

Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

iRobot ALT240ROB Chipset Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

SOFTWARE FEATURES CC2541 WITH TPS62730

APPLICATIONS

DESCRIPTION

ABSOLUTE MAXIMUM RATINGS

RECOMMENDED OPERATING CONDITIONS

ELECTRICAL CHARACTERISTICS

GENERAL CHARACTERISTICS

RF RECEIVE SECTION

RF TRANSMIT SECTION

CURRENT CONSUMPTION WITH TPS62730

32-MHz CRYSTAL OSCILLATOR

32.768-kHz CRYSTAL OSCILLATOR

32-kHz RC OSCILLATOR

16-MHz RC OSCILLATOR

RSSI CHARACTERISTICS

FREQUENCY SYNTHESIZER CHARACTERISTICS

ANALOG TEMPERATURE SENSOR

COMPARATOR CHARACTERISTICS

ADC CHARACTERISTICS

CONTROL INPUT AC CHARACTERISTICS

SPI AC CHARACTERISTICS

DEBUG INTERFACE AC CHARACTERISTICS

TIMER INPUTS AC CHARACTERISTICS

DC CHARACTERISTICS

DEVICE INFORMATION

PIN DESCRIPTIONS

BLOCK DIAGRAM

BLOCK DESCRIPTIONS

CPU and Memory

Peripherals

TYPICAL CHARACTERISTICS

TYPICAL CURRENT SAVINGS WHEN USING TPS62730

APPLICATION INFORMATION

Input/Output Matching

Crystal

On-Chip 1.8-V Voltage Regulator Decoupling

Power-Supply Decoupling and Filtering

References

Additional Information

Texas Instruments Low-Power RF Web Site

Texas Instruments Low-Power RF Developer Network

Low-Power RF eNewsletter

REVISION HISTORY