iRobot ALT240ROB Chipset Datasheet

CC2541
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SWRS110D –JANUARY 2012–REVISED JUNE 2013
2.4-GHz Bluetooth™ low energy and Proprietary System-on-Chip
Check for Samples: CC2541
1

FEATURES

23
and Proprietary RF System-on-Chip – In-System-Programmable Flash, 128- or
– Supports 250-kbps, 500-kbps, 1-Mbps, 2-
Mbps Data Rates – 8-KB RAM With Retention in All Power
– Excellent Link Budget, Enabling Long-
Range Applications Without External Front – Hardware Debug Support
End – Programmable Output Power up to 0 dBm Auto-Acknowledgment and Address – Excellent Receiver Sensitivity (–94 dBm at
1 Mbps), Selectivity, and Blocking – Retention of All Relevant Registers in All
Performance Power Modes – Suitable for Systems Targeting Compliance Peripherals
With Worldwide Radio Frequency
Regulations: ETSI EN 300 328 and EN 300
440 Class 2 (Europe), FCC CFR47 Part 15
(US), and ARIB STD-T66 (Japan)
Layout – Few External Components – Reference Design Provided – 6-mm × 6-mm QFN-40 Package – Pin-Compatible With CC2540 (When Not
Using USB or I2C)
Low Power – Active-Mode RX Down to: 17.9 mA – Active-Mode TX (0 dBm): 18.2 mA – Power Mode 1 (4-µs Wake-Up): 270 µA – Power Mode 2 (Sleep Timer On): 1 µA – Power Mode 3 (External Interrupts): 0.5 µA – Wide Supply-Voltage Range (2 V–3.6 V)
TPS62730 Compatible Low Power in Active Mode
– RX Down to: 14.7 mA (3-V supply) – TX (0 dBm): 14.3 mA (3-V supply)
White space White space White space White space White space White space
Microcontroller
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Bluetooth is a trademark of Bluetooth SIG, Inc.. 3ZigBee is a registered trademark of ZigBee Alliance.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Microcontroller Core With Code Prefetch
256-KB
Modes
– Extensive Baseband Automation, Including
Decoding
– Powerful Five-Channel DMA – General-Purpose Timers (One 16-Bit, Two
8-Bit) – IR Generation Circuitry – 32-kHz Sleep Timer With Capture – Accurate Digital RSSI Support – Battery Monitor and Temperature Sensor – 12-Bit ADC With Eight Channels and
Configurable Resolution – AES Security Coprocessor – Two Powerful USARTs With Support for
Several Serial Protocols – 23 General-Purpose I/O Pins
(21 × 4 mA, 2 × 20 mA) – I2C interface – 2 I/O Pins Have LED Driving Capabilities – Watchdog Timer – Integrated High-Performance Comparator
Development Tools – CC2541 Evaluation Module Kit
(CC2541EMK)
– CC2541 Mini Development Kit (CC2541DK-
MINI) – SmartRF™ Software – IAR Embedded Workbench™ Available
Copyright © 2012–2013, Texas Instruments Incorporated
CC2541
SWRS110D –JANUARY 2012–REVISED JUNE 2013
www.ti.com

SOFTWARE FEATURES CC2541 WITH TPS62730

Bluetooth v4.0 Compliant Protocol Stack for TPS62730 is a 2-MHz Step-Down Converter Single-Mode BLE Solution With Bypass Mode
– Complete Power-Optimized Stack, Extends Battery Lifetime by up to 20%
Including Controller and Host – GAP – Central, Peripheral, Observer, or
Broadcaster (Including Combination
Roles) – ATT / GATT – Client and Server – SMP – AES-128 Encryption and
Decryption – L2CAP
– Sample Applications and Profiles
– Generic Applications for GAP Central
and Peripheral Roles – Proximity, Accelerometer, Simple Keys,
and Battery GATT Services – More Applications Supported in BLE
Software Stack
– Multiple Configuration Options
– Single-Chip Configuration, Allowing
Applications to Run on CC2541 – Network Processor Interface for
Applications Running on an External
Microcontroller
– BTool – Windows PC Application for
Evaluation, Development, and Test

APPLICATIONS

2.4-GHz Bluetooth low energy Systems
Proprietary 2.4-GHz Systems
Human-Interface Devices (Keyboard, Mouse, Remote Control)
Sports and Leisure Equipment
Mobile Phone Accessories
Consumer Electronics
Reduced Current in All Active Modes
30-nA Bypass Mode Current to Support Low­Power Modes
RF Performance Unchanged
Small Package Allows for Small Solution Size
CC2541 Controllable

DESCRIPTION

The CC2541 is a power-optimized true system-on­chip (SoC) solution for both Bluetooth low energy and proprietary 2.4-GHz applications. It enables robust network nodes to be built with low total bill-of-material costs. The CC2541 combines the excellent performance of a leading RF transceiver with an industry-standard enhanced 8051 MCU, in-system programmable flash memory, 8-KB RAM, and many other powerful supporting features and peripherals. The CC2541 is highly suited for systems where ultralow power consumption is required. This is specified by various operating modes. Short transition times between operating modes further enable low power consumption.
The CC2541 is pin-compatible with the CC2540 in the 6-mm × 6-mm QFN40 package, if the USB is not used on the CC2540 and the I2C/extra I/O is not used on the CC2541. Compared to the CC2540, the CC2541 provides lower RF current consumption. The CC2541 does not have the USB interface of the CC2540, and provides lower maximum output power in TX mode. The CC2541 also adds a HW I2C interface.
The CC2541 is pin-compatible with the CC2533 RF4CE-optimized IEEE 802.15.4 SoC.
The CC2541 comes in two different versions: CC2541F128/F256, with 128 KB and 256 KB of flash memory, respectively.
For the CC2541 block diagram, see Figure 1.
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Product Folder Links: CC2541
SFR bus SFR bus
MEMORY
ARBITRATOR
8051 CPU
CORE
DMA
FLASH
SRAM
FLASH CTRL
DEBUG
INTERFACE
RESET
RESET_N
P2_4
P2_3
P2_2
P2_1
P2_0
P1_4
P1_3
P1_2
P1_1
P1_0
P1_7
P1_6
P1_5
P0_4
P0_3
P0_2
P0_1
P0_0
P0_7
P0_6
P0_5
32.768-kHz
CRYSTAL OSC
32-MHZ
CRYSTAL OSC
HIGH SPEED
RC-OSC
32-kHz
RC-OSC
CLOCK MUX and
CALIBRATION
RAM
USART 0
USART 1
TIMER 1 (16-Bit)
TIMER 3 (8-bit)
TIMER 2
(BLE LL TIMER)
TIMER 4 (8-bit)
AES
ENCRYPTION
and
DECRYPTION
WATCHDOG TIMER
IRQ
CTRL
FLASH
UNIFIED
RF_P RF_N
SYNTH
MODULATOR
POWER-ON RESET
BROWN OUT
RADIO
REGISTERS
POWER MGT. CONTROLLER
SLEEP TIMER
PDATA
XRAM
IRAM
SFR
XOSC_Q2
XOSC_Q1
DS ADC
AUDIO / DC
DIGITAL
ANALOG
MIXED
VDD (2 V–3.6 V)
DCOUPL
ON-CHIP VOLTAGE
REGULATOR
Link Layer Engine
FREQUENCY
SYNTHESIZER
I2C
DEMODULATOR
RECEIVE TRANSMIT
OP-
ANALOG COMPARATOR
I/O CONTROLLER
1-KB SRAM
Radio Arbiter
FIFOCTRL
SDA
SCL
CC2541
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SWRS110D –JANUARY 2012–REVISED JUNE 2013
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
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Figure 1. Block Diagram
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CC2541
SWRS110D –JANUARY 2012–REVISED JUNE 2013

ABSOLUTE MAXIMUM RATINGS

(1)
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over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Supply voltage All supply pins must have the same voltage –0.3 3.9 V Voltage on any digital pin –0.3 VDD + 0.3 3.9 V Input RF level 10 dBm Storage temperature range –40 125 °C
All pins, excluding pins 25 and 26, according to human-body model, JEDEC STD 22, method A114
(2)
ESD
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) CAUTION: ESD sesnsitive device. Precautions should be used when handling the device in order to prevent permanent damage.
All pins, according to human-body model, JEDEC STD 22, method A114
According to charged-device model, JEDEC STD 22, method C101
2 kV
1 kV
500 V

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Operating ambient temperature range, T Operating supply voltage 2 3.6 V
A
–40 85 °C

ELECTRICAL CHARACTERISTICS

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V,
1 Mbps, GFSK, 250-kHz deviation, Bluetooth low energy mode, and 0.1% BER
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RX mode, standard mode, no peripherals active, low MCU activity
RX mode, high-gain mode, no peripherals active, low MCU activity
TX mode, –20 dBm output power, no peripherals active, low MCU activity
TX mode, 0 dBm output power, no peripherals active, low MCU activity
I
I
Core current consumption
core
Peripheral current consumption (Adds to core current I
peri
peripheral unit activated)
core
for each
Power mode 1. Digital regulator on; 16-MHz RCOSC and 32­MHz crystal oscillator off; 32.768-kHz XOSC, POR, BOD and 270 sleep timer active; RAM and register retention
Power mode 2. Digital regulator off; 16-MHz RCOSC and 32­MHz crystal oscillator off; 32.768-kHz XOSC, POR, and sleep 1 timer active; RAM and register retention
Power mode 3. Digital regulator off; no clocks; POR active; RAM and register retention
Low MCU activity: 32-MHz XOSC running. No radio or peripherals. Limited flash access, no RAM access.
Timer 1. Timer running, 32-MHz XOSC used 90 Timer 2. Timer running, 32-MHz XOSC used 90 Timer 3. Timer running, 32-MHz XOSC used 60 μA Timer 4. Timer running, 32-MHz XOSC used 70 Sleep timer, including 32.753-kHz RCOSC 0.6 ADC, when converting 1.2 mA
17.9
20.2 mA
16.8
18.2
µA
0.5
6.7 mA
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CC2541
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SWRS110D –JANUARY 2012–REVISED JUNE 2013

GENERAL CHARACTERISTICS

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
WAKE-UP AND TIMING
Power mode 1 Active 4 μs
Power mode 2 or 3 Active 120 μs
Active TX or RX
RX/TX turnaround μs
RADIO PART
RF frequency range Programmable in 1-MHz steps 2379 2496 MHz
Data rate and modulation format 1 Mbps, GFSK, 160-kHz deviation
Digital regulator on, 16-MHz RCOSC and 32-MHz crystal oscillator off. Start-up of 16-MHz RCOSC
Digital regulator off, 16-MHz RCOSC and 32-MHz crystal oscillator off. Start-up of regulator and 16-MHz RCOSC
Crystal ESR = 16 . Initially running on 16-MHz RCOSC, with 32-MHz XOSC OFF
With 32-MHz XOSC initially on 180 μs Proprietary auto mode 130 BLE mode 150
2 Mbps, GFSK, 500-kHz deviation 2 Mbps, GFSK, 320-kHz deviation 1 Mbps, GFSK, 250-kHz deviation
500 kbps, MSK 250 kbps, GFSK, 160-kHz deviation 250 kbps, MSK
500 μs

RF RECEIVE SECTION

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C, VDD = 3 V, fc= 2440 MHz
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
2 Mbps, GFSK, 500-kHz Deviation, 0.1% BER
Receiver sensitivity –90 dBm Saturation BER < 0.1% –1 dBm Co-channel rejection Wanted signal at –67 dBm –9 dB
±2 MHz offset, 0.1% BER, wanted signal –67 dBm –2
In-band blocking rejection ±4 MHz offset, 0.1% BER, wanted signal –67 dBm 36 dB
±6 MHz or greater offset, 0.1% BER, wanted signal –67 dBm 41 Including both initial tolerance and drift. Sensitivity better than –67dBm,
Frequency error tolerance Symbol rate error Maximum packet length. Sensitivity better than–67dBm, 250 byte
tolerance
2 Mbps, GFSK, 320-kHz Deviation, 0.1% BER
Receiver sensitivity –86 dBm Saturation BER < 0.1% –7 dBm Co-channel rejection Wanted signal at –67 dBm –12 dB
In-band blocking rejection ±4 MHz offset, 0.1% BER, wanted signal –67 dBm 34 dB
Frequency error tolerance Symbol rate error Maximum packet length. Sensitivity better than –67 dBm, 250 byte
tolerance
(1) Difference between center frequency of the received RF signal and local oscillator frequency (2) Difference between incoming symbol rate and the internally generated symbol rate
(2)
(2)
(1)
250 byte payload. BER 0.1%
payload. BER 0.1%
±2 MHz offset, 0.1% BER, wanted signal –67 dBm –1
±6 MHz or greater offset, 0.1% BER, wanted signal –67 dBm 39 Including both initial tolerance and drift. Sensitivity better than –67 dBm,
(1)
250 byte payload. BER 0.1%
payload. BER 0.1%
–300 300 kHz
–120 120 ppm
–300 300 kHz
–120 120 ppm
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SWRS110D –JANUARY 2012–REVISED JUNE 2013
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RF RECEIVE SECTION (continued)
Measured on Texas Instruments CC2541 EM reference design with TA= 25°C, VDD = 3 V, fc= 2440 MHz
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
1 Mbps, GFSK, 250-kHz Deviation, Bluetooth low energy Mode, 0.1% BER
Receiver sensitivity
Saturation
(4)
Co-channel rejection
(3)(4)
(4)
In-band blocking rejection
Out-of-band blocking rejection
Intermodulation
(4)
(4)
Frequency error tolerance Symbol rate error Maximum packet length. Sensitivity better than –67 dBm, 250 byte
tolerance
(6)
1 Mbps, GFSK, 160-kHz Deviation, 0.1% BER
Receiver sensitivity
(7)
Saturation BER < 0.1% 0 dBm Co-channel rejection Wanted signal 10 dB above sensitivity level –9 dB
In-band blocking rejection dB
Frequency error tolerance Symbol rate error Maximum packet length. Sensitivity better than –67 dBm, 250-byte
tolerance
(6)
500 kbps, MSK, 0.1% BER
Receiver sensitivity
(7)
Saturation BER < 0.1% 0 dBm Co-channel rejection Wanted signal –67 dBm –5 dB
In-band blocking rejection ±2-MHz offset, 0.1% BER, wanted signal –67 dBm 27 dB
Frequency error tolerance –150 150 kHz
Symbol rate error tolerance –80 80 ppm
(3) The receiver sensitivity setting is programmable using a TI BLE stack vendor-specific API command. The default value is standard
mode. (4) Results based on standard-gain mode. (5) Difference between center frequency of the received RF signal and local oscillator frequency (6) Difference between incoming symbol rate and the internally generated symbol rate (7) Results based on high-gain mode.
High-gain mode –94 Standard mode –88 BER < 0.1% 5 dBm Wanted signal –67 dBm –6 dB ±1 MHz offset, 0.1% BER, wanted signal –67 dBm –2 ±2 MHz offset, 0.1% BER, wanted signal –67 dBm 26
(4)
±3 MHz offset, 0.1% BER, wanted signal –67 dBm 34 >6 MHz offset, 0.1% BER, wanted signal –67 dBm 33 Minimum interferer level < 2 GHz (Wanted signal –67 dBm) –21 Minimum interferer level [2 GHz, 3 GHz] (Wanted signal –67 dBm) –25 dBm Minimum interferer level > 3 GHz (Wanted signal –67 dBm) –7 Minimum interferer level –36 dBm Including both initial tolerance and drift. Sensitivity better than -67dBm,
(5)
250 byte payload. BER 0.1%
payload. BER 0.1%
–250 250 kHz
–80 80 ppm
–91 dBm
±1-MHz offset, 0.1% BER, wanted signal –67 dBm 2 ±2-MHz offset, 0.1% BER, wanted signal –67 dBm 24 ±3-MHz offset, 0.1% BER, wanted signal -–67 dBm 27 >6-MHz offset, 0.1% BER, wanted signal –67 dBm 32 Including both initial tolerance and drift. Sensitivity better than –67 dBm,
(5)
250-byte payload. BER 0.1%
payload. BER 0.1%
–200 200 kHz
–80 80 ppm
–99 dBm
±1-MHz offset, 0.1% BER, wanted signal –67 dBm 20
>2-MHz offset, 0.1% BER, wanted signal –67 dBm 28 Including both initial tolerance and drift. Sensitivity better than –67 dBm,
250-byte payload. BER 0.1% Maximum packet length. Sensitivity better than –67 dBm, 250-byte
payload. BER 0.1%
dBm
dB
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SWRS110D –JANUARY 2012–REVISED JUNE 2013
RF RECEIVE SECTION (continued)
Measured on Texas Instruments CC2541 EM reference design with TA= 25°C, VDD = 3 V, fc= 2440 MHz
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
250 kbps, GFSK, 160 kHz Deviation, 0.1% BER
Receiver sensitivity Saturation BER < 0.1% 0 dBm Co-channel rejection Wanted signal -67 dBm –3 dB
In-band blocking rejection ±2-MHz offset, 0.1% BER, wanted signal –67 dBm 28 dB
Frequency error tolerance Symbol rate error Maximum packet length. Sensitivity better than –67 dBm, 250-byte
tolerance
(10)
250 kbps, MSK, 0.1% BER
Receiver sensitivity Saturation BER < 0.1% 0 dBm Co-channel rejection Wanted signal -67 dBm –5 dB
In-band blocking rejection ±2-MHz offset, 0.1% BER, wanted signal –67 dBm 29 dB
Frequency error tolerance –150 150 kHz
Symbol rate error tolerance –80 80 ppm
ALL RATES/FORMATS
Spurious emission in RX. Conducted measurement
Spurious emission in RX. Conducted measurement
(8) Results based on standard-gain mode. (9) Difference between center frequency of the received RF signal and local oscillator frequency (10) Difference between incoming symbol rate and the internally generated symbol rate (11) Results based on high-gain mode.
(8)
(11)
–98 dBm
±1-MHz offset, 0.1% BER, wanted signal –67 dBm 23
>2-MHz offset, 0.1% BER, wanted signal –67 dBm 29 Including both initial tolerance and drift. Sensitivity better than –67 dBm,
(9)
250-byte payload. BER 0.1%
payload. BER 0.1%
–150 150 kHz
–80 80 ppm
–99 dBm
±1-MHz offset, 0.1% BER, wanted signal –67 dBm 20
>2-MHz offset, 0.1% BER, wanted signal –67 dBm 30 Including both initial tolerance and drift. Sensitivity better than –67 dBm,
250-byte payload. BER 0.1% Maximum packet length. Sensitivity better than –67 dBm, 250-byte
payload. BER 0.1%
f < 1 GHz –67 dBm
f > 1 GHz –57 dBm
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RF TRANSMIT SECTION

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C, VDD = 3 V and fc= 2440 MHz
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Delivered to a single-ended 50-Ω load through a balun using
Output power dBm
Programmable output power Delivered to a single-ended 50-Ω load through a balun using 23 dB range minimum recommended output power setting
Spurious emission conducted f > 1 GHz –48 dBm measurement
Optimum load impedance 70 +j30 Ω
maximum recommended output power setting Delivered to a single-ended 50-Ω load through a balun using
minimum recommended output power setting
f < 1 GHz –52 dBm
Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan)
Differential impedance as seen from the RF port (RF_P and RF_N) toward the antenna
0
–23
Designs with antenna connectors that require conducted ETSI compliance at 64 MHz should insert an LC resonator in front of the antenna connector. Use a 1.6-nH inductor in parallel with a 1.8-pF capacitor. Connect both from the signal trace to a good RF ground.

CURRENT CONSUMPTION WITH TPS62730

Measured on Texas Instruments CC2541 TPA62730 EM reference design with TA= 25°C, VDD = 3 V and fc= 2440 MHz,
1 Mbsp, GFSK, 250-kHz deviation, Bluetooth™ low energy Mode, 1% BER
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RX mode, standard mode, no peripherals active, low MCU activity, MCU at 1 MHz
RX mode, high-gain mode, no peripherals active, low MCU activity,
Current consumption mA
(1) 0.1% BER maps to 30.8% PER
MCU at 1 MHz TX mode, –20 dBm output power, no peripherals active, low MCU activity, 13.1
MCU at 1 MHz TX mode, 0 dBm output power, no peripherals active, low MCU activity,
MCU at 1 MHz
(1)
14.7
16.7
14.3

32-MHz CRYSTAL OSCILLATOR

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Crystal frequency 32 MHz Crystal frequency accuracy
requirement ESR Equivalent series resistance 6 60 C
Crystal shunt capacitance 1 7 pF
0
C
Crystal load capacitance 10 16 pF
L
Start-up time 0.25 ms
Power-down guard time 3 ms
(1) Including aging and temperature dependency, as specified by [1]
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(1)
The crystal oscillator must be in power down for a guard time before it is used again. This requirement is valid for all modes of operation. The need for power-down guard time can vary with crystal type and load.
Product Folder Links: CC2541
–40 40 ppm
CC2541
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SWRS110D –JANUARY 2012–REVISED JUNE 2013

32.768-kHz CRYSTAL OSCILLATOR

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Crystal frequency 32.768 kHz
Crystal frequency accuracy requirement ESR Equivalent series resistance 40 130 k C
Crystal shunt capacitance 0.9 2 pF
0
C
Crystal load capacitance 12 16 pF
L
Start-up time 0.4 s
(1) Including aging and temperature dependency, as specified by [1]
(1)
–40 40 ppm

32-kHz RC OSCILLATOR

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Calibrated frequency Frequency accuracy after calibration ±0.2% Temperature coefficient Supply-voltage coefficient Calibration time
(1) The calibrated 32-kHz RC oscillator frequency is the 32-MHz XTAL frequency divided by 977. (2) Frequency drift when temperature changes after calibration (3) Frequency drift when supply voltage changes after calibration (4) When the 32-kHz RC oscillator is enabled, it is calibrated when a switch from the 16-MHz RC oscillator to the 32-MHz crystal oscillator
is performed while SLEEPCMD.OSC32K_CALDIS is set to 0.
(1)
(2)
(3)
(4)
32.753 kHz
0.4 %/°C 3 %/V 2 ms

16-MHz RC OSCILLATOR

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Frequency Uncalibrated frequency accuracy ±18% Calibrated frequency accuracy ±0.6% Start-up time 10 μs Initial calibration time
(1) The calibrated 16-MHz RC oscillator frequency is the 32-MHz XTAL frequency divided by 2. (2) When the 16-MHz RC oscillator is enabled, it is calibrated when a switch from the 16-MHz RC oscillator to the 32-MHz crystal oscillator
(1)
(2)
is performed while SLEEPCMD.OSC_PD is set to 0.
16 MHz
50 μs
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RSSI CHARACTERISTICS

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
2 Mbps, GFSK, 320-kHz Deviation, 0.1% BER and 2 Mbps, GFSK, 500-kHz Deviation, 0.1% BER
Useful RSSI range
RSSI offset
Absolute uncalibrated accuracy Step size (LSB value) 1 dB
All Other Rates/Formats
Useful RSSI range
RSSI offset
Absolute uncalibrated accuracy Step size (LSB value) 1 dB
(1) Assuming CC2541 EM reference design. Other RF designs give an offset from the reported value.
(1)
(1)
(1)
(1)
(1)
(1)
Reduced gain by AGC algorithm 64 High gain by AGC algorithm 64 Reduced gain by AGC algorithm 79 High gain by AGC algorithm 99
±6 dB
Standard mode 64 High-gain mode 64 Standard mode 98 High-gain mode 107
±3 dB
dB
dBm
dB
dBm

FREQUENCY SYNTHESIZER CHARACTERISTICS

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C, VDD = 3 V and fc= 2440 MHz
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
At ±1-MHz offset from carrier –109
Phase noise, unmodulated carrier At ±3-MHz offset from carrier –112 dBc/Hz
At ±5-MHz offset from carrier –119

ANALOG TEMPERATURE SENSOR

Measured on Texas Instruments CC2541 EM reference design with TA= 25°C and VDD = 3 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Output 1480 12-bit Temperature coefficient 4.5 / 1°C Voltage coefficient 1 0.1 V Initial accuracy without calibration ±10 °C Accuracy using 1-point calibration ±5 °C Current consumption when enabled 0.5 mA
Measured using integrated ADC, internal band-gap voltage reference, and maximum resolution

COMPARATOR CHARACTERISTICS

TA= 25°C, VDD = 3 V. All measurement results are obtained using the CC2541 reference designs, post-calibration.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Common-mode maximum voltage VDD V Common-mode minimum voltage –0.3 Input offset voltage 1 mV Offset vs temperature 16 µV/°C Offset vs operating voltage 4 mV/V Supply current 230 nA Hysteresis 0.15 mV
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ADC CHARACTERISTICS

TA= 25°C and VDD = 3 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input voltage VDD is voltage on AVDD5 pin 0 VDD V External reference voltage VDD is voltage on AVDD5 pin 0 VDD V External reference voltage differential VDD is voltage on AVDD5 pin 0 VDD V Input resistance, signal Simulated using 4-MHz clock speed 197 k Full-scale signal
(1)
ENOB
Effective number of bits bits
Useful power bandwidth 7-bit setting, both single and differential 0–20 kHz
THD Total harmonic distortion dB
Signal to nonharmonic ratio dB
CMRR Common-mode rejection ratio >84 dB
Crosstalk >84 dB Offset Midscale –3 mV
Gain error 0.68%
DNL Differential nonlinearity LSB
INL Integral nonlinearity LSB
SINAD (–THD+N)
Signal-to-noise-and-distortion dB
Conversion time μs
(1)
Peak-to-peak, defines 0 dBFS 2.97 V Single-ended input, 7-bit setting 5.7 Single-ended input, 9-bit setting 7.5 Single-ended input, 10-bit setting 9.3 Single-ended input, 12-bit setting 10.3 Differential input, 7-bit setting 6.5 Differential input, 9-bit setting 8.3 Differential input, 10-bit setting 10 Differential input, 12-bit setting 11.5 10-bit setting, clocked by RCOSC 9.7 12-bit setting, clocked by RCOSC 10.9
Single ended input, 12-bit setting, –6 dBFS Differential input, 12-bit setting, –6 dBFS Single-ended input, 12-bit setting Differential input, 12-bit setting
(1)
(1)
Single-ended input, 12-bit setting, –6 dBFS Differential input, 12-bit setting, –6 dBFS
(1)
(1)
–75.2 –86.6
70.2
79.3
(1)
(1)
78.8
88.9
Differential input, 12-bit setting, 1-kHz sine (0 dBFS), limited by ADC resolution
Single ended input, 12-bit setting, 1-kHz sine (0 dBFS), limited by ADC resolution
12-bit setting, mean 12-bit setting, maximum 12-bit setting, mean 12-bit setting, maximum
(1)
(1)
(1)
(1)
0.05
0.9
4.6
13.3 12-bit setting, mean, clocked by RCOSC 10 12-bit setting, max, clocked by RCOSC 29 Single ended input, 7-bit setting Single ended input, 9-bit setting Single ended input, 10-bit setting Single ended input, 12-bit setting Differential input, 7-bit setting Differential input, 9-bit setting Differential input, 10-bit setting Differential input, 12-bit setting
(1) (1)
(1)
(1) (1) (1)
(1) (1)
35.4
46.8
57.5
66.6
40.7
51.6
61.8
70.8 7-bit setting 20 9-bit setting 36 10-bit setting 68 12-bit setting 132
(1) Measured with 300-Hz sine-wave input and VDD as reference.
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