ICST AV1886M, ICS1886M Datasheet

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ICST AV1886M, ICS1886M Datasheet

Integrated

ICS1886

Circuit

 

Systems, Inc.

 

FDDI / Fast Ethernet PHYceiverTM

 

General Description

The ICS1886 is designed to provide high performance clock recovery and generation for either 32.064 Mb/s, 34.368 Mb/s, 125 Mb/s or 139.264 Mb/s NRZ or NRZI serial data streams. The ICS1886 is ideally suited for LAN transceiver applications in either European or Japanese communication environments.

The ICS1886 also operates at the 100Mbit Ethernet frequency of 125 MHz. This is ideal for serial Ethernet data applications where no serial to parallel conversion is required.

Clock and data recovery is performed on an input serial data stream or the buffered transmit data depending upon the state of the loopback input. A continuous clock source will continue to be present even in the absence of input data. All internal timing is derived from either a low cost crystal or an external clock module.

Features

Data and clock recovery for: 32.064 Mb/s (Japan) 34.368 Mb/s (Europe - E3) 125 MHz (Ethernet) 139.264 Mb/s (Europe - E4)

Clock multiplication from either a crystal, differential or single-ended timing source

Continuous clock in the absence of data

No external PLL components

Lock/Loss status indicator output

Loopback mode for system diagnostics

Selectable loop timing mode

PECL drivers with settable sink current

The ICS1886 utilizes advanced CMOS phase-locked loop

Pin Configuration

technology which combines high performance and low

 

 

 

 

power at a greatly reduced cost.

 

 

 

 

Block Diagram

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

28-Pin SOIC

PHYceiver is a trademark of Integrated Circuit Systems, Inc.

ICS1886RevC120996

ICS1886

Table 1 - Device Clock Selection

CS1

CS0

LOOP

INPUT

CLOCK FREQ

MODE

REF FREQ or

CRYSTAL

 

 

 

 

 

 

 

 

 

 

 

 

 

VSS

VSS

VSS

Tx Data

32.064 MHz

Japan

4.008 MHz

 

 

 

 

 

 

 

VSS

VDD

VSS

Tx Data

34.368 MHz

Europe - E3

4.296 MHz

 

 

 

 

 

 

 

VDD

VSS

VSS

Tx Data

125.000 MHz

Ethernet

25.000 MHz

 

 

 

 

 

 

 

VDD

VDD

VSS

Tx Data

139.264 MHz

Europe - E4

17.408 MHz

 

 

 

 

 

 

 

VSS

VSS

VDD

Rx Data

32.064 MHz

Japan

4.008 MHz

 

 

 

 

 

 

 

VSS

VDD

VDD

Rx Data

34.368 MHz

Europe - E3

4.296 MHz

 

 

 

 

 

 

 

VDD

VSS

VDD

Rx Data

125.000MHz

Ehternet

25.000 MHz

 

 

 

 

 

 

 

VDD

VDD

VDD

Rx Data

139.264 MHz

Europe - E4

17.408 MHz

 

 

 

 

 

 

 

Pin Descriptions

PIN

PIN NAME

TYPE

DESCRIPTION

NUMBER

 

 

 

1

VSS

 

Negative supply voltage.

2

LT~

 

Loop Timing mode select.*

3

CD~

 

Carrier Detect input.*

4

TX+

 

Positive Transmit serial data output.

5

TX-

 

Negative Transmit serial data output.

6

VSS

 

Negative supply voltage.

7

IPRG1

 

PECL Output stage current set (TX).

8

RX-

 

Negative Receive serial data input.

9

RX+

 

Positive Receive serial data input.

10

LB~

 

Loop Back mode select.*

11

LOCK

 

Lock detect output.

12

CS1

 

Clock select 1 input.

13

CS0

 

Clock select 0 input.

14

VSS

 

Negative supply voltage.

15

IPRG2

 

PECL Output stage current set (TC, RC and RD).

16

VSS

 

Negative supply voltage.

17

RD+

 

Positive recovered data output

18

RD-

 

Negative recovered data output.

19

RC+

 

Positive recovered clock output.

20

RC-

 

Negative recovered clock output.

21

VDD

 

Positive supply voltage.

22

REF+

 

Positive reference clock/crystal input.

23

REF-

 

Negative reference clock/crystal input.

24

VDD

 

Positive supply voltage.

25

TC-

 

Negative Transmit clock output.

26

TC+

 

Positive Transmit clock output.

27

TD-

 

Negative Transmit data input.

28

TD+

 

Positive Transmit data input.

* Active Low Input.

2

ICS1886

Absolute Maximum Ratings

VDD (measured to VSS) . . . . . . . . . . . . . . . . . .

7.0 V

Ambient OperatingTemperature . . . . . . . . . . .

55°C to +125°C

StorageTemperature . . . . . . . . . . . . . . . . . . . .

65°C to +150°C

JunctionTemperature . . . . . . . . . . . . . . . . . . .

175°C

SolderingTemperature . . . . . . . . . . . . . . . . . .

260°C

Stresses above those listed under Absolute Maximum Ratings above may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.

Recommended Operating Conditions

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

MAX

UNITS

 

 

 

 

 

 

Ambient Operating Temp.

TA

 

0

+70

ºC

Using a Negitive Supply

VSS

 

-4.50

-5.50

V

VDD

 

0.0

0.0

V

 

 

Using a Positive Supply

VSS

 

0.0

0.0

V

VDD

 

+4.50

+5.50

V

 

 

ICS1886 FDDI / Fast Ethernet Application

3

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