ICSI IS62LV2568L-70TI, IS62LV2568L-70T, IS62LV2568L-70BI, IS62LV2568L-70B, IS62LV2568L-55TI Datasheet

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IS62LV2568L

IS62LV2568LL

IS62LV2568LL

256K x 8 LOW POWER and LOW V++ CMOS STATIC RAM

FEATURES

Access times of 55, 70, 100 ns

Low active power: 126 mW (max, L, LL)

Low standby power: 36 µW (max, L) and 7.2 µW (max, LL) CMOS standby

Low data retention voltage: 1.5V (min.)

Available in Low Power (-L) and Ultra-Low Power (-LL)

Output Enable (OE) and two Chip Enable

TTL compatible inputs and outputs

Single 2.7V-3.6V power supply

Available in the 32-pin 8x20mm TSOP-1, 32-pin 8x13.4mm TSOP-1 and 48-pin 6*8mm TF-BGA

DESCRIPTION

The 1+51 IS62LV2568L and IS62LV2568LL are low power and low VCC, 262,144-bit words by 8 bits CMOS static RAMs. They are fabricated using 1+51's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices.

When CE1 is HIGH or CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels.

Easy memory expansion is provided by using two Chip Enable inputs, CE1 and CE2. The active LOW Write Enable (WE) controls both writing and reading of the memory.

The IS62LV2568L and IS62LV2568LL are available in 32-pin 8*20mm TSOP-1, 8*13.4mm TSOP-1 and 48-pin 6*8mm TFBGA.

FUNCTIONAL BLOCK DIAGRAM

A0-A17

DECODER

 

2048 x 128 x 8

 

MEMORY ARRAY

 

 

 

 

 

 

 

VCC

GND

I/O

I/O0-I/O7 DATA COLUMN I/O

CIRCUIT

CE1

CE2 CONTROL

OE CIRCUIT

WE

ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.

Integrated Circuit Solution Inc.

1

SR025_0C

ICSI IS62LV2568L-70TI, IS62LV2568L-70T, IS62LV2568L-70BI, IS62LV2568L-70B, IS62LV2568L-55TI Datasheet

IS62LV2568L

IS62LV2568LL

PIN CONFIGURATIONS

32-Pin 8*20mm TSOP-1, 8*13.4mm STSOP-1 48-Pin 6*8mm TF-BGA

 

 

 

 

 

 

 

 

 

 

 

 

A11

1

32

 

OE

 

A9

 

2

31

 

A10

 

 

 

 

 

 

 

 

 

 

 

 

 

A8

 

3

30

 

CE1

A13

 

4

29

 

I/O7

 

 

 

 

 

 

 

 

 

 

I/O6

WE

 

5

28

 

 

 

CE2

 

6

 

27

 

I/O5

 

 

 

 

 

A15

 

7

 

26

 

I/O4

 

 

Vcc

 

8

 

25

 

I/O3

 

 

A17

 

9

 

24

 

GND

 

 

A16

 

10

 

23

 

I/O2

 

 

 

A14

 

22

 

I/O1

 

11

 

A12

 

21

 

I/O0

 

12

 

 

A7

 

13

20

 

A0

 

 

 

A6

 

14

19

 

A1

 

 

 

A5

 

15

18

 

A2

 

 

 

A4

 

16

17

 

A3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

2

3

4

5

6

A

A0

A1

CE2

A3

A6

A8

B

I/O4

A2

WE

A4

A7

I/O0

C

I/O5

 

NC

A5

 

I/O1

D

GND

 

 

 

 

Vcc

E

Vcc

 

 

 

 

GND

F

I/O6

 

NC

A17

 

I/O2

G

I/O7

OE

CE1

A16

A15

I/O3

H

A9

A10

A11

A12

A13

A14

PIN DESCRIPTIONS

A0-A17

Address Inputs

 

 

CE1

Chip Enable 1 Input

 

 

CE2

Chip Enable 2 Input

 

 

OE

Output Enable Input

 

 

WE

Write Enable Input

 

 

I/O0-I/O7

Data Input/Output

 

 

NC

No Connection

 

 

Vcc

Power

 

 

GND

Ground

 

 

OPERATING RANGE

Range

Ambient Temperature

VCC

Commercial

0°C to +70°C

2.7V - 3.6V

 

 

 

Industrial

–40°C to +85°C

2.7V - 3.6V

 

 

 

2

Integrated Circuit Solution Inc.

SR025_0C

IS62LV2568L

IS62LV2568LL

TRUTH TABLE

Mode

WE

CE1

CE2

OE

I/O Operation

Vcc Current

 

 

 

 

 

 

 

Not Selected

X

H

X

X

High-Z

ISB , ISB

(Power-down)

X

X

L

X

High-Z

ISB , ISB

 

 

 

 

 

 

 

Output Disabled

H

L

H

H

High-Z

ICC

 

 

 

 

 

 

 

Read

H

L

H

L

DOUT

ICC

 

 

 

 

 

 

 

Write

L

L

H

X

DIN

ICC

 

 

 

 

 

 

 

ABSOLUTE MAXIMUM RATINGS(1)

Symbol

Parameter

Value

Unit

VTERM

Terminal Voltage with Respect to GND

–0.5 to Vcc + 0.5

V

 

 

 

 

VCC

Vcc related to GND

–0.3 to +4.0

V

 

 

 

 

TBIAS

Temperature Under Bias

–40 to +85

°C

 

 

 

 

TSTG

Storage Temperature

–65 to +150

°C

 

 

 

 

PT

Power Dissipation

0.7

W

Notes:

1.Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

CAPACITANCE(1)

Symbol

Parameter

Conditions

Max.

Unit

 

 

 

 

 

CIN

Input Capacitance

VIN = 0V

6

pF

 

 

 

 

 

COUT

Output Capacitance

VOUT = 0V

8

pF

 

 

 

 

 

Notes:

1. Tested initially and after any design or process changes that may affect these parameters.

DC ELECTRICAL CHARACTERISTICS (Over Operating Range)

Symbol

Parameter

Test Conditions

Min.

Max.

Unit

 

 

 

 

 

 

VOH

Output HIGH Voltage

VCC = Min., IOH = –1.0 mA

2.2

V

 

 

 

 

 

 

VOL

Output LOW Voltage

VCC = Min., IOL = 2.1 mA

0.4

V

 

 

 

 

 

 

VIH

Input HIGH Voltage

 

2.2

VCC + 0.3

V

 

 

 

 

 

 

VIL(1)

Input LOW Voltage(1)

 

–0.3

0.4

V

ILI

Input Leakage

GND VIN VCC

–1

1

µA

 

 

 

 

 

 

ILO

Output Leakage

GND VOUT VCC

–1

1

µA

 

 

 

 

 

 

Notes:

1. VIL = –2.0V for pulse width less than 10 ns.

Integrated Circuit Solution Inc.

3

SR025_0C

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