ICSI IC61LV6416-10B, IC61LV6416-10BI, IC61LV6416-8T, IC61LV6416-8TI, IC61LV6416-10K Datasheet

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IC61LV6416

Document Title

64K x 16 Hight Speed SRAM with 3.3V

Revision History

Revision No

History

Draft Date

Remark

0A

Initial Draft

September 12,2001

The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.

Integrated Circuit Solution Inc.

1

AHSR026-0A 09/12/2001

IC61LV6416

64K x 16 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY

FEATURES

High-speed access time: 8, 10, 12, and 15 ns

CMOS low power operation

250 mW (typical) operating

250 µW (typical) standby

TTL compatible interface levels

Single 3.3V power supply

Fully static operation: no clock or refresh required

Three state outputs

Data control for upper and lower bytes

Industrial temperature available

FUNCTIONAL BLOCK DIAGRAM

DESCRIPTION

The ICSI IC61LV6416 is a high-speed, 1,048,576-bit static RAM organized as 65,536 words by 16 bits. It is fabricated using ICSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns with low power consumption.

When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access.

The IC61LV6416 is packaged in the JEDEC standard 44-pin 400mil SOJ, 44-pin 400mil TSOP-2, and 48-pin 6*8mm TFBGA.

A0-A15

 

 

 

 

 

 

 

 

 

 

 

 

 

DECODER

 

 

64K x 16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MEMORY ARRAY

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O0-I/O7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Lower Byte

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

COLUMN I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DATA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O8-I/O15

 

 

 

 

 

 

 

 

 

 

 

 

 

CIRCUIT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Upper Byte

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OE

 

CONTROL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WE

 

 

 

 

 

 

 

 

 

 

 

 

CIRCUIT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

UB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.

2

Integrated Circuit Solution Inc.

 

AHSR026-0A 09/12/2001

ICSI IC61LV6416-10B, IC61LV6416-10BI, IC61LV6416-8T, IC61LV6416-8TI, IC61LV6416-10K Datasheet

IC61LV6416

PIN CONFIGURATIONS

44-Pin SOJ 44-Pin TSOP-2

A15

1

 

44

A0

 

 

A14

2

 

43

A1

 

 

A13

3

 

42

A2

 

 

A12

4

 

41

OE

 

 

A11

5

 

40

UB

 

 

CE

6

 

39

LB

 

 

I/O0

7

 

38

I/O15

 

 

I/O1

8

 

37

I/O14

 

 

I/O2

9

 

36

I/O13

 

 

I/O3

10

 

35

I/O12

 

 

Vcc

11

 

34

GND

 

 

GND

12

 

33

Vcc

 

 

I/O4

13

 

32

I/O11

 

 

I/O5

14

 

31

I/O10

 

 

I/O6

15

 

30

I/O9

 

 

I/O7

16

 

29

I/O8

 

 

WE

17

 

28

NC

 

 

A10

18

 

27

A3

 

 

A9

19

 

26

A4

 

 

A8

20

 

25

A5

 

 

A7

21

 

24

A6

 

 

NC

22

 

23

NC

 

 

48-Pin 6x8mm TF-BGA

 

 

 

1

2

3

4

5

6

A

LB

OE

A3

A7

A6

N/C

B

I/O0

UB

A2

A1

CE

I/O15

C

I/O1

I/O2

A0

A4

I/O13

I/O14

D

GND

I/O3

NC

A5

I/O12

Vcc

E

Vcc

I/O4

NC

NC

I/O11

GND

F

I/O5

I/O6

A9

A8

I/O10

I/O9

G

I/O7

NC

A11

A10

WE

I/O8

H

NC

A12

A13

A14

A15

NC

A15

 

1

44

 

A0

A14

 

2

43

 

A1

 

 

A13

 

3

42

 

A2

 

 

A12

 

4

41

 

 

 

 

 

 

OE

 

A11

 

5

40

 

 

 

 

 

 

UB

 

 

CE

 

6

39

 

 

 

 

 

 

LB

 

I/O0

 

7

38

 

I/O15

 

 

I/O1

 

8

37

 

I/O14

 

 

I/O2

 

9

36

 

I/O13

 

 

I/O3

 

10

35

 

I/O12

 

 

 

Vcc

 

11

34

 

GND

 

 

GND

 

12

33

 

Vcc

 

 

I/O4

 

13

32

 

I/O11

 

 

I/O5

 

14

31

 

I/O10

 

 

I/O6

 

15

30

 

I/O9

 

 

I/O7

 

16

29

 

I/O8

 

 

 

 

 

 

17

28

 

NC

 

WE

 

 

 

A10

 

18

27

 

A3

 

 

 

A9

 

19

26

 

A4

 

 

 

 

A8

 

20

25

 

A5

 

 

 

 

A7

 

21

24

 

A6

 

 

 

 

NC

 

22

23

 

NC

 

 

 

PIN DESCRIPTIONS

A0-A15

Address Inputs

 

 

I/O0-I/O15

Data Inputs/Outputs

 

 

CE

Chip Enable Input

 

 

OE

Output Enable Input

 

 

WE

Write Enable Input

 

 

LB

Lower-byte Control (I/O0-I/O7)

 

 

UB

Upper-byte Control (I/O8-I/O15)

 

 

NC

No Connection

 

 

Vcc

Power

 

 

GND

Ground

 

 

TRUTH TABLE

 

 

 

 

 

 

 

I/O PIN

 

 

 

Mode

WE

CE

OE

LB

UB

I/O0-I/O7

I/O8-I/O15

Vcc Current

 

 

 

 

 

 

 

 

 

 

 

Not Selected

X

H

X

X

X

High-Z

High-Z

ISB1, ISB2

 

Output Disabled

H

L

H

X

X

High-Z

High-Z

ICC

 

 

X

L

X

H

H

High-Z

High-Z

 

 

 

 

 

 

 

 

 

 

 

 

 

Read

H

L

L

L

H

DOUT

High-Z

ICC

 

 

H

L

L

H

L

High-Z

DOUT

 

 

 

 

H

L

L

L

L

DOUT

DOUT

 

 

 

 

 

 

 

 

 

 

 

 

 

Write

L

L

X

L

H

DIN

High-Z

ICC

 

 

L

L

X

H

L

High-Z

DIN

 

 

 

 

L

L

X

L

L

DIN

DIN

 

 

 

 

 

 

 

 

 

 

 

 

 

Integrated Circuit Solution Inc.

 

 

 

 

 

 

3

AHSR026-0A 09/12/2001

 

 

 

 

 

 

 

 

 

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