ICSI IC61LV5128-10K, IC61LV5128-10KI, IC61LV5128-10T, IC61LV5128-10TI, IC61LV5128-12K Datasheet
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IC61LV5128
Document Title
512K x 8 Hight Speed SRAM with 3.3V
Revision History
Revision No |
History |
Draft Date |
Remark |
0A |
Initial Draft |
September 11,2001 |
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The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution, Inc. |
1 |
AHSR021-0A 09/11/2001
IC61LV5128
512K x 8 HIGH-SPEED CMOS STATIC RAM
FEATURES
•High-speed access times:
— 8, 10, 12 and 15 ns
•High-preformance, lower-power CMOS process
•Multiple center power and ground pins for greater noise immunity
•Easy memory expansion with CE and OE options
•CE power-down
•Fully static operation: no clock or refresh reguired
•TTL compatible inputs and outputs
DESCRIPTION
The ICSI IC61LV5128 is a very high-speed, low power, 524,288-word by 8-bit COMS static RAM. The IC61LV5128 is fabricated using ICSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher preformance and low power consumotion devices.
When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 µW (typical) with CMOS input levels.
The IC61LV5128 operates from a single 3.3V power supply and all inputs are TTL-compatible.
•Single 3.3V ± 10% power supply
•Packages available:
—36-pin 400mil SOJ
—44-pin TSOP-2
The IC61LV5128 is available in 36-pin, 400mil SOJ and 44-pin TSOP-2 package.
FUNCTIONAL BLOCK DIAGRAM
A0-A18 |
DECODER |
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512K X 8 |
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MEMORY ARRAY |
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VCC
GND
I/O
I/O0-I/O7 DATA COLUMN I/O
CIRCUIT
CE
CONTROL
OE CIRCUIT
WE
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Circuit Solution, Inc.
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Integrated Circuit Solution, Inc. |
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AHSR021-0A 09/11/2001 |
IC61LV5128
PIN CONFIGURATION |
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PIN CONFIGURATION |
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36-Pin SOJ |
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44-Pin TSOP-2 |
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A0 |
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1 |
36 |
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NC |
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NC |
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1 |
44 |
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NC |
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A1 |
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2 |
35 |
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A18 |
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NC |
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2 |
43 |
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NC |
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A2 |
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34 |
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A17 |
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A0 |
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3 |
42 |
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NC |
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3 |
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33 |
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A16 |
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A1 |
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4 |
41 |
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A18 |
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A3 |
4 |
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A2 |
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5 |
40 |
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A17 |
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32 |
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A15 |
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A4 |
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5 |
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A3 |
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6 |
39 |
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A16 |
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CE |
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6 |
31 |
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OE |
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A4 |
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7 |
38 |
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A15 |
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37 |
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I/O0 |
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7 |
30 |
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I/O7 |
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CE |
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8 |
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OE |
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29 |
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I/O6 |
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I/O0 |
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9 |
36 |
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I/O7 |
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I/O1 |
8 |
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I/O1 |
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10 |
35 |
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I/O6 |
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Vcc |
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9 |
28 |
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GND |
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34 |
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GND |
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Vcc |
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11 |
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Vcc |
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GND |
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10 |
27 |
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Vcc |
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GND |
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12 |
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I/O2 |
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11 |
26 |
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I/O5 |
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I/O2 |
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13 |
32 |
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I/O5 |
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I/O3 |
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14 |
31 |
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I/O4 |
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I/O3 |
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12 |
25 |
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I/O4 |
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30 |
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A14 |
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WE |
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15 |
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24 |
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A14 |
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WE |
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13 |
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A5 |
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16 |
29 |
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A13 |
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23 |
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A13 |
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A6 |
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17 |
28 |
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A12 |
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A5 |
14 |
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A7 |
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18 |
27 |
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A11 |
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A6 |
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15 |
22 |
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A12 |
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A8 |
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19 |
26 |
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A10 |
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A7 |
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16 |
21 |
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A11 |
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A9 |
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20 |
25 |
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NC |
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A8 |
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17 |
20 |
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A10 |
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NC |
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21 |
24 |
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NC |
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19 |
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NC |
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NC |
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22 |
23 |
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NC |
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A9 |
18 |
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PIN DESCRIPTIONS
A0-A18 |
Address Inputs |
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CE |
Chip Enable Input |
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OE |
Output Enable Input |
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WE |
Write Enable Input |
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I/O0-I/O7 |
Input/Output |
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Vcc |
Power |
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GND |
Ground |
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NC |
No Connection |
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TRUTH TABLE
Mode |
WE |
CE |
OE |
I/O Operation |
Vcc Current |
Not Selected |
X |
H |
X |
High-Z |
ISB1, ISB2 |
(Power-down) |
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Output Disabled |
H |
L |
H |
High-Z |
ICC |
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Read |
H |
L |
L |
DOUT |
ICC |
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Write |
L |
L |
X |
DIN |
ICC |
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ABSOLUTE MAXIMUM RATINGS(1)
Symbol |
Parameter |
Value |
Unit |
VTERM |
Terminal Voltage with Respect to GND |
–0.5 to Vcc + 0.5 |
V |
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TBIAS |
Temperature Under Bias |
–55 to +125 |
°C |
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TSTG |
Storage Temperature |
–65 to +150 |
°C |
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PD |
Power Dissipation |
1.0 |
W |
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Integrated Circuit Solution, Inc. |
3 |
AHSR021-0A 09/11/2001
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