Hyundai GMS90X52C, GMS90X54C, GMS90X51C User Manual

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HYUNDAI MICRO ELECTRONICS 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS90X51C

GMS90X52C

GMS90X54C

User’s Manual (Ver. 1.0)

+ < 8 1 ' $ ,

MicroElectronics

Semiconductor Group of Hyundai Electronics Industrial Co., Ltd.

Version 1.0

Published by

MCU Application Team

©2001 HYUNDAI MicroElectronics All right reserved.

Additional information of this manual may be served by HYUNDAI MicroElectronics offices in Korea or Distributors and Representatives listed at address directory.

HYUNDAI MicroElectronics reserves the right to make changes to any information here in at any time without notice.

The information, diagrams and other data in this manual are correct and reliable; however, HYUNDAI MicroElectronics is in no way responsible for any violations of patents or other rights of the third party generated by the use of this manual.

GMS90X5XC Series

HYUNDAI MicroElectronics

Device Naming Structure

GMS90X5XC - GCXXX XX XX

MicroElectronics MCU

Mask ROM version

HYUNDAI

 

Frequency

Blank: 12MHz

16:16MHz

24:24MHz

40:40MHz

Package Type

Blank: 40PDIP

PL: 44PLCC

Q:44MQFP

ROM Code serial No.

ROM size

1:4k bytes

2:8k bytes

4:16k bytes

Operating Voltage

C: 4.25~5.5V

L: 2.7~3.6V

GMS90X5XC Series Selection Guide

Operating

ROM size (bytes)

RAM size

Device Name

Operating

 

Voltage (V)

MASK

(bytes)

Frequency (MHz)

 

 

 

 

 

 

 

 

 

 

4.25~5.5

4K

128

GMS90C51C

12/24/40

 

8K

256

GMS90C52C

12/24/40

 

16K

256

GMS90C54C

12/24/40

 

 

 

 

 

2.7~3.6

4K

128

GMS90L51C

12/16

 

8K

256

GMS90L52C

12/16

 

16K

256

GMS90L54C

12/16

 

 

 

 

 

Jan. 2001 Ver 1.0

GMS90X5XC Series

HYUNDAI MicroElectronics

GMS90C51C

GMS90L51C(Low voltage versions)

Fully compatible to standard MCS-51 microcontroller

Wide operating frequency up to 40MHz

(for more detail, see “GMS90X5XC Series Selection Guide”)

X2 Speed Improvement capability (6 clocks/machine cycle) 20MHz @5V (Equivalent to 40MHz @5V)

8MHz @3V (Equivalent to 16MHz @3V)

4K × 8 ROM

128 × 8 RAM

64K external program memory space

64K external data memory space

Four 8-bit ports

Two 16-bit Timers / Counters

USART

Programmable ALE pin enable / disable (Low EMI)

Five interrupt sources, two priority levels

Power saving Idle and power down mode

2.7Volt low voltage version available

P-DIP-40, P-LCC-44, P-MQFP-44 package

Block Diagram

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RAM

 

PORT 0

 

 

 

 

I/O

 

 

 

 

 

 

 

 

128 ×

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

T 0

CPU

 

 

8-BIT

PORT 1

 

 

 

 

I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

USART

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

T 1

 

 

 

 

PORT 2

 

 

 

 

I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

ROM / EPROM

 

PORT 3

 

 

 

 

I/O

 

 

 

 

 

 

 

 

4K ×

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Jan. 2001 Ver 1.0

GMS90X5XC Series

HYUNDAI MicroElectronics

GMS90C52C/54C

GMS90L52C/54C(Low voltage versions)

Fully compatible to standard MCS-51 microcontroller

Wide operating frequency up to 40MHz

(for more detail, see “GMS90X5XC Series Selection Guide”)

X2 Speed Improvement capability (6 clocks/machine cycle) 20MHz @5V (Equivalent to 40MHz @5V)

8MHz @3V (Equivalent to 16MHz @3V)

8K/16K bytes ROM

256 × 8 RAM

64K external program memory space

64K external data memory space

Four 8-bit ports

Three 16-bit Timers / Counters (Timer2 with up/down counter feature)

USART

One clock output port

Programmable ALE pin enable / disable (Low EMI)

Six interrupt sources, two priority levels

Power saving Idle and power down mode

2.7Volt low voltage version available

P-DIP-40, P-LCC-44, P-MQFP-44 package

Block Diagram

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RAM

 

 

PORT 0

 

 

 

 

I/O

 

 

 

 

 

 

 

 

 

 

 

 

256 × 8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

T 2

T 0

CPU

 

8-BIT

PORT 1

 

 

 

 

I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

USART

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

T 1

 

 

 

PORT 2

 

 

 

 

I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ROM / EPROM

 

 

 

 

 

 

 

 

GMS90X52C: 8K

× 8

PORT 3

 

 

 

 

I/O

 

 

 

 

 

 

 

 

GMS90X54C: 16K × 8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Jan. 2001 Ver 1.0

1

HYUNDAI MicroElectronics

GMS90X5XC Series

PIN CONFIGURATION

44-PLCC Pin Configuration (top view)

INDEX

CORNER

P1.5 7

P1.6 8

P1.7 9

RESET 10

RxD / P3.0 11

N.C.* 12

TxD / P3.1 13

INT0 / P3.2 14

INT1 / P3.3 15 T0 / P3.4 16 T1 / P3.5 17

 

P1.4

 

P1.3

P1.2

T2EX

 

T2

N.C.*

 

 

 

AD0

 

AD1

 

AD2

 

AD3

 

 

 

P1.1/

 

P1.0/

 

V

P0.0/

 

P0.1/

 

P0.2/

 

P0.3/

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

5

4

3

2

1

44

 

43

42

41

40

 

39 P0.4 / AD4

38 P0.5 / AD5

37 P0.6 / AD6

36 P0.7 / AD7

35 EA / VPP

34 N.C.*

33 ALE / PROG

32 PSEN

31 P2.7 / A15

30 P2.6 / A14

29 P2.5 / A13

18

19

20

21

22

 

23

24

25

26

27

28

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

/WRP3.6

/RDP3.7

XTAL2

XTAL1

 

V

N.C.*

 

P2.0/ A8

 

P2.1/ A9

 

P2.2/ A10

 

/P2.3A11

 

P2.4/ A12

 

 

 

 

 

 

 

 

SS

 

 

 

 

 

 

 

 

 

 

 

N.C.: Do not connect.

2

Jan. 2001 Ver 1.0

GMS90X5XC Series

HYUNDAI MicroElectronics

40-PDIP Pin Configuration (top view)

 

 

 

T2

/ P1.0

 

 

 

 

 

VCC

 

 

 

 

 

 

 

1

40

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

T2EX / P1.1

 

2

39

 

 

P0.0

/ AD0

 

 

 

 

 

 

P1.2

 

3

38

 

 

P0.1

/ AD1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

P1.3

 

4

37

 

 

P0.2

/ AD2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

P1.4

 

5

36

 

 

P0.3

/ AD3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

P1.5

 

6

35

 

 

P0.4

/ AD4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

P1.6

 

7

34

 

 

P0.5

/ AD5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

P1.7

 

8

33

 

 

P0.6

/ AD6

 

 

 

 

 

 

 

 

 

 

 

 

RESET

 

9

32

 

 

P0.7

/ AD7

 

 

 

 

 

RxD / P3.0

 

 

 

 

 

 

 

 

 

10

31

 

 

EA

/ VPP

 

 

 

 

 

TxD / P3.1

 

11

30

 

 

ALE /

 

 

 

 

 

 

 

 

 

 

 

PROG

 

 

 

 

 

 

 

 

 

 

 

INT0

/ P3.2

 

12

29

 

 

 

 

 

 

 

 

 

 

PSEN

 

 

 

 

 

 

 

 

 

 

 

 

INT1

/ P3.3

 

13

28

 

 

P2.7

/ A15

 

 

 

 

 

 

 

 

T0 / P3.4

 

14

27

 

 

P2.6

/ A14

 

 

 

 

 

 

 

 

T1 / P3.5

 

 

 

 

 

 

 

15

26

 

 

P2.5

/ A13

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WR

/ P3.6

 

16

25

 

 

P2.4

/ A12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RD

/ P3.7

 

17

24

 

 

P2.3

/ A11

 

 

 

 

 

 

 

XTAL2

 

18

23

 

 

P2.2

/ A10

 

 

 

 

 

 

 

XTAL1

 

19

22

 

 

P2.1

/ A9

 

 

 

 

 

 

 

 

 

VSS

 

20

21

 

 

P2.0

/ A8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Jan. 2001 Ver 1.0

3

HYUNDAI MicroElectronics

GMS90X5XC Series

44-MQFP Pin Configuration (top view)

P1.5

P1.6

P1.7

RESET

RxD / P3.0

N.C.*

TxD / P3.1

INT0 / P3.2

INT1 / P3.3 T0 / P3.4 T1 / P3.5

 

 

 

T2EX

T2

 

 

AD0

AD1

AD2

AD3

P1.4

P1.3

P1.2

P1.1 /

P1.0 /

N.C.*

CC

P0.0 /

P0.1 /

P0.2 /

P0.3 /

V

44

43

42

41

40

39

38

37

36

35

34

1

 

 

 

 

 

 

 

 

 

33

2

 

 

 

 

 

 

 

 

 

32

3

 

 

 

 

 

 

 

 

 

31

4

 

 

 

 

 

 

 

 

 

30

5

 

 

 

 

 

 

 

 

 

29

6

 

 

 

 

 

 

 

 

 

28

7

 

 

 

 

 

 

 

 

 

27

8

 

 

 

 

 

 

 

 

 

26

9

 

 

 

 

 

 

 

 

 

25

10

 

 

 

 

 

 

 

 

 

24

11

 

 

 

 

 

 

 

 

 

23

12

13

14

15

16

17

18

19

20

21

22

WR / P3.6

RD / P3.7

XTAL2

XTAL1

SS

N.C.*

P2.0 / A8

P2.1 / A9

P2.2 / A10

P2.3 / A11

P2.4 / A12

V

P0.4 / AD4

P0.5 / AD5

P0.6 / AD6

P0.7 / AD7

EA / VPP

N.C.*

ALE / PROG

PSEN P2.7 / A15 P2.6 / A14 P2.5 / A13

N.C.: Do not connect.

4

Jan. 2001 Ver 1.0

GMS90X5XC Series

HYUNDAI MicroElectronics

Logic Symbol

VCC VSS

 

XTAL1

 

 

 

 

 

 

 

 

 

 

 

 

 

Port 0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

XTAL2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8-bit Digital I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RESET

 

 

 

 

 

 

 

 

 

 

 

 

8-bit Digital I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port 2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8-bit Digital I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EA/VPP

 

 

 

 

 

 

 

 

 

 

 

 

Port 3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ALE/PROG

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8-bit Digital I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PSEN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Jan. 2001 Ver 1.0

5

HYUNDAI MicroElectronics GMS90X5XC Series

PIN DEFINITIONS AND FUNCTIONS

 

 

Pin Number

 

Input/

 

 

 

 

 

 

 

Symbol

 

 

 

 

 

 

 

 

 

 

 

Function

PLCC-

 

PDIP-

 

MQFP-

Output

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

44

 

40

 

44

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

P1.0-P1.7

2-9

 

1-8

 

40-44,

I/O

Port1

 

 

 

 

 

 

1-3

 

Port 1 is an 8-bit bidirectional I/O port with internal

 

 

 

 

 

 

 

pull-ups. Port 1 pins that have 1s written to them are

 

 

 

 

 

 

 

pulled high by the internal pull-up resistors and can be

 

 

 

 

 

 

 

used as inputs. As inputs, port 1 pins that are

 

 

 

 

 

 

 

externally pulled low will source current because of

 

 

 

 

 

 

 

the pulls-ups (IIL, in the DC characteristics). Pins P1.0

 

 

 

 

 

 

 

and P1.1 also. Port1 also receives the low-order

 

 

 

 

 

 

 

address byte during program memory verification.

 

 

 

 

 

 

 

Port1 also serves alternate functions of Timer 2.

 

2

 

1

 

40

 

P1.0 / T2 :Timer/counter 2 external count input

 

3

 

2

 

41

 

P1.1 / T2EX :Timer/counter 2 trigger input

 

 

 

 

 

 

 

In GMS90X52C/54C:

 

2

 

1

 

40

 

P1.0 / T2, Clock Out : Timer/counter 2 external count

 

 

 

 

 

 

 

input, Clock Out

 

 

 

 

 

 

 

 

 

P3.0-P3.7

11,

 

10-17

 

5, 7-13

I/O

Port 3

 

 

13-19

 

 

 

 

 

Port 3 is an 8-bit bidirectional I/O port with internal

 

 

 

 

 

 

 

pull-ups. Port 3 pins that have 1s written to them are

 

 

 

 

 

 

 

pulled high by the internal pull-up resistors and can be

 

 

 

 

 

 

 

used as inputs. As inputs, port 3 pins that are

 

 

 

 

 

 

 

externally pulled low will source current because of

 

 

 

 

 

 

 

the pulls-ups (IIL, in the DC characteristics). Port 3 also

 

 

 

 

 

 

 

serves the special features of the 80C51 family, as

 

 

 

 

 

 

 

listed below.

 

 

11

 

10

 

5

 

P3.0 / RxD

receiver data input (asynchronous) or

 

 

 

 

 

 

 

 

 

 

 

 

 

data input output(synchronous) of serial

 

 

 

 

 

 

 

 

 

 

 

 

 

interface 0

 

13

 

11

 

7

 

P3.1 / TxD

transmitter data output (asynchronous)

 

 

 

 

 

 

 

 

 

 

 

 

 

or clock output (synchronous) of the

 

 

 

 

 

 

 

 

 

 

 

 

 

serial interface 0

 

14

 

12

 

8

 

P3.2 /

INT0

 

interrupt 0 input/timer 0 gate control

 

15

 

13

 

9

 

P3.3 / INT1

interrupt 1 input/timer 1 gate control

 

16

 

14

 

10

 

P3.4 /T0

counter 0 input

 

17

 

15

 

11

 

P3.5 /T1

counter 1 input

 

18

 

16

 

12

 

P3.6 /

WR

 

the write control signal latches the data

 

 

 

 

 

 

 

 

 

 

 

 

 

byte from port 0 into the external data

 

 

 

 

 

 

 

 

 

 

 

 

 

memory

 

19

 

17

 

13

 

P3.7

/RD

 

the read control signal enables the

 

 

 

 

 

 

 

 

 

 

 

 

 

external data memory to port 0

 

 

 

 

 

 

 

 

 

XTAL2

20

 

18

 

14

O

XTAL2

 

 

 

 

 

 

 

 

Output of the inverting oscillator amplifier.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

Jan. 2001 Ver 1.0

GMS90X5XC Series

 

 

 

HYUNDAI MicroElectronics

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin Number

 

Input/

 

 

 

Symbol

 

 

 

 

 

 

Function

PLCC-

 

PDIP-

 

MQFP-

Output

 

 

 

 

 

 

 

 

 

 

 

 

44

 

40

 

44

 

 

 

 

 

 

 

 

 

 

 

 

XTAL1

21

 

19

 

15

I

XTAL1

 

 

 

 

 

 

 

 

 

Input to the inverting oscillator amplifier and input to

 

 

 

 

 

 

 

 

 

the internal clock generator circuits.To drive the

 

 

 

 

 

 

 

 

 

device from an external clock source, XTAL1 should

 

 

 

 

 

 

 

 

 

be driven, while XTAL2 is left unconnected. There are

 

 

 

 

 

 

 

 

 

no requirements on the duty cycle of the external

 

 

 

 

 

 

 

 

 

clock signal, since the input to the internal clocking

 

 

 

 

 

 

 

 

 

circuitry is divided down by a divide-by-two flip-flop.

 

 

 

 

 

 

 

 

 

Minimum and maximum high and low times as well as

 

 

 

 

 

 

 

 

 

rise fall times specified in the AC characteristics must

 

 

 

 

 

 

 

 

 

be observed.

 

 

 

 

 

 

 

 

P2.0-P2.7

24-31

 

21-28

 

18-25

I/O

Port 2

 

 

 

 

 

 

 

 

 

Port 2 is an 8-bit bidirectional I/O port with internal

 

 

 

 

 

 

 

 

 

pull-ups. Port 2 pins that have 1s written to them are

 

 

 

 

 

 

 

 

 

pulled high by the internal pull-up resistors and can be

 

 

 

 

 

 

 

 

 

used as inputs. As inputs, port 2 pins that are

 

 

 

 

 

 

 

 

 

externally pulled low will source current because of

 

 

 

 

 

 

 

 

 

the pulls-ups (IIL, in the DC characteristics).Port 2

 

 

 

 

 

 

 

 

 

emits the high-order address byte during fetches from

 

 

 

 

 

 

 

 

 

external program memory and during accesses to

 

 

 

 

 

 

 

 

 

external data memory that use 16-bit addresses

 

 

 

 

 

 

 

 

 

(MOVX @DPTR). In this application it uses strong

 

 

 

 

 

 

 

 

 

internal pull-ups when emitting 1s. During accesses to

 

 

 

 

 

 

 

 

 

external data memory that use 8-bit addresses

 

 

 

 

 

 

 

 

 

(MOVX @Ri), port 2 emits the contents of the P2

 

 

 

 

 

 

 

 

 

special function register.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PSEN

 

32

 

29

 

26

O

The Program Store Enable

 

 

 

 

 

 

 

 

 

The read strobe to external program memory when

 

 

 

 

 

 

 

 

 

the device is executing code from the external

 

 

 

 

 

 

 

 

 

program memory. PSEN is activated twice each

 

 

 

 

 

 

 

 

 

machine cycle, except that two PSEN activations are

 

 

 

 

 

 

 

 

 

skipped during each access to external data memory.

 

 

 

 

 

 

 

 

 

PSEN is not activated during fetches from internal

 

 

 

 

 

 

 

 

 

program memory.

 

 

 

 

 

 

 

 

RESET

10

 

9

 

4

I

RESET

 

 

 

 

 

 

 

 

 

A high level on this pin for two machine cycles while

 

 

 

 

 

 

 

 

 

the oscillator is running resets the device. An internal

 

 

 

 

 

 

 

 

 

diffused resistor to VSS permits power-on reset using

 

 

 

 

 

 

 

 

 

only an external capacitor to VCC.

Jan. 2001 Ver 1.0

7

HYUNDAI MicroElectronics

 

 

 

GMS90X5XC Series

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin Number

 

Input/

 

 

 

 

 

Symbol

 

 

 

 

 

 

Function

 

PLCC-

 

PDIP-

 

MQFP-

Output

 

 

 

 

 

 

 

 

 

 

 

 

 

44

 

40

 

44

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

The Address Latch Enable /

 

 

 

ALE /

33

 

30

 

27

O

Program pulse

 

 

PROG

 

 

 

 

 

 

Output pulse for latching the low byte of the address

 

 

 

 

 

 

 

 

 

during an access to external memory. In normal

 

 

 

 

 

 

 

 

 

operation, ALE is emitted at a constant rate of 1/6 the

 

 

 

 

 

 

 

 

 

oscillator frequency, and can be used for external

 

 

 

 

 

 

 

 

 

timing or clocking. Note that one ALE pulse is skipped

 

 

 

 

 

 

 

 

 

during each access to external data memory. This pin

 

 

 

 

 

 

 

 

 

is also the program pulse input (PROG) during

 

 

 

 

 

 

 

 

 

EPROM programming.

 

 

 

 

 

 

 

 

 

If desired, ALE operation can be disabled by setting

 

 

 

 

 

 

 

 

 

bit 0 of SFR location 8EH. With this bit set, the pin is

 

 

 

 

 

 

 

 

 

weakly pulled high. The ALE disable feature will be

 

 

 

 

 

 

 

 

 

terminated by reset. Setting the ALE-disable bit has

 

 

 

 

 

 

 

 

 

no affect if the microcontroller is in external execution

 

 

 

 

 

 

 

 

 

mode.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

/ VPP

35

 

31

 

29

I

External Access Enable / Program Supply Voltage

 

EA

 

 

 

 

 

 

 

 

 

 

 

EA must be external held low to enable the device to

 

 

 

 

 

 

 

 

 

fetch code from external program memory locations

 

 

 

 

 

 

 

 

 

0000H to FFFFH. If EA is held high, the device

 

 

 

 

 

 

 

 

 

executes from internal program memory unless the

 

 

 

 

 

 

 

 

 

program counter contains an address greater than its

 

 

 

 

 

 

 

 

 

internal memory size. This pin also receives the

 

 

 

 

 

 

 

 

 

12.75V programming supply voltage (VPP) during

 

 

 

 

 

 

 

 

 

EPROM programming.

 

 

 

 

 

 

 

 

 

Note;

however, that if any of the Lock bits are

 

 

 

 

 

 

 

 

 

 

programmed, EA will be internally

 

 

 

 

 

 

 

 

 

 

latched on reset.

 

 

 

 

 

 

 

 

 

 

 

P0.0-P0.7

36-43

 

32-39

 

30-37

I/O

Port 0

 

 

 

 

 

 

 

 

 

 

 

 

Port 0 is an 8-bit open-drain bidirectional I/O port.

 

 

 

 

 

 

 

 

 

Port 0 pins that have 1s written to them float and can

 

 

 

 

 

 

 

 

 

be used as high-impedance inputs.

 

 

 

 

 

 

 

 

 

Port 0 is also the multiplexed low-order address and

 

 

 

 

 

 

 

 

 

data bus during accesses to external program and

 

 

 

 

 

 

 

 

 

data memory. In this application it uses strong internal

 

 

 

 

 

 

 

 

 

pull-ups when emitting 1s. Port 0 also outputs the

 

 

 

 

 

 

 

 

 

code bytes during program verification in the

 

 

 

 

 

 

 

 

 

GMS97X5X. External pull-up resistors are required

 

 

 

 

 

 

 

 

 

during program verification.

 

 

 

 

 

 

 

 

 

 

VSS

22

 

20

 

16

-

Circuit ground potential

 

 

 

 

 

 

 

 

 

 

VCC

44

 

40

 

38

-

Supply terminal for all operating modes

 

N.C.

1,12

 

-

 

6,17

-

No connection

 

 

 

23,34

 

 

 

28,39

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

Jan. 2001 Ver 1.0

GMS90X5XC Series

HYUNDAI MicroElectronics

FUNCTIONAL DESCRIPTION

The GMS90X5XC series is fully compatible to the standard 8051 microcontroller family.

It is compatible with the general 8051 family. While maintaining all architectural and operational characteristics of the general 8051 family.

Figure 1 shows a block diagram of the GMS90X5XC series

 

XTAL1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RAM

 

 

 

ROM/EPROM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

XTAL2

 

 

 

 

 

OSC & TIMING

 

 

 

 

128/256×8

 

 

 

 

 

4K/8K/16K

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RESET

 

 

 

 

 

 

 

 

 

CPU

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EA/VPP

 

 

 

 

 

 

 

 

Timer 0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port 0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port 0

 

 

 

 

 

 

 

 

ALE/PROG

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8-bit Digit. I/O

 

 

PSEN

 

 

 

 

 

 

 

 

 

 

 

Timer 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8-bit Digit. I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Timer 2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port 2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port 2

 

 

 

 

8-bit Digit. I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

Interrupt Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port 3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port 3

 

 

 

 

8-bit Digit. I/O

 

 

 

 

 

 

 

 

 

 

 

 

Serial Channel

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 1. Block Diagram of the GMS90X5XC series

Jan. 2001 Ver 1.0

9

HYUNDAI MicroElectronics

GMS90X5XC Series

CPU

The GMS90X5XC series is efficient both as a controller and as an arithmetic processor. It has extensive facilities for binary and BCD arithmetic and excels in its bit-handling capabilities. Efficient use of program memory results from an instruction set consisting of 44% one-byte, 41% two-byte, and 15% three-byte instructions. With a 12 MHz crystal, 58% of the instructions are executed in 1.0μs (40MHz: 300ns).

Special Function Register PSW

 

MSB

 

 

 

 

 

 

LSB

 

Bit No.

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

Addr. D0H

CY

AC

F0

RS1

RS0

OV

F1

P

PSW

 

 

 

 

 

 

 

 

 

 

Bit

 

Function

 

 

 

CY

 

Carry Flag

 

 

 

AC

 

Auxiliary Carry Flag (for BCD operations)

 

 

 

F0

 

General Purpose Flag

 

 

 

RS1

RS0

Register Bank select control bits

0

0

Bank 0 selected, data address 00H - 07H

0

1

Bank 1 selected, data address 08H - 0FH

1

0

Bank 2 selected, data address 10H - 17H

1

1

Bank 3 selected, data address 18H - 1FH

OV

 

Overflow Flag

 

 

 

F1

 

General Purpose Flag

 

 

 

P

 

Parity Flag

 

 

Set/cleared by hardware each instruction cycle to indicate an odd/even

 

 

number of "one" bits in the accumulator, i.e. even parity.

 

 

 

Reset value of PSW is 00H.

10

Jan. 2001 Ver 1.0

GMS90X5XC Series

HYUNDAI MicroElectronics

SPECIAL FUNCTION REGISTERS

All registers, except the program counter and the four general purpose register banks, reside in the special function register area.

The 28 special function registers (SFR) include pointers and registers that provide an interface between the CPU and the other on-chip peripherals. There are also 128 directly addressable bits within the SFR area.

All SFRs are listed in Table 1, Table 2, and Table 3.

In Table 1 they are organized in numeric order of their addresses. In Table 2 they are organized in groups which refer to the functional blocks of the GMS90X5XC series. Table 3 illustrates the contents of the SFRs

Table 1. Special Function Registers in Numeric Order of their Addresses (cont’d)

Address

Register

Contents after

 

Address

Register

Contents after

Reset

 

Reset

 

 

 

 

 

 

 

 

 

 

 

 

80H

P0 1)

FFH

 

88H

TCON 1)

00H

81H

SP

07H

 

89H

TMOD

00H

82H

DPL

00H

 

8AH

TL0

00H

83H

DPH

00H

 

8BH

TL1

00H

84H

reserved

XXH 2)

 

8CH

TH0

00H

85H

reserved

XXH 2)

 

8DH

TH1

00H

86H

reserved

XXH 2)

 

8EH

AUXR0

XXH 2)

87H

PCON

0XXX0000B 2)

 

8FH

CKCON

XXXXXXX0B 2)

90H

P1 1)

FFH

 

98H

SCON 1)

00H

91H

reserved

00H

 

99H

SBUF

XXH 2)

92H

reserved

XXH 2)

 

9AH

reserved

XXH 2)

93H

reserved

XXH 2)

 

9BH

reserved

XXH 2)

94H

reserved

XXH 2)

 

9CH

reserved

XXH 2)

95H

reserved

XXH 2)

 

9DH

reserved

XXH 2)

96H

reserved

XXH 2)

 

9EH

reserved

XXH 2)

97H

reserved

XXH 2)

 

9FH

reserved

XXH 2)

A0H

P2 3)

FFH

 

A8H

IE 1)

0X000000B 2)

A1H

reserved

XXH 2)

 

A9H

reserved

XXH 2)

A2H

reserved

XXH 2)

 

AAH

reserved

XXH 2)

A3H

reserved

XXH 2)

 

ABH

reserved

XXH 2)

A4H

reserved

XXH 2)

 

ACH

reserved

XXH 2)

A5H

reserved

XXH 2)

 

ADH

reserved

XXH 2)

A6H

reserved

XXH 2)

 

AEH

reserved

XXH 2)

A7H

reserved

XXH 2)

 

AFH

reserved

XXH 2)

B0H

P3 1)

FFH

 

B8H

IP 1)

XX000000B 2)

B1H

reserved

XXH 2)

 

B9H

reserved

XXH 2)

B2H

reserved

XXH 2)

 

BAH

reserved

XXH 2)

B3H

reserved

XXH 2)

 

BBH

reserved

XXH 2)

B4H

reserved

XXH 2)

 

BCH

reserved

XXH 2)

B5H

reserved

XXH 2)

 

BDH

reserved

XXH 2)

B6H

reserved

XXH 2)

 

BEH

reserved

XXH 2)

B7H

reserved

XXH 2)

 

BFH

reserved

XXH 2)

Jan. 2001 Ver 1.0

11

HYUNDAI MicroElectronics

GMS90X5XC Series

Table 1. Special Function Registers in Numeric Order of their Addresses (cont’d)

Address

Register

Contents after

 

Address

Register

Contents after

Reset

 

Reset

 

 

 

 

 

 

 

 

 

 

 

 

C0H

reserved

XX

 

C8H 3)

T2CON 1)

00H

 

H

 

 

 

 

C1H

reserved

XXH 2)

 

C9H 4)

T2MOD

XXXXXX00B 2)

C2H

reserved

XXH 2)

 

CAH 3)

RC2L

00H

C3H

reserved

XXH 2)

 

CBH 3)

RC2H

00H

C4H

reserved

XXH 2)

 

CCH 3)

TL2

00H

C5H

reserved

XXH 2)

 

CDH 3)

TH2

00H

C6H

reserved

XXH 2)

 

CEH

reserved

XXH 2)

C7H

reserved

XXH 2)

 

CFH

reserved

XXH 2)

D0H

PSW 1)

FFH

 

D8H

reserved

XXH 2)

D1H

reserved

XXH 2)

 

D9H

reserved

XXH 2)

D2H

reserved

XXH 2)

 

DAH

reserved

XXH 2)

D3H

reserved

XXH 2)

 

DBH

reserved

XXH 2)

D4H

reserved

XXH 2)

 

DCH

reserved

XXH 2)

D5H

reserved

XXH 2)

 

DDH

reserved

XXH 2)

D6H

reserved

XXH 2)

 

DEH

reserved

XXH 2)

D7H

reserved

XXH 2)

 

DFH

reserved

XXH 2)

E0H

ACC 1)

00H

 

E8H

reserved

XXH 2)

E1H

reserved

XXH 2)

 

E9H

reserved

XXH 2)

E2H

reserved

XXH 2)

 

EAH

reserved

XXH 2)

E3H

reserved

XXH 2)

 

EBH

reserved

XXH 2)

E4H

reserved

XXH 2)

 

ECH

reserved

XXH 2)

E5H

reserved

XXH 2)

 

EDH

reserved

XXH 2)

E6H

reserved

XXH 2)

 

EEH

reserved

XXH 2)

E7H

reserved

XXH 2)

 

EFH

reserved

XXH 2)

F0H

B 1)

00H

 

F8H

reserved

XXH 2)

F1H

reserved

XXH 2)

 

F9H

reserved

XXH 2)

F2H

reserved

XXH 2)

 

FAH

reserved

XXH 2)

F3H

reserved

XXH 2)

 

FBH

reserved

XXH 2)

F4H

reserved

XXH 2)

 

FCH

reserved

XXH 2)

F5H

reserved

XXH 2)

 

FDH

reserved

XXH 2)

F6H

reserved

XXH 2)

 

FEH

reserved

XXH 2)

F7H

reserved

XXH 2)

 

FFH

reserved

XXH 2)

1)Bit-addressable Special Function Register.

2)X means that the value is indeterminate and the location is reserved.

3)Bit-addressable Special Function Register.

4)These Registers are in the GMS90X52C/54C only.

12

Jan. 2001 Ver 1.0

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