Technical Reference Manual
Hardware and BIOS
HP Vectra VL 5/xxx Series 5
and XA 5/xxx PC
Notice
The information contained in this document is subject to change without notice.
Hewlett-Packard makes no warranty of any kind with regard to this material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose.
Hewlett-Packard shall not be liable for errors contained herein or for incidental or consequential damages in connection with the furnishing, performance, or use of this material.
Hewlett-Packard assumes no responsibility for the use or reliability of its software on equipment that is not furnished by Hewlett-Packard.
This document contains proprietary information that is protected by copyright. All rights are reserved. No part of this document may be photocopied, reproduced, or translated to another language without the prior written consent of Hewlett-Packard Company.
Centronics® is a registered trademark of Centronics Data Computer Corporation.
Matrox® is a registered trademark of Matrox Electronic Systems Ltd. MGATM is a trademark of Matrox Graphics Inc.
Microsoft®, Windows® and MS-DOS® are registered trademarks of Microsoft Corporation.
MMXTM is a trademark of Intel Corporation. NextStepTM is a trademark of Next Incorporated.
Novell® and Netware® are registered trademarks of Novell Inc. OS/2TM is a trademark of International Business Machines Corporation. Pentium® is a registered trademark of Intel Corporation.
SCO UNIX® is a registered trademark of the Santa Cruz Operation. SoundBlasterTM is a trademark of Creative Technology Limited.
Hewlett-Packard France
Commercial Desktop Computing Division
38053 Grenoble Cedex 9
France
ã 1997 Hewlett-Packard Company
Preface
This manual is a technical reference and BIOS document for engineers and technicians providing system level support. It is assumed that the reader possesses a detailed understanding of AT-compatible microprocessor functions and digital addressing techniques.
Technical information that is readily available from other sources, such as manufacturer’s proprietary publications, has not been reproduced.
This manual contains summary information only. For additional reference material, refer to the bibliography, on the next page.
Conventions
The following conventions are used throughout this manual to identify specific numeric elements:
Hexadecimal numbers are identified by a lower case h. For example, 0FFFFFFFh or 32F5h
Binary numbers and bit patterns are identified by a lower case b. For example, 1101b or 10011011b
iii
Bibliography
HP Vectra VL 5/xxx Series 5 User’s Guide (D4550-90001).
HP Vectra VL 5/xxx Series 5 Minitower User’s Guide (D4570-90001).
HP Vectra XA 5/xxx User’s Guide (D3984-90001).
HP Vectra XA 5/xxx Minitower User’s Guide (D3985-90001).
HP Vectra VL 5/xxx Series 5 PC Familiarization Guide (D4550-90901).
HP Vectra XA 5/xxx PC Familiarization Guide (D3984-90901).
HP Network Administrator’s Guide (online).
HP Vectra Accessories Service Handbook - 7th edition
(5965-4074).
HP Vectra PC Service Handbook (Volume 1) - 11th edition
(5965-4075).
HP Support Assistant CD-ROM (by subscription).
The following Intel® publications provide more detailed information:
Pentium Microprocessor Data Sheet (241595-002)
iv
Contents
Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii Conventions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii Bibliography. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv
1 System Overview
Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Desktop Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Minitower Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Plan view of the Chassis Base of the Desktop Package . . . . . . . . . . . . . 12
Specifications and Characteristic Data . . . . . . . . . . . . . . . . . . . . . . . 13
Status Panel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Physical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Environmental Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Electrical Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Where to Find the Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2 System Board
System Board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Architectural View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Chip-Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
PL/PCI Bridge Chip (82439HX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 PCI/ISA Bridge Chip (82371SB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Super I/O Chip (37C932) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Backplane boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
v
Contents
Devices on the Processor-Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . |
30 |
The Intel Pentium Microprocessor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
30 |
Cache Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
32 |
Main Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
32 |
Devices on the PCI Bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
34 |
Integrated Drive Electronics (IDE). . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
34 |
Universal Serial Bus (USB) Controller . . . . . . . . . . . . . . . . . . . . . . . . . . |
36 |
Devices on the ISA Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
37 |
Super I/O Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
37 |
Little Ben . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
40 |
Other PCI and ISA Accessory Devices Under Plug and Play . . . . . . . . . |
40 |
3 Interface Devices and Mass-Storage Drives
S3 Trio 64V2 Graphics Controller Chip . . . . . . . . . . . . . . . . . . . . . . . . 42
Video Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Video Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Available Video Resolutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Matrox MGA Millennium Graphics Controller Board. . . . . . . . . . . . 48
Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Video Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Available Video Resolutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Video BIOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
HP Ethernet 10/100 BaseT Network Board . . . . . . . . . . . . . . . . . . . . 52 HP Enhanced Ethernet Network Board . . . . . . . . . . . . . . . . . . . . . . . 54 Audio Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
vi
Contents
Mass-Storage Drives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Hard Disk Drives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Flexible Disk Drives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
CD-ROM Drives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Connectors and Sockets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
4 Summary of the HP/Phoenix BIOS
HP/Phoenix BIOS Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Setup Program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Main Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Configuration Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Security Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Power Menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Power Saving and Ergonometry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Power-On from Space-Bar . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Soft Power Down. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 HP Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Remote Power-On (RPO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Advanced Power Management (APM). . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Desktop Management Interface (DMI) . . . . . . . . . . . . . . . . . . . . . . . . . . 78 HP Lock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
BIOS Addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
System Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Product Identification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 HP I/O Port Map (I/O Addresses Used by the System). . . . . . . . . . . . . . 80
vii
Contents
5 Power-On Self-Test and Error Messages
Order in Which the Tests are Performed . . . . . . . . . . . . . . . . . . . . . . 86 Error Message Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 Beep Codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Lights on the Status Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
viii
1
System Overview
This manual describes the HP Vectra VL 5/xxx Series 5 and XA 5/xxx PC, and provides detailed system specifications.
This chapter introduces the external features, and lists the specifications and characteristic data of the system. It also summarizes the documentation which is available.
9
1 System Overview
Package
Package
Desktop Package
Front view of VL
Front logo does
not show processor speed or series information
|
Model |
VL 5/200 series 5 |
Wty: WBK@ |
Prod: |
D4570A #ABU |
Sup: SAB@ |
S/N: |
FR63412345 |
|
|
|
Product information appears on a label on the lower front recess or the right hand side panel
Rear view of XA
Network connectors: 100 BaseT supports Remote Wake-Up
(RWU) only.
10 BaseT supports Remote Power-On (RPO) as well as RWU.
Front label does not show processor |
|
speed or series information. Instead |
|
this information appears on a label |
2 USB |
on the lower front recess (desktop |
|
models) or on the right hand side |
|
panel (minitower models). |
|
Inside view of VL
10
1 System Overview
Package
Minitower Package
Rear view of XA
Line
In
Mic
In
Line
Out
Spkr
Out
Front label does not show processor speed or series information. Instead this information appears on a label on the right hand side panel
|
Model |
XA 5/200 |
Wty: WBK@ |
Prod: |
D3993A #ABA |
Sup: SAB@ |
S/N: |
FR63498765 |
|
|
|
Voltage selection |
Power connector |
Inside view of VL
11
1 System Overview
Package
Plan view of the Chassis Base of the Desktop Package
The above illustrations shows a plan view of the desktop model, seen from above. All dimensions are in millimeters.
The mounting holes for the second hard disk (95.20 44.45 mm), and those for mounting the computer on a solid surface (275.00 210.00 mm), are indicated.
12
1 System Overview
Specifications and Characteristic Data
Specifications and Characteristic Data
Status Panel
HP Vectra VL 5/xxx |
HP Vectra VL 5/xxx MT or |
Cover lock on back panel |
HP Vectra XA 5/xxx MT |
RESET |
HP Vectra XA 5/xxx
Cover lock on back panel
Multimedia control panel on front
Physical Characteristics
System Processing Unit
|
Desktop |
Minitower |
|
|
|
Weight |
9 kg (20 lbs) |
15 kg (33 lbs) |
|
|
|
Dimensions |
39 cm (D) by 42 cm (W) by 12.5 cm (H) |
40.5 cm (D) by 21 cm (W) by 41.5 cm (H) |
|
15.3 inches by 16.5 inches by 4.9 inches |
16.0 inches by 8.3 inches by 16.3 inches |
|
|
|
Footprint |
0.17 m2 (1.8 sq ft) |
0.085 m2 (0.91 sq ft) |
|
Keyboard |
|
|
Flat |
464 mm (W) by 178 mm (D) by 33 mm (H) (18.3 inches by 7 inches by 1.3 inches) |
|
|
Standing |
464 mm (W) by 178 mm (D) by 51 mm (H) (18.3 inches by 7 inches by 2 inches) |
|
|
13
1 System Overview
Specifications and Characteristic Data
Environmental Specification
System Processing Unit with a Hard Disk
Typical power consumption |
30 W to 40 W (before installing any customer-specific accessories) |
|
|
|
|
Acoustic noise emission |
less than 40 dB in the workplace under normal conditions as |
|
|
defined by DIN 45635 T.19 and ISO 7779 |
|
|
|
|
Operating temperature |
+5°C to +40°C |
(+40°F to 104° F) |
|
|
|
Recommended operating temperature |
+15°C to +40°C |
(+59°F to +104°F) |
|
|
|
Storage temperature |
-40°C to +70°C |
(-40°F to +158°F) |
|
|
|
Over temperature shutdown |
+50°C |
(+122°F) |
|
|
|
Operating humidity |
15% to 80% RH (non-condensing) |
|
|
|
|
Storage humidity |
8% to 80% RH (non-condensing) |
|
|
|
|
Operating altitude |
3100 m max |
(10000 ft max) |
|
|
|
Storage altitude |
4600 m max |
(15000 ft max) |
|
|
|
Operating temperature and humidity ranges may vary depending upon the mass storage devices installed. High humidity levels can cause improper operation of disk drives. Low humidity levels can aggravate static electricity problems and cause excessive wear of the disk surface.
14
1 System Overview
Specifications and Characteristic Data
Electrical Specification
For the desktop models:
|
Limit for the Power |
|
Limit per PCI |
Limit per ISA |
|
Parameter |
Notes |
Accessory |
Accessory |
||
Supply |
|||||
|
|
Slot |
Slot |
||
|
|
|
|||
|
|
|
|
|
|
Input voltage |
100-127, 200-240 Vac |
Auto-ranging |
— |
— |
|
|
|
|
|
|
|
Input voltage range |
90-264 Vac |
|
— |
— |
|
|
|
|
|
|
|
Input current (max) |
3 A |
|
— |
— |
|
|
|
|
|
|
|
Input power (max) |
150 W |
|
— |
— |
|
|
|
|
|
|
|
Input power (typical1) |
< 44 W |
Fully-on mode |
— |
— |
|
|
< 29 W |
Standby mode |
|
|
|
|
< 24 W |
Suspend mode |
|
|
|
|
< 5 W |
Off (but plugged) |
|
|
|
|
|
|
|
|
|
Input frequency |
45 Hz to 66 Hz |
|
— |
— |
|
|
|
|
|
|
|
Available power |
100 W (continuous) |
|
25 W (max) |
7 W (max) |
|
|
|
|
|
|
|
Max current at +5 V |
13.5 A |
Together, these |
4.5 A |
4.5 A |
|
|
|
two must not |
|
|
|
Max current at +3.3 V |
6 A |
— |
— |
||
exceed 13.5 A |
|||||
|
|
|
|
||
|
|
|
|
|
|
Max current at -5 V |
0.1 A |
|
— |
0.1 A |
|
|
|
|
|
|
|
Max current at +12 V |
4.5 A |
|
1.5 A |
0.5 A |
|
|
|
|
|
|
|
Max current at -12 V |
0.3 A |
|
0.1 A |
0.3 A |
|
|
|
|
|
|
|
Input power (when |
Less than 5 W |
|
When the PC is Off, but still |
||
turned Off) |
|
|
plugged in, an independent mini |
||
|
|
|
power supply keeps the network |
||
Available power |
0.25 W |
|
|||
|
board active enough to watch out |
||||
(when Off) |
|
|
|||
|
|
for the “Remote Power-On” (RPO) |
|||
|
|
|
|||
Available current |
0.05 A |
|
signal (see page 71 for |
||
(when Off) |
|
|
description) |
|
|
|
|
|
|
|
1.Dependant on operating system and PC configuration
15
1 System Overview
Specifications and Characteristic Data
For the minitower models:
|
Limit for the Power |
|
Limit per PCI |
Limit per ISA |
||||
Parameter |
Notes |
Accessory |
Accessory |
|||||
Supply |
|
|||||||
|
|
|
Slot |
Slot |
||||
|
|
|
|
|
|
|||
|
|
|
|
|
|
|||
Input voltage |
100-127 |
|
200-240 |
Switch selectable |
|
|
||
|
Vac |
|
|
Vac |
|
|
|
|
|
|
|
|
|
|
|
||
Input voltage range |
90-140 |
|
180-264 |
|
|
|
||
|
Vac |
|
|
Vac |
|
|
|
|
|
|
|
|
|
|
|
|
|
Input current (max) |
5 A |
|
|
3 A |
|
|
|
|
|
|
|
|
|
|
|
||
Input power (max) |
200 W |
|
|
|
|
|||
|
|
|
|
|
|
|||
Input power (typical1) |
< 44 W |
|
Fully-on mode |
— |
— |
|||
|
< 29 W |
|
Standby mode |
|
|
|||
|
< 24 W |
|
Suspend mode |
|
|
|||
|
< 5 W |
|
Off (but plugged) |
|
|
|||
|
|
|
|
|
||||
Input frequency |
45 Hz to 66 Hz |
|
|
|
||||
|
|
|
|
|
||||
Available power |
160 W (continuous) |
|
25 W (max) |
7 W (max) |
||||
|
|
|
|
|
|
|
||
Max current at +5 V |
|
20 A |
|
Together, these |
4.5 A |
4.5 A |
||
|
|
|
|
|
two must not |
|
|
|
Max current at +3.3 V |
|
12 A |
|
— |
— |
|||
|
|
exceed 20 A |
||||||
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|||
Max current at -5 V |
0.2 A |
|
— |
— |
0.1 A |
|||
|
|
|
|
|
|
|||
Max current at +12 V |
4.4 A |
|
— |
1.5 A |
0.5 A |
|||
|
|
|
|
|
|
|||
Max current at -12 V |
0.5 A |
|
— |
0.1 A |
0.3 A |
|||
|
|
|
|
|
|
|||
Max current at +5 Vst |
0.05 A |
|
— |
— |
— |
|||
|
|
|
|
|
|
|
|
1.Dependant on operating system and PC configuration
When the computer is turned off, but left plugged in at the mains, the power consumption falls below 5 watts, but is not zero. A small trickle current continues to flow, supplying power to the CMOS memory, considerably extending the lifetime of the on-board battery.
If the computer is completely unplugged from the mains, the real time clock continues to operate, from the charge stored in the battery.
16
1 System Overview
Documentation
Documentation
The table below summarizes the availability of documentation that is appropriate to the HP Vectra VL and XA 5/xxx PCs. Three dots, ‘...’, are used to indicate ‘VL’ or ‘XA’, as appropriate. Only selected publications are available on paper. Most are available as printable files from the HP division support servers, and as viewable files (which can also be printed) on the
HP Support Assistant CD-ROM.
|
Division Support Server |
Support Assistant CD-ROM |
Paper-based |
||||||
|
|
|
|
|
|
|
|
|
|
Line of HP Vectra 6/xxx: |
VL |
|
XA |
VL |
|
XA |
VL |
|
XA |
|
|
|
|
|
|
|
|
|
|
HP Vectra ... 5/xxx User’s Guide |
PDF file |
|
PDF file |
PDF file |
|
PDF file |
DT: D4550A |
|
DT: D3984A |
|
|
|
|
|
|
|
MT: D4570A |
|
MT: D3985A |
|
|
|
|
|
|
|
|
|
|
HP Vectra ... 5/xxx |
PDF file |
|
PDF file |
PDF file |
|
PDF file |
D4550-90901 |
|
D3984-90901 |
Familiarization Guide |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
HP Vectra VL and XA 5/xxx |
|
PDF file |
|
PDF file |
|
no |
|||
Technical Reference Manual |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
HP Vectra PC Service |
PDF file |
|
PDF file |
PDF file |
|
PDF file |
5965-4075 |
||
Handbook (Vol 1, 11th Edition) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
HP Vectra Accessory Service |
|
PDF file |
|
PDF file |
5965-4074 |
||||
Handbook (7th Edition) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
Network Administrators Guide |
|
PDF file |
|
PDF file |
|
no |
|||
|
|
|
|
|
|
|
|
|
|
Each PDF file (portable document format) can be viewed on the screen by opening the file with Acrobat Reader. You can use the page-up, page-down, goto page, search string functions to read the document on the screen.
(Note, though, that there is difference between the page number that is printed on the page, and the page number that Acrobat Reader indicates, because of the presence of the front matter pages). To print the document, press Ctrl+P whilst you have the document on the screen.
17
1 System Overview
Documentation
Where to Find the Information
The following table summarizes the availability of information within the
HP Vectra VL and XA 5/xxx PC documentation set.
|
|
|
|
|
Familiarization |
Service |
Technical |
|
|
User Guide |
|
User Online |
Reference |
||
|
|
|
Guide |
Handbook |
|||
|
|
|
|
|
Manual |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Introducing the computer |
|
|
|
Product features |
Key features |
|
Exploring |
New features |
Exploded view |
Key features |
|
|
|
|
|
|
|
Parts list |
|
|
|
|
|
|
|
|
|
Product model numbers |
|
|
|
|
|
Product range |
|
|
|
|
|
|
|
CPL dates |
|
|
|
|
|
|
|
|
|
|
|
|
|
Using the computer |
|
|
|
|
|
|
|
|
|
|
|
Connecting cables and |
Keyboard, mouse, display, |
|
|
|
|
|
|
turning on |
network, printer, power |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Finding on-line |
Finding READ.MEs and on- |
|
|
|
|
|
|
information |
line documentation |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Environmental |
|
|
|
Working in |
|
|
System overview |
|
|
|
|
comfort |
|
|
|
|
|
|
|
|
|
|
|
Formal documents |
Software license agreement |
|
S/w license |
|
|
|
|
|
Warranty information |
|
agreement |
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
Upgrading the computer |
|
|
|
|
|
|
|
|
|
|
|
Opening the computer |
Full details |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Supported accessories |
Some part number details |
|
|
|
Full PN details |
|
|
|
|
|
|
|
|
|
|
Replacing accessories |
How to install |
|
|
New procedures |
|
|
|
|
|
|
|
|
|
|
|
Configuring devices |
|
|
|
Configuring |
|
|
Problem fixes |
|
|
|
|
peripherals |
|
|
|
|
|
|
|
|
|
|
|
Fields and their options |
|
|
|
|
|
|
Key fields |
within Setup |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Repairing the computer |
|
|
|
|
|
|
|
|
|
|
|
Troubleshooting |
Basic |
|
|
New symptoms |
Service notes |
Advanced |
|
|
|
|
|
|
|
|
|
Technical information |
Basic |
|
Detailed |
|
|
Advanced |
|
|
|
|
|
|
|
|
|
System board |
Jumpers, switches and |
|
|
Jumpers, switches |
Jumpers, |
Jumpers, switches |
|
|
connectors |
|
|
and connectors |
switches and |
and connectors |
|
|
|
|
|
|
How to replace |
connectors |
Chip-set details |
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
BIOS |
Basic details |
|
|
Upgrading |
|
Technical details |
|
|
|
|
|
|
|
|
Memory maps |
|
|
|
|
|
|
|
|
Power-On Self-Test |
Key error codes and |
|
|
|
|
Order of tests |
|
routines (POST) |
suggestions for corrective |
|
|
|
|
Complete list |
|
|
action |
|
|
|
|
||
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
18
2
System Board
The next chapter describes the video, disk, audio and network devices which are supplied with the various models of the computer.
This chapter describes the components of the system board, taking in turn the components of the Processor-Local Bus, the Peripheral Component Interconnect (PCI) bus and the Industry Standard Architecture (ISA) bus.
19
2 System Board
System Board
System Board
HP ASIC
mm 210
Only on some
VL models
280 mm
The video memory, video memory upgrade sockets, graphics controller and display connector are not loaded on any models that are supplied with a Matrox MGA Millennium board in a PCI accessories slot. This includes all models of the HP Vectra XA 5/xxx PC (desktop and minitower), and some models of the HP Vectra VL 5/xxx Series 5 PC (desktop and minitower).
20
2 System Board
Architectural View
Pentium
Processor
Architectural View
Processor-Local Bus |
PCI Bus |
ISA Bus |
(64 bit, 60/66 MHz) |
(32 bit, 30/33 MHz) |
(16 bit, 7.5/8.33 MHz) |
|
|
|
|
|
|
|
|
|
|
82371 SB |
|||
|
|
|
|
|
|
|
|
|
|
PCI/ISA Bridge (PIIX3) |
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Interrupt |
|
DMA |
|
|
|
|
|
|
|
|
|
|
|
controller |
|
controller |
|
Main |
|
Graphics |
|
|
|
|
|
|
|
|
|
|
|
Memory |
|
Controller |
|
|
|
|
|
|
PCI bus |
|
ISA bus |
||
|
|
|
|
|
|
|
|
|
|
interface |
|
interface |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2 USB |
|
2 IDE |
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
controller |
|
controller |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Hard |
|
|
|
82439 HX |
|
|
|
|
|
|
||||||
|
PL/PCI Bridge (TXC) |
|
|
|
|
|
|
disk |
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Memory |
|
Data path |
|
|
|
|
|
|
|
|
|
|
|
|
controller |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Serial |
|
Little Ben |
||
|
PL bus |
|
PCI bus |
|
|
|
|
EEPROM |
|
(HP ASIC) |
||||
|
interface |
|
interface |
|
|
|
|
|
|
|||||
|
|
|
|
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Cache |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
controller |
|
|
|
|
|
|
|
|
37C932 |
||||
|
|
|
|
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
Super I/O |
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Keyboard |
|
Mouse |
||
|
|
|
|
|
|
|
|
|
|
controller |
|
controller |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Parallel |
|
ISA bus |
||
|
Level- |
|
|
|
|
|
|
|
controller |
|
interface |
|||
|
Two |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Cache |
|
|
|
|
|
|
|
2 serial |
|
FDD |
|||
|
|
|
|
|
|
|
|
|
|
controller |
|
Controller |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
System Flexible
ROM disk
21
2 System Board
Chip-Set
Chip-Set
The chip-set comprises three chips. These interface between the three main buses (the Processor-Local bus, the PCI bus and the ISA bus).
• The TXC chip (82439HX) is a combined PL/PCI bridge and cache controller and main memory controller and PCI-to-PL bus data path.
• The PIIX3 chip (82371SB) is a combined PCI/ISA bridge and IDE controller and USB controller.
• The Super I/O chip (37C932) is a combined serial interface and parallel interface and keyboard controller and mouse controller and flexible disk drive controller.
|
The TXC and PIIX3 chips are PCI 2.1 compliant, and provide for PCI |
|
Concurrency. Concurrent data transfers that do not contest for the same |
|
resources (such as processor to memory concurrent with PCI peer to peer, |
|
or processor to ISA device concurrent with PCI device to memory) are |
|
allowed to interleave their transfers more finely than with previous chip |
|
sets. This has little effect on the throughput of the system, but results in a |
|
greatly reduced worst-case latency. This leads to a much smoother |
|
operation of video capture, MPEG clips and audio clips. |
|
To find out more about how this is achieved, the reader is referred to the |
|
Intel documentation on the 82430HX chip set. Relevant key words include: |
|
the multi-transaction timer (MTT), the passive release mechanism, and |
|
the PCI delayed transaction mechanism. |
|
PL/PCI Bridge Chip (82439HX) |
|
The bridge between the Processor Local Bus (PL Bus) and the PCI Bus is |
|
encapsulated in a 324 pin ball grid array (BGA) package. |
PL Bus Interface |
The TXC chip monitors each cycle that is initiated by the processor, and |
|
forwards those to the PCI bus that are not targeted at the local memory. It |
|
translates PL bus cycles into PCI bus cycles. |
|
The chip supports the SMM mode of the Pentium processor, the CPU stop |
|
clock hardware function, and the keyboard lock function. These are used by |
|
the LittleBen chip, as described on page 73. |
22
2 System Board
Chip-Set
PCI Bus Interface |
Sequential PL-to-PCI memory write cycles are translated into PCI zero wait |
|
state burst cycles. The maximum PCI burst transfer can be from 256 bytes to |
|
4 KB. The chip supports advanced snooping for PCI master bursting, and |
|
provides a pre-fetch mechanism dedicated for IDE read. |
|
The PCI arbiter supports PCI bus arbitration for up to four masters using a |
|
rotating priority mechanism. Its hidden arbitration scheme minimizes |
|
arbitration overhead. |
Data Path |
Storage elements are provided for bidirectional data buffering among the 64- |
|
bit PL data bus, the 64/32-bit memory data bus, and the 32-bit PCI address/ |
|
data bus. |
|
There are three FIFO (first-in first-out) queues, and one read buffer for the |
|
bridges of the PL, PCI, and Memory buses. This buffering is used, partly, to |
|
smooth the differences in bandwidths between the three buses, thereby |
|
improving the overall system performance. During bus operations between |
|
the PL, PCI and Memory buses, the chip receives control signals from the |
|
TXC, performs functions such as latching data, forwarding data to |
|
destination bus, data assemble and disassemble. |
|
Error correcting code (ECC) and parity bits are generated for memory |
|
writes, and optional parity checking for memory reads. This operation |
|
always sustains zero wait performance on PL-to-Memory, and always |
|
streams zero wait performance on PCI-to-Memory and Memory-to-PCI. |
|
Whilst accesses to the local memory are in progress, whether it be from the |
|
PL or PCI bus, the TXC maintains control of the secondary cache, DRAMs, |
|
and the datapath. |
Level-2 Cache Memory |
This unit controls the L2 cache memory, adopting a write back policy, in a |
Controller |
direct mapped organization. An 8-bit tag is used to allow the lowermost |
|
64 MB of main memory to be cached (if more than 64 MB of main memory is |
|
installed, accesses to the uppermost regions will be made directly to the main |
|
memory modules, and not via the cache memory mechanism). When a |
|
512 KB cache memory module is installed, the chip set allows provision for |
|
an 11-bit tag to be used to allow 512 MB of main memory to be cached, but |
|
this facility has not been enabled in the HP BIOS. More details on the use of |
|
HP cache memory are given on page 32. |
|
The cache memory line width is 32-bytes (256-bits), four times the width of |
|
the Processor-Local data bus. Reads and writes always involve a full cache |
|
line, and so require four back-to-back cycles on the bus. Since they involve |
23
2 System Board
Chip-Set
accesses to related addresses, they do not need four independent accesses to main memory, but can be organized as a pipelined burst. The second, third and fourth cycles in each burst require less time to complete than the first. This is because the first cycle includes the addressing phase and memory pre-charge timing. The read and write access timing has the pattern 3-1-1-1. However, the timing for 64-byte burst reads can be even better than this (3-1-1-1,2-1-1-1 for a dual bank back-to-back burst read1, and 3-1-1-1,1-1-1-1 for a single bank back-to-back burst read2) provided that the main memory banks have been filled contiguously.
There are two programmable non-cacheable regions, with an option to disable local memory in these regions. A 64 KB to 1 MB cache summary is provided.
Main Memory Controller The main memory controller supports up to 512 MB of main memory (dynamic random access memory, DRAM), arranged in banks of any mixture of memory capacities, provided that each bank contains a pair of identical single interline memory modules (SIMMs). The HP Vectra VL 5/ xxx Series 5 and XA 5/xxx PCs have provision for three banks. With the 32 MB module from HP, this gives a total capacity of 192 MB. With a future 64 MB module from HP, it will give a total capacity of 384 MB.
In the case of 66 MHz PL bus operation, memory accesses have a timing pattern of 5-2-2-2 for a page-hit. This degrades to 8-2-2-2 for a row-miss, and to 11-2-2-2 for a page-miss. When the banks have been filled in an arbitrary order, back-to-back burst reads keep to the 5-2-2-2,5-2-2-2 timing pattern. When the banks have been filled contiguously (bank A, then bank B, then bank C), back-to-back burst reads are improved to a 5-2-2-2,3-2-2-2 timing pattern.
The controller supports relocation of system management memory. It supports a read cycle power saving mode, and a CAS before RAS Intelligent Refresh mode of operation, with a CAS# driving current that is programmable.
The controller is fully configurable for the characteristics of the shadow RAM (640 KB to 1 MB). It supports concurrent write back. To implement the optional error correcting code (ECC) or parity checking, 36-bit SIMMs must be installed exclusively (see page 33 for more details).
1.As used for the HP 512 KB cache memory module.
2.As used for the HP 256 KB cache memory module.
24
2 System Board
Chip-Set
|
PCI/ISA Bridge Chip (82371SB) |
|
This chip is encapsulated in a 208 pin plastic quad flat pack (PQFP) |
|
package. |
PCI Bus Interface |
This part of the chip performs PCI-to-ISA, and ISA-to-PCI bus cycle |
|
translation. It supports the Plug-and-Play mechanism. |
ISA Bus Interface |
As well as accepting cycles from the PCI bus interface, and translating them |
|
for the ISA bus, the ISA bus interface also requests the PCI master bridge to |
|
generate PCI cycles on behalf of a DMA or ISA master. The ISA bus interface |
|
contains a standard ISA bus controller and data buffering logic. It can directly |
|
support six ISA slots without external data or address buffering. |
IDE Controller |
The PCI master/slave IDE controller, supporting four devices, two on each of |
|
two channels, is described on page 34. |
USB Controller |
The PCI USB controller, supporting two connectors, is described on page 36. |
DMA Controller |
The seven channel DMA controller incorporates the functionality of two |
|
82C37 DMA controllers. Channels 0 to 3 are for 8-bit DMA devices, while |
|
channels 5 to 7 are for 16-bit devices (see page 82). The channels can be |
|
programmed for any of the four transfer modes: the three active modes |
|
(single, demand, block), can perform three different types of transfer: read, |
|
write and verify. The address generation circuitry can only support a 24-bit |
|
address for DMA devices. |
Interrupt Controller |
The sixteen channel interrupt controller incorporates the functionality of |
|
two 82C59 interrupt controllers. The two controllers are cascaded, giving 14 |
|
external and two internal interrupt sources (see page 82). |
Counter / Timer |
The chip contains a three-channel 82C54 counter/timer. The counters use a |
|
division of the 14.31818 MHz OSC input as the clock source. |
25
2 System Board
Chip-Set
Super I/O Chip (37C932)
The Super I/O chip (FDC37C932) is contained within a 160-pin PQFP package. The chip provides the control for the following devices.
Function |
Logical device number |
|
|
Flexible disk controller |
0 |
|
|
Parallel port controller |
3 |
|
|
UART1 controller |
4 |
|
|
UART2 controller |
5 |
|
|
RTC |
6 |
|
|
Keyboard controller |
7 |
|
|
Mouse controller |
7 |
|
|
General purpose I/O (GPIO) |
8 |
|
|
Serial / parallel |
The two 9-pin serial ports (whose pin layouts are depicted on page 58) |
communications ports |
support RS-232-C and are buffered by 16550 UARTs, with 16 Byte FIFOs. |
|
They can be programmed as COM1, COM2, COM3, COM4, or disabled. |
|
The 25-pin parallel port (also depicted on page 58) is Centronics |
|
compatible, supporting IEEE 1284. It can be programmed as LPT1, LPT2, or |
|
disabled. It can operate the four modes: |
|
Standard mode (PC/XT, PC/AT, and PS/2 compatible). |
|
Bidirectional mode (PC/XT, PC/AT, and PS/2 compatible). |
|
Enhanced mode (enhanced parallel port, EPP, compatible). |
|
High speed mode (MS/HP extended capabilities port, ECP, compatible). |
FDC |
The integrated flexible drive controller (FDC) supports any combination of |
|
two from the following: tape drives, 3.5-inch flexible disk drives, 5.25-inch |
|
flexible disk drives. It is software and register compatible with the 82077AA, |
|
and 100% IBM compatible. It has an A and B drive-swapping capability and a |
|
non-burst DMA option. |
Keyboard and Mouse |
The computer has an 8042-based keyboard and mouse controller. The |
Controller |
connector pin layouts are shown on page 58. The Windows 95 keyboard is |
26
2 System Board
Chip-Set
|
described on page 37. |
|
RTC |
The real-time clock (RTC) is 146818A-compatible. With an accuracy of |
|
|
20 ppm (parts per million). The configuration RAM is implemented as 256 |
|
|
bytes of CMOS memory. |
|
Serial EEPROM |
This is the non-volatile memory which holds the default values for the CMOS |
|
|
memory (in the event of battery failure, or the user pressing |
in Setup). |
General Purpose I/O There are several general purpose I/O pins. Some of these are used on the HP Vectra to sense the current settings of system board switches (page 31 and page 39).
Description |
GPIO number |
|
|
Reserved (HP security from Little Ben IRQ) |
GPIO10 |
|
|
Ratio of processor frequency to processor local bus frequency (as per SW-4) |
GPIO11 |
|
|
Auto soft lock |
GPIO12 |
|
|
Backplane identification BPID0 (always =0); (see BPID1, below) |
GPIO13 |
|
|
Host bus frequency selection, as indicated by SW-1 |
GPIO14 |
|
|
Host bus frequency selection, as indicated by SW-2 |
GPIO15 |
|
|
Serial EEPROM clear (as per SW-6) |
GPIO16 |
|
|
Ratio of processor frequency to processor local bus frequency (as per SW-3) |
GPIO17 |
|
|
Backplane identification BPID1 (desktop=1, minitower=0) |
GPIO20 |
|
|
Serial EEPROM data out |
GPIO21 |
|
|
Serial EEPROM data in |
GPIO22 |
|
|
Serial EEPROM clock |
GPIO23 |
|
|
Serial EEPROM chip select |
GPIO24 |
|
|
Reserved (for fax or general purpose light) |
GPIO25 |
|
|
27