Switching Regulator for Chopper Type DC/DC Converter
Description
HA16116FP/FPJ and HA16121FP/FPJ are dual-channel PWM switching regulator controller ICs for use in
chopper-type DC/DC converters.
This IC series incorporates totem pole gate drive circuits to allow direct driving of a power MOS FET. The
output logic is preset for booster, step-down, or inverting control in a DC/DC converter. This logic
assumes use of an N-channel power MOS FET for booster control, and a P-channel power MOS FET for
step-down or inverting control.
HA16116 includes a built-in logic circuit for step-down control only, and one for use in both step-down
and inverting control. HA16121 has a logic circuit for booster control only and one for both step-down and
inverting control.
Both ICs have a pulse-by-pulse current limiter, which limits PWM pulse width per pulse as a means of
protecting against overcurrent, and which uses an on/off timer for intermittent operation. Unlike
conventional methods that use a latch timer for shutdown, when the pulse-by-pulse current limiter
continues operation beyond the time set in the timer, the IC is made to operate intermittently (flickering
operation), resulting in sharp vertical setting characteristics. When the overcurrent condition subsides, the
output is automatically restored to normal.
The dual control circuits in the IC output identical triangle waveforms, for completely synchronous
configuring a compact, high efficiency dual-channel DC/DC converter, with fewer external components
than were necessary previously.
Functions
• 2.5 V reference voltage (Vref) regulator
• Triangle wave form oscillator
• Dual overcurrent detector
• Dual totem pole output driver
• UVL (under voltage lock out) system
• Dual error amplifier
• Vref overvoltage detector
• Dual PWM comparator
HA16116FP/FPJ, HA16121FP/FPJ
Features
• Wide operating supply voltage range* (3.9 V to 40.0 V)
• Wide operating frequency range (600 kHz maximum operation)
• Direct power MOS FET driving (output current ±1 A peak in maximum rating)
• Pulse-by-pulse overcurrent protection circuit with intermittent operation function (When overcurrent
state continues beyond time set in timer, the IC operates intermittently to prevent excessive output
current.)
• Grounding the ON/OFF pin turns the IC off, saving power dissipation. (HA16116: I
HA16121: I
= 150 µA max.)
OFF
• Built-in UVL circuit (UVL voltage can be varied with external resistance.)
• Built-in soft start and quick shutoff functions
Note: The reference voltage 2.5 V is under the condition of VIN ≥ 4.5 V.
Ordering Information
Hitachi Control ICs for Chopper-Type DC/DC Converters
DualHA17451Ch 1❍❍ ❍Open collectorSCP with timer (latch)
Ch 2❍❍ ❍
SingleHA16114——❍❍Totem polePulse-by-pulse
HA16120—❍——power MOS FETcurrent limiter and
DualHA16116Ch 1—❍❍driverintermittent operation
Ch 2—❍—by on/off timer
HA16121Ch 1—❍❍
Ch 2❍——
= 10 µA max.;
OFF
2
Pin Arrangement
HA16116FP/FPJ, HA16121FP/FPJ
Notes:
S.GND
CT
RT
IN(+)1
IN(−)1
E/O1
DB1
CL1
OUT1
P.GND
**1
1
2
3
4
5
6
7
8
9
1
10
20
19
18
17
16
15
14
13
12
11
**2
S.V
IN
Vref
TIM
ON/OFF
IN(−)2
E/O2
Channel 2Channel 1
DB2
CL2
OUT2
2
P.V
IN
(top view)
1.2.Pins S.GND (pin 1) and P.GND (pin 10) have no direct internal interconnection.
Both pins must be connected to ground.
Pins S.V (pin 20) and P.V (pin 11) have no direct internal interconnection.
Both pins must be connected to V .
Constant settings are explained for the following items.
Oscillator
1.
frequency
(f ) setting
OSC
S.GND
CT
RT
IN(+)1
1
2
3
4
20
19
18
17
DC/DC converter
output voltage
2.
setting and
IN(−)1
5
16
error amp usage
E/O1
6
Channel 1
15
Dead band duty
3.
and soft start
DB1
7
Channel 2
14
setting
CL1
8
13
Output stage
circuit and
4.
power MOS FET
OUT1
9
12
driving method
1. Oscillator Frequency (f
) Setting
OSC
P.GND
10
11
Figure 1.1 shows an equivalent circuit for the triangle wave oscillator.
S.V
IN
Vref
TIM
ON/OFF
IN(−)2
E/O2
DB2
CL2
OUT2
P.V
IN
Vref UVL and
5.
OVP
Setting of intermittent operation
timing when
6.
overcurrent is
detected
ON/OFF pin
7.
usage
Overcurrent
8.
detection value
setting
V
H
1.6 V typ
V
L
t
t
1
2
1.0 V typ
1.1 V
R
(external)
R
T
T
Vref (2.5 V)
Discharging
1 : 2
charging
C
T
I
O
I
O
C
T
(external)
C
T
Comparator
(3.3 V
IC internal circuits)
R
C
Inside the IC
R
A
R
B
Figure 1.1 Equivalent Circuit for the Triangle Wave Oscillator
7
HA16116FP/FPJ, HA16121FP/FPJ
The triangle wave is a voltage waveform used as a reference in creating a PWM pulse. This block operates
according to the following principles. A constant current IO, determined by an external timing resistor RT,
is made to flow continuously to external timing capacitor CT. When the CT pin voltage exceeds the
comparator threshold voltage VH, the comparator output causes a switch to operate, discharging a current I
from CT. Next, when the CT pin voltage drops below threshold voltage VL, the comparator output again
causes the switch to operate, stopping the IO discharge. The triangle wave is generated by this repeated
operation.
O
Note that IO = 1.1 V/RT. Since the IO current mirror circuit has a very limited current producing ability, R
should be set to ≥ 5 kΩ (IO ≥ 220 µA).
With this IC series, VH and VL of the triangle wave are fixed internally at about 1.6 V and 1.0 V by the
internal resistors RA, RB, and RC. The oscillator frequency can be calculated as follows.
f
OSC
Here,
=
t
1
t
=
2
VH − V
t
= t2= CTR
1
t3 ≈ 0.8 µs (comparator delay time in the oscillator)
Accordingly,
f
OSC
Note that the value of f
1
=
t
+ t
+ t
1
2
3
C
⋅ (VH − VL)
T
1.1 V/R
T
C
⋅ (VH − VL)
T
(2 − 1) × 1.1 V/R
= 0.6 V
L
0.6
1.1
1
≈
2t
≈
1
OSC
+ t
1.1 C
3
may differ slightly from the above calculation depending on the amount of delay
CT RT ⋅ (VH − VL)
=
T
T
1.1 V
CT RT ⋅ (VH − VL)
==
TRT
1
+ 0.8 µs
1.1 V
[Hz]
t
1
in the comparator circuit. Also, at high frequencies this comparator delay can cause triangle wave
overshoot or undershoot, skewing the dead band threshold. Confirm the actual value in implementation
and adjust the constants accordingly.
T
8
HA16116FP/FPJ, HA16121FP/FPJ
2. DC/DC Converter Output Voltage Setting and Error Amp Usage
2.1 Positive Voltage Booster (VO > VIN) or Step-Down (VIN > VO > Vref)
R1 + R
VO =Use
Booster output is possible only at channel 2 of HA16121. For step-down output, both channels of
HA16116 or channel 1 of HA16121 are used.
R
2
2
⋅ Vref (V)
V
O
R
1
R
V
2
R
R
O
1
2
Vref pin
Figure 2.1
Error amp.
IN(−)1
−
+
IN(+)1
IN(−)2
−
+
Vref
2.5 V
(internal connection)
CH1
CH2
2.2 Negative Voltage (VO < Vref) for Inverting Output
Use
VO = −Vref ⋅
R
1
R1 + R
R3 + R
⋅
2
4
− 1 (V)
R
3
Channel 1 is used for inverting output on both ICs.
Vref pin
R
1
R
R
3
2
R
4
V
O
IN(−)1
IN(+)2
Figure 2.1 Inverting Output
Vref 2.5 V
−
+
Error amp
CH1
9
HA16116FP/FPJ, HA16121FP/FPJ
2.3 Error Amplifier
Figure 2.3 shows an equivalent circuit of the error amplifier. The error amplifier on these ICs is configured
of a simple NPN transistor differential input amplifier and the output circuit of a constant-current driver.
This amplifier features wide bandwidth (fT = 4 MHz) with open loop gain kept to 50 dB, allowing stable
feedback to be applied when the power supply is designed. Phase compensation is also easy.
Both HA16116 and HA16121 have a noninverting input (IN(+)) pin, in order to allow use of the channel 1
error amplifier for inverting control. The channel 2 error amplifier, on the other hand, is used for stepdown control in HA16116 and booster control in HA16121; so the channel 2 noninverting input is
connected internally to Vref.
IC internal V
IN(−)
IN(+)
IN
E/O
To internal PWM
comparator
µµ
40 A80 A
Figure 2.3 Error Amplifier Equivalent Circuit
3. Dead Band (DB) Duty and Soft Start Setting (common to both channels)
3.1 Dead Band Duty Setting
Dead band duty is set by adjusting the DB pin input voltage (VDB). A convenient means of doing this is to
connect two external resistors to the Vref of this IC so as to divide VDB (see figure 3.1).
R
VDB = Vref
Duty (DB) =
Here, T =
f
×
R1 + R
V
TH
VTH − V
1
OSC
− V
2
(V)
2
DB
TL
⋅ ⋅ ⋅ ⋅× 100 (%)This applies when VDB > VTL.
If V
< VTL, there is no PWM output.
DB
Note: VTH: 1.6 V (Typ)
VTL: 1.0 V (Typ)
Vref is typically 2.5 V. Select R1 and R2 so that 1.0 V ≤ VDB ≤ 1.6 V.
10
HA16116FP/FPJ, HA16121FP/FPJ
V
TH
V
To Vref
V
DB
C
ST
C
T
R
1
E/O
DB
R
2
5k
PWM
comparator
−
+
+
From UVL
0.8V
V
IN
PWM
pulse
output
E/O
V
DB
V
TL
Booster
channel
Step-down/
inverting
channel
t
OFF
On
t
On
ON
Off
Off
T
Figure 3.1 Dead Band Duty Setting
3.2 Soft Start (SST) Setting (each channel)
When the power is turned on, the soft start function gradually raises VDB (refer to section 3.1), and the
PWM output pulse width gradually widens. This function is realized by adding a capacitor CST to the DB
pin. The function is realized as follows.
1.6 V typ
1.0 V typ
V
IN
GND
V
IN
GND
In the figure 3.2, the DB pin is clamped internally at approximately 0.8 V, which is 0.2 V lower than the
triangle wave VTL = 1.0 V typ.
tA: Standby time until PWM pulse starts widening.
t
: Time during which SST is in effect.
B
During soft start, the DB pin voltage in the figure below is as expressed in the following equation.
−t − t
V
SST
= VDB ⋅
1 − e,
Here,
t
= −T ln
0.8
1 −,
How to select values: If the soft start time t
overshoot. To prevent this, set t
0.8
T
0.8
V
DB
to a few tens of ms or above.
SST
= tA + t
t
SST
T = C
⋅ (R1 // R2)
ST
is too short, the DC/DC converter output voltage will tend to
SST
B
11
HA16116FP/FPJ, HA16121FP/FPJ
V
(voltage)
Triangle wave
V
SST
V
Starts from clamp
voltage of 0.8 V
Booster
channel
PWM pulse
output
Step-down/
inverting
channel
DC/DC converter output
(positive in this example)
TH
V
TL
PWM output
pulse starts to
Steady-state
operation
widen
t
0.8
t
A
t
B
1.6 V
1.0 V
0 V
V
IN
0 V
V
IN
0 V
V
O
0 V
12
t = 0 (here IC is on)t = t
SST
Figure 3.2 Soft Start (SST) Setting
HA16116FP/FPJ, HA16121FP/FPJ
4. Totem Pole Output Stage Circuit and Power MOS FET Driving Method
The output stage of this IC series is configured of totem pole circuits, allowing direct connection to a power
MOS FET as an external switching device, so long as VIN is below the gate breakdown voltage.
If there is a possibility that VIN will exceed the gate breakdown voltage of the power MOS FET, a Zener
diode circuit like that shown figure 4.1 or other protective measures should be used. The figure 4.1 shows
an example using a P-channel power MOS FET.
The reference voltage circuit is equipped with UVL and OVP functions.
• UVL
In normal operation the Vref output voltage is fixed at 2.5 V. If VIN is lower than normal, the UVL
circuit detects the Vref output voltage with a hysteresis of 1.7 V and 2.0 V, and shuts off the PWM
output if Vref falls below this level, in order to prevent malfunction.
• OVP
The OVP circuit protects the IC from inadvertent application of a high voltage from outside, such as if
VIN is shorted. A Zener diode (5.6 V) and resistor are used between Vref and GND for overvoltage
detection. PWM output is shut off if Vref exceeds approximately 7.0 V.
Note that the PWM output pulse logic and the precision of the switching regulator output voltage are not
guaranteed at an applied voltage of 2.5 V to 7 V.
13
HA16116FP/FPJ, HA16121FP/FPJ
5.2 Quick Shutoff
When the UVL circuit goes into operation, a sink transistor is switched on as in the figure below, drawing
off the excess current. This transistor also functions when the IC is turned off, drawing off current from the
CT, E/O, and DB pins and enabling quick shutoff.
PWM
output
On
Off
PWM
output
PWM output on
off
1.7 2.02.55.07.0
PWM
output off
Vref
(V)
When VIN is
low
Relation of Vref to UVL and OVP
V
IN
Vref
generation
circuit
OVP
Abnormal voltage
applied to Vref
Vref
2.0 V and
1.7 V
detection
Internal
UVL
pulse
signal
line
ZD
5.6 V
R
Sink
10 kΩ
transistor
To other circuitry
Figure 5.1 Quick Shutoff
Vref
OUTOUT
14
HA16116FP/FPJ, HA16121FP/FPJ
6. Setting of Intermittent Operation Timing when Overcurrent is Detected
6.1 Operation Principles
The current limiter on this IC detects overcurrent in each output pulse, providing pulse-by-pulse
overcurrent protection by limiting pulse output whenever an overcurrent is detected. If the overcurrent
state continues, the TIM pin and ON/OFF pin can be used to operate the IC intermittently. As a result, a
power supply with sharp vertical characteristics can be configured.
The ON/OFF timing for intermittent operation makes use of the hysteresis in the ON/OFF pin threshold
voltage VON and V
following pages. VBE is based-emitter voltage of internal transistor.
Note: When an overcurrent is detected in one channel of this IC but not the other, the pulse-by-pulse
current limiter still goes into operation on both channels. Also, when the intermittent operation
feature is not used, the TIM pin should be set to open state and the ON/OFF pin pulled up to high
level (above VON).
, such that VON – V
OFF
= VBE. Setting method is performed as described on the
OFF
V
IN
390 kΩ
4.7 kΩ
2.2 F
R
A
TM
R
B
ON/OFF
+
C
µ
ON/OFF
−
Figure 6.1 Connection Diagram (example)
6.2 Intermittent Operation Timing Chart (V
*1
4V
BE
3V
2V
V
0 V
BE
BE
BE
IC is on
V
ON/OFF
Continuous overcurrent detected
a.
Intermittent operation starts (IC is off)
b.
Overcurrent cleared (dotted line)
c.
1.V is the base-emitter voltage in transistors on the IC, and is approximately 0.7 V
Note:
BE
(see the figure 7.1).
For details, see the overall waveform timing diagram.
ON/OFF
a
2T
ON
Vref
generation
circuit
only)
c
IC is off
b
T
ON
Current
Latch
limiter
CL
S
Q
R
c
OnOn
Off
T
OFF
t
Figure 6.2 Intermittent Operation Timing Chart
15
HA16116FP/FPJ, HA16121FP/FPJ
6.3 Calculating Intermittent Operation Timing
Intermittent operation timing is calculated as follows.
(1) TON time (the time until the IC is shut off when continuous overcurrent occurs)
3V
BE
2V
BE
1 − On duty*
×
1
VIN − 2V
VIN − 3V
(2) T
TON = C
= C
time (when the IC is off, the time until it next goes on)
OFF
T
= C
OFF
RB ××
ON/OFF
× RB × ln1.5 ×0.4 C
ON/OFF
(RA + RB)
ON/OFF
ln
×× ln
Where, VBE ≈ 0.7 V
Note: 1. On duty is the percent of time the IC is on during one PWM cycle when the pulse-by-pulse
current limiter is operating.
From the first equation (1) above, it is seen that the shorter the time TON when the pulse-by-pulse current
limiter goes into effect (resulting in a larger overload), the smaller the value TON becomes.
1
1 − On duty*
≈×××
BE
BE
ON/OFF
RB
1
1 − On duty*
As seen in the second equation (2), T
OFF
switched on, the IC goes on only after T
Triangle wave
PWM output
(step-down channel)
On duty is the percent of time the IC is on during one PWM cycle when
Note:
the pulse-by-pulse current limiter is operating.
is a function of VIN. Further, according to this setting, when VIN is
has elapsed.
OFF
Dead band voltage
Point at which current
limiter operate
t
t
ON
T
On duty =
Where T = 1/f
ON
T
OSC
Figure 6.3
16
HA16116FP/FPJ, HA16121FP/FPJ
6.4 Examples of Intermittent Operation Timing (calculated values)
(1) T
ON
T = T C R
ON1×ON/OFF×B
Here, coefficient
T = 0.41×
1 − On duty
from section 6.3 (1) previously.
Example: If C = 2.2 F,
ON/OFF
R = 4.7 k , and the on duty
B
of the current limiter is 75%,
then T = 16 ms.
Figure 6.4 Examples of Intermittent Operation Timing (1)
(2) T
OFF
T = T C (R + R )
OFF2×ON/OFF
Here, coefficient
2
VIN − 2V
VIN − 3V
T = ln
from section 6.3 (2) previously.
×
BE
BE
4
3
1
2
T
1
1
µ
Ω
0
ON
0 20406080100
(PWM) ON Duty (%)
B
A
0.1
T
2
0.05
Example:Ωµ
If C = 2.2 F, R = 4.7 k ,
ON/OFFB
R = 390 k , V = 12 V,
AIN
then
Ω
T = 60 ms.
OFF
Figure 6.5 Examples of Intermittent Operation Timing (2)
0
02040
1030
V (V)
IN
17
HA16116FP/FPJ, HA16121FP/FPJ
Example of step-up circuit
Triangle wave V
Triangle wave V
Dead band V
Dead band V
Error output V
Error output V
PWM pulse output
PWM pulse output
(In case of HA16120)
(In case of HA16120)
Power MOS FET
Power MOS FET
drain current (I
drain current (I
(dotted line shows
(dotted line shows
inductor current)
inductor current)
Current limiter
Current limiter
pin (CL)
pin (CL)
VIN − 0.2 V
VIN − 0.2 V
DB
DB
D
D
CT
CT
E/O
E/O
)
)
V
V
IN
IN
V
V
TH
TH
Figure 6.6
7. ON/OFF Pin Usage
7.1 IC Shutoff by the ON/OFF Pin
As shown in the figure 7.1, these ICs can be turned off safely by lowering the voltage at the ON/OFF pin to
below 2VBE. This feature is used to conserve the power in the power supply system. In off state the IC
current consumption (I
) is 10 µA (Max) for HA16116 and 150 µA (Max) for HA16121.
OFF
Example of step-up circuit
V
V
IN
IN
C
C
F
F
R
R
F
F
C
C
L
L
IC
IC
OUT
OUT
F.B.
F.B.
Determined by L and V
Determined by L and V
(CL)
(CL)
Determined by RCS and R
Determined by RCS and R
R
R
CS
CS
Inductor
Inductor
L
L
I
I
D
D
V
V
OUT
OUT
IN
IN
F
F
The ON/OFF pin can also be used to drive logic ICs such as TTL or CMOS with a sink current of 50 µA
(Typ) at an applied voltage of 5 V. When it is desired to employ this feature along with intermittent
operation, an open collector or open drain logic IC should be used.
V
IN
I
IN
R
External logic IC
OffOn
Switch
+
−
A
R
B
C
ON/OFF
P.V
ININ
TIM
ON/OFF
GND
S.V
To output
stage
To latch
50 kΩ
4 V
BE
Q
Q
Q
HA16116,
1
2
3
To other circuitry
Vref
generation
Vref
output
circuit
Q
4
On/off hysteresis circuit
HA16121
Figure 7.1 IC Shutoff by the ON/OFF Pin
18
HA16116FP/FPJ, HA16121FP/FPJ
7.2 Adjusting UVL Voltage (when intermittent operation is not used)
The UVL voltage setting in this IC series can be adjusted externally as shown below.
Using the relationships shown in the figure, the UVL voltage in relation to VIN can be adjusted by changing
the relative values of VTH and VTL.
When the IC is operating, transistor Q4 is off, so VON = 3VBE ≈ 2.1 V. Accordingly, by connecting resistors
RC and RD, the voltage at which UVL is cancelled is as follows.
RC + R
D
R
D
This V
VIN = 2.1 V
is simply the supply voltage at which the UVL stops functioning, so in this state Vref is still below
IN
×
2.5 V. In order to restore Vref to 2.5 V, a VIN of approximately 4.3 V should be applied.
With this IC series, V
makes use of the VBE of internal transistors, so when designing a power supply
ON/OFF
system it should be noted that VON has a temperature dependency of around –6 mV/°C.
S.V
IN
To other circuitry
Q
1
Vref
generation
Vref output
circuit
Q
2
Q
3
Q
4
On/off hysteresis circuit
Vref
P.V
IN
To output
R
C
TIM
(open)
stage
To latch
ON/OFF
50 kΩ
R
D
GND
3
2
V
OFF
1
1.4 V
V
ON
2.1 V
2.5 V
V 4.5 V≥
IN
V
IN
0
012345
V
ON/OFF
Figure 7.2 Adjusting UVL Voltage
19
HA16116FP/FPJ, HA16121FP/FPJ
Overcurrent Detection Value Setting
The overcurrent detection value VTH for this IC series is 0.2 V (Typ) and the bias current is 200 µA (Typ)
The power MOS FET peak current value before the current limiter goes into operation is derived from the
following equation.
V
− (RF + RCS) ⋅ I
TCL
ID =
R
CS
Here VTH = VIN – VCL = 0.2 V, VCL is a voltage referd on GND.
Note that CF and RCS form a low-pass filter, determined by their time constants, that prevents malfunctions
from current spikes when the power MOS FET is turned on or off.
S.V
IN
To other
circuitry
1 k
200 A
OUT
(internal)
BCL
V
CL
Detection
output
IN(—)
CL
+−
C
F
1800 PF
I
BCL
R
F
240 Ω
G
D
R
CS
0.05 Ω
S
V
IN
This circuit is an example
for step-down output use.
V
O
+
−
Figure 8.1 Example for Step-Down Use
The sample values given in this figure are calculated from the following equation.
0.2 V − (240 Ω + 0.05 Ω) × 200 µA
I
=
D
0.05 Ω
= 3.04 [A]
The filter cutoff frequency is calculated as follows.
20
2π C
1
F RF
fC = =
6.28 × 1800 pF × 240 Ω
1
= 370 [kHz]
HA16116FP/FPJ, HA16121FP/FPJ
Absolute Maximum Ratings (Ta = 25°C)
Rating
HA16116FP,
ItemSymbol
Supply voltageV
Output current (DC)I
IN
O
HA16121FP
4040V
±0.1±0.1A
Output current (peak)IO peak±1.0±1.0A
Current limiter pin voltageV
Error amp input voltageV
E/O input voltageV
RT pin source currentI
TIM pin sink currentI
Power dissipation*
1
CL
IEA
IE/O
RT
TM
P
T
V
IN
V
IN
VrefVrefV
500500µA
2020mA
2
680*1,*
Operation temperature rangeTopr–20 to +85–40 to +85°C
Junction temperatureTjMax125125°C
Storage temperature rangeTstg–55 to +125–55 to +125°C
Note:1. This value is based on actual measurements on a 40 × 40 × 1.6 mm glass epoxy circuit board.
At a wiring density of 10%, it is the permissible value up to Ta = 45°C, but at higher temperatures
this value should be derated by 8.3 mW/°C. At a wiring density of 30% it is the permissible value
up to Ta = 64°C, but at higher temperatures it should be derated by 11.1 mW/°C.
2. For the DILP package.
This value applies up to Ta = 45°C; at temperatures above this, 8.3 mW/°C derating should be
applied.
HA16116FPJ,
HA16121FPJUnit
V
IN
V
IN
680*1,*
2
V
V
mW
800
T
600
400
200
Permissible dissipation P (mW)
680 mW
10% wiring density
30% wiring density
447 mW
348 mW
45°C64°C85°C125°C
0
204060801001201400−20
Operating ambient temperature Ta (°C)
21
HA16116FP/FPJ, HA16121FP/FPJ
Electrical Characteristics (Ta = 25°C, VIN = 12 V, f
= 300 kHz)
OSC
ItemSymbolMinTypMax UnitTest Conditions
ReferenceOutput voltageVref2.452.50 2.55 VI
= 1 mA
O
voltageLine regulationLine—3060mV4.5 V ≤ VIN ≤ 40 V
blockLoad regulationLoad—3060mV0 ≤ IO ≤ 10 mA
Output shorting
I
OS
1025—mAVref = 0 V
current
Vref OVP voltageVrovp6.26.87.0V
Output voltage
∆Vref/∆Ta —100—ppm/°C
temperature
dependence
Triangle
wave
oscillator
block
Maximum oscillator
frequency
Minimum oscillator
frequency
Oscillator frequency
f
OSCmax
f
OSCmin
∆f
OSC
600——kHz
——1 Hz
/∆VIN—±1±3%4.5 V ≤ VIN ≤ 40 V
input voltage stability
Oscillator frequency
∆f
/∆Ta —±5—%–20°C ≤ Ta ≤ 85°C
OSC
temperature stability
Dead band
adjust block
Oscillator frequencyf
Low-level threshold
voltage
High-level threshold
V
V
OSC
TLDB
THDB
270300330kHzCT = 220 pF, RT = 10 kΩ)
0.870.97 1.07 VOutput on duty 0%
1.481.65 1.82 VOutput on duty 100%
voltage
Threshold differential
∆V
TDB
0.550.65 0.75 V∆VTH = VTH – V
TL
voltage
Output source current I
PWM
comparator
Low-level threshold
voltage
blockHigh-level threshold
Osource (DB)
V
TLCMP
V
THCMP
100150200µADB pin = 0 V
0.870.97 1.07 VOutput on duty = 0%
1.481.65 1.82 VOutput on duty = 100%
oltage
Threshold differential
∆V
TCMP
0.550.65 0.75 V∆VTH = VTH – V
TL
voltage
Dead band precisionDBdev–50+5%Deviation when
V
= (VTL + VTH)/2,
EO
duty = 50 %
22
HA16116FP/FPJ, HA16121FP/FPJ
Electrical Characteristics (Ta = 25°C, VIN = 12 V, f
= 300 kHz) (cont)
OSC
ItemSymbol MinTypMaxUnitTest Conditions
Error ampInput offset voltage V
blockInput bias currentI
Output sink current I
Output source
current
Voltage gainA
Unity gain band-
IOEA
BEA
Osink (EA)
I
Osource (EA)
V
BW34—MHz
—210mV
—0.82µA
284052µAIn open loop,
V
= 3 V, VO = 2 V
I
284052µAIn open loop,
V
= 2 V, VO = 1 V
I
4050—dBf = 10 kHz
width
High-level output
V
OHEA
2.23.0—VIO = 10 µA
voltage
Low-level output
V
OLEA
—0.20.5VIO = 10 µA
voltage
Ov er c ur rent Threshold voltage V
detectionCL bias currentI
blockOperating timet
TCL
BCL
OFFCL
VIN –0.22 VIN –0.2 VIN –0.18 V
150200250µACL = V
IN
—200300nsCL = VIN –0.3 V
—500600nsApplies only to ch 2
of HA16121
Output
stage
Output low voltage V
OL1
—0.72.2VI
—1.61.9VI
= 10 mA
Osink
Applies only to HA16116
= 10 mA
Osink
Applies only to HA16121
—1.01.3VI
Osink
= 0 mA
Applies only to HA16121
Off state low
voltage
V
OL2
—1.61.9VI
Osink
= 1 mA
ON/OFF pin = 0 V
Applies only to ch 2
of HA16121
—1.01.3VI
Osink
= 0 mA
ON/OFF = 0 V
Applies only to ch 2
of HA16121
Output highV
voltage
Off state high
voltage
OH1
V
OH2
VIN –1.9VIN –1.6 —VI
V
–1.3VIN –1.0 —VI
IN
VIN –1.9VIN –1.6 —VI
VIN –1.3VIN –1.0 —VI
= 10 mA
Osource
= 0 A
Osource
= 1 mA
Osource
ON/OFF pin = 0 V
= 0 A
Osource
ON/OFF pin = 0 V
23
HA16116FP/FPJ, HA16121FP/FPJ
Electrical Characteristics (Ta = 25°C, VIN = 12 V, f
1.When only one channel is to be used,
or the E/O pin. In the case of E/O, however,
there will be no soft start when the output is
turned back on.
DB
E/O
OFF
2.
the channel not used should be connected
as follows.
V
Connect C
to VIN.
L
Ground IN(+) and IN(−).
Leave other pins open.
GND
IN
C
L
+
IN
−
IN
31
HA16116FP/FPJ, HA16121FP/FPJ
Application Examples (3)
24k
0.05
1800p
+
10k
4700p
240
2.2
33k
+
+12 V
5.1 k
output
−
1.3 k
+
−12 V
output
−
470
+
−
Boost output
HRP24
4.7
470
2SK1094
330µH
IN
P.V
*
NAND
(HA16116)
OUT2
IN
to S.V
DB2CL2OUT2
−
E/O2
from
100k
−+EA2
IN(−)2
0.2 V
− +
UVL
CL2
IN
V
Vref
from UVL
++−
5k
PWM COMP 2
0.8V
NAND
from UVL
−++
IN
V
OUT1
+
−
Inverting output
330µH
Vref
CL1
− +
5k
PWM COMP 1
0.8V
EA1
+
0.2 V
from
−
UVL
10987654321
IN
to S.V
2SJ214
P.GNDOUT1CL1DB1
E/O1
IN(−)1IN(+)1
4.7
100k
0.05
240
1800p
R4
2.2
−
+
24k
22k
R3
1.2k
33k
10k
12k
12k
4700p
Power supply using the HA16121FP: +5 V input, +12 and −22 V outputs
32
RB4.7k
TM
2.2
C
UVL
output
A
R
390k
TIMON/OFF
UVL
Vref
IN
H
OR
H
V
L
V
OVP
L
S.V
20191817161514131211
0.1
Cref
IN
V
5V
band
2.5 V
gap
reference
circuit
voltage
generation
ON/OFF
IN
V
Q
Latch
S
R
Triangle wave
Triangle wave
1.6 V
1.0 V
generation circuit
5k
0.8V
T
R
1.1 V
Bias current
Latch reset pulses
from
UVL
T
R
T
C
S.GND
RT10k
CT220p
pF (p)
R : Ω
C : µF (unless otherwise specified)
The IC is the HA16121.
Units:
Package Dimensions
20
HA16116FP/FPJ, HA16121FP/FPJ
Unit: mm
12.6
13 Max
11
5.5
1
0.80 Max
1.27
*0.42 ± 0.08
± 0.06
0.40
*Dimension including the plating thickness
Base material dimension
10
0.12
0.10 ± 0.10
0.15
M
2.20 Max
7.80
0.20 ± 0.04
*0.22 ± 0.05
0.70 ± 0.20
Hitachi Code
JEDEC
EIAJ
Mass
(reference value)
+ 0.20
– 0.30
1.15
0° – 8°
FP-20DA
—
Conforms
0.31 g
33
HA16116FP/FPJ, HA16121FP/FPJ
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URLNorthAmerica : http:semiconductor.hitachi.com/
For further information write to:
Hitachi Semiconductor
(America) Inc.
179 East Tasman Drive,
San Jose,CA 95134
Tel: <1> (408) 433-1990
Fax: <1>(408) 433-0223
Europe: http://www.hitachi-eu.com/hel/ecg
Asia (Singapore): http://www.has.hitachi.com.sg/grp3/sicd/index.htm
Asia (Taiwan): http://www.hitachi.com.tw/E/Product/SICD_Frame.htm
Asia (HongKong): http://www.hitachi.com.hk/eng/bo/grp3/index.htm
Japan: http://www.hitachi.co.jp/Sicd/indx.htm
Hitachi Asia Ltd.
Taipei Branch Office
3F, Hung Kuo Building. No.167,
Tun-Hwa North Road, Taipei (105)
Tel: <886> (2) 2718-3666
Fax: <886> (2) 2718-8180
Copyright ' Hitachi, Ltd., 1998. All rights reserved. Printed in Japan.
34
Hitachi Asia (Hong Kong) Ltd.
Group III (Electronic Components)
7/F., North Tower, World Finance Centre,
Harbour City, Canton Road, Tsim Sha Tsui,
Kowloon, Hong Kong
Tel: <852> (2) 735 9218
Fax: <852> (2) 730 0281
Telex: 40815 HITEC HX
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