BB305M
Build in Biasing Circuit MOS FET IC
UHF/VHF RF Amplifier
ADE-208-607C (Z) 4th. Edition May 1998
Features
•Build in Biasing Circuit; To reduce using parts cost & PC board space.
•Superior cross modulation characteristics.
•High gain; (PG = 28 dB typ. at f = 200 MHz)
•Wide supply voltage range;
Applicable with 5V to 9V supply voltage.
•Withstanding to ESD;
Build in ESD absorbing diode. Withstand up to 200V at C=200pF, Rs=0 conditions.
•Provide mini mold packages; MPAK-4(SOT-143mod)
Outline
MPAK-4
2
3
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1 |
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4 |
1. |
Source |
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2. |
Gate1 |
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3. |
Gate2 |
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4. |
Drain |
Note: 1. Marking is “EW–”.
2. BB305M is individual type number of HITACHI BBFET.
BB305M
Absolute Maximum Ratings (Ta = 25°C)
Item |
Symbol |
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Ratings |
Unit |
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Drain to source voltage |
VDS |
12 |
V |
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Gate1 to source voltage |
VG1S |
+10 |
V |
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–0 |
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Gate2 to source voltage |
VG2S |
±10 |
V |
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Drain current |
ID |
25 |
mA |
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Channel power dissipation |
Pch |
150 |
mW |
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Channel temperature |
Tch |
150 |
°C |
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Storage temperature |
Tstg |
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–55 to +150 |
°C |
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2
BB305M
Electrical Characteristics (Ta = 25°C)
Item |
Symbol |
Min |
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Typ |
Max |
Unit |
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Test Conditions |
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Drain to source breakdown |
V(BR)DSS |
12 |
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— |
— |
V |
I |
D = 200µA, VG1S = VG2S = 0 |
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voltage |
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Gate1 to source breakdown |
V(BR)G1SS |
+10 |
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— |
— |
V |
I |
G1 = +10µA, VG2S = VDS = 0 |
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voltage |
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Gate2 to source breakdown |
V(BR)G2SS |
±10 |
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— |
— |
V |
I |
G2 = ±10µA, VG1S = VDS = 0 |
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voltage |
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Gate1 to source cutoff current |
IG1SS |
— |
— |
+100 |
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nA |
V |
G1S = +9V, VG2S = VDS = 0 |
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Gate2 to source cutoff current |
IG2SS |
— |
— |
±100 |
nA |
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VG2S = ±9V, VG1S = VDS = 0 |
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Gate1 to source cutoff voltage VG1S(off) |
0.4 |
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— |
1.0 |
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V |
V DS = 5V, VG2S = 4V, ID = 100µA |
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Gate2 to source cutoff voltage VG2S(off) |
0.4 |
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— |
1.0 |
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V |
V DS = 5V, VG1S = 5V, ID = 100µA |
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Input capacitance |
ciss |
2.3 |
2.8 |
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3.5 |
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pF |
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VDS = 5V, VG1 |
= 5V |
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Output capacitance |
coss |
1.1 |
1.5 |
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1.9 |
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pF |
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VG2S =4V, RG = 82kΩ |
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Reverse transfer capacitance |
crss |
— |
0.017 |
0.04 |
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pF |
f = 1MHz |
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Drain current |
ID(op) 1 |
10 |
15 |
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20 |
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mA |
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VDS = 5V, VG1 |
= 5V, VG2S = 4V |
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RG = 82kΩ |
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ID(op) 2 |
— |
13 |
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— |
mA |
V |
DS = 9V, VG1 |
= 9V, VG2S =6V |
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RG = 220kΩ |
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Forward transfer admittance |
|yfs|1 |
23 |
28 |
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— |
mS |
V DS = 5V, VG1 |
= 5V, VG2S =4V |
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RG =82kΩ, f = 1kHz |
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|yfs|2 |
— |
28 |
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— |
mS |
V |
DS = 9V, VG1 |
= 9V, VG2S =6V |
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RG = 220kΩ, f = 1kHz |
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Power gain |
PG1 |
24 |
28 |
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— |
dB |
V DS = 5V, VG1 |
= 5V, VG2S =4V |
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RG = 82kΩ, f = 200MHz |
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PG2 |
— |
28 |
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— |
dB |
V |
DS = 9V, VG1 = 9V, VG2S =6V |
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RG = 220kΩ, f = 200MHz |
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Noise figure |
NF1 |
— |
1.4 |
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1.9 |
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dB |
V DS = 5V, VG1 |
= 5V, VG2S =4V |
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RG = 82kΩ, f = 200MHz |
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NF2 |
— |
1.4 |
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— |
dB |
V |
DS = 9V, VG1 |
= 9V, VG2S =6V |
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RG = 220kΩ, f = 200MHz |
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3
BB305M
Main Characteristics
Test Circuit for Operating Items (I |
, |yfs|, Ciss, Coss, Crss, NF, PG) |
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D(op) |
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VG2 |
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VG1 |
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R G |
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Gate 2 |
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Gate 1 |
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Drain |
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Source |
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A
ID
Power Gain, Noise Figure Test Circuit
VT |
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VG2 |
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VT |
1000p |
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1000p |
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1000p |
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1000p |
47k |
BBFET |
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47k |
47k |
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L2 |
1000p |
Output(50 ¶) |
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Input(50 ¶) |
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L1 |
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10p max |
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1000p |
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1000p |
RFC |
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R G |
1SV70 |
36p |
1SV70 |
82k |
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1000p |
VD= VG1
L1 : 1mm Enameled Copper Wire,Inside dia 10mm, 2Turns
L2 : 1mm Enameled Copper Wire,Inside dia 10mm, 2Turns RFC : 1mm Enameled Copper Wire,Inside dia 5mm, 2Turns
Unit @Resistance @( ¶)
@ @ Capacitance @(F)
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4