HIT 3SK290 Datasheet

HIT 3SK290 Datasheet

3SK290

Silicon N-Channel Dual Gate MOS FET

ADE-208-271 1st. Edition

Application

UHF RF amplifier

Features

Low noise figure.

NF = 2.3 dB Typ. at f = 900 MHz

High gain.

PG = 19.3 dB Typ. at f = 900 MHz

Outline

CMPAK–4

2

3

1

4

1. Source

2. Gate1

3. Gate2

4. Drain

3SK290

Absolute Maximum Ratings (Ta = 25°C)

Item

Symbol

Ratings

Unit

Drain to source voltage

VDS

12

V

Gate 1 to source voltage

VG1S

±8

V

Gate 2 to source voltage

VG2S

±8

V

Drain current

ID

25

mA

 

 

 

 

Channel power dissipation

Pch

100

mW

 

 

 

 

Channel temperature

Tch

125

°C

 

 

 

 

Storage temperature

Tstg

–55 to +125

°C

 

 

 

 

Attention: This device is very sensitive to electro static discharge.

It is recommended to adopt appropriate cautions when handling this transistor.

2

3SK290

Electrical Characteristics (Ta = 25°C)

Item

Symbol

Min

 

 

Typ

 

 

 

 

 

Max

Unit

 

 

Test conditions

Drain to source breakdown

V(BR)DSX

12

 

 

 

 

 

 

 

 

 

V

I

 

D = 200 μA, VG1S = –3 V,

voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VG2S = –3 V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate 1 to source breakdown

V(BR)G1SS

±8

 

 

 

 

 

 

 

 

 

V

I

 

G1 = ±10 μA, VG2S = VDS = 0

voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate 2 to source breakdown

V(BR)G2SS

±8

 

 

 

 

 

 

 

 

 

V

I

 

G2 = ±10 μA, VG1S = VDS = 0

voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate 1 cutoff current

IG1SS

 

±100

nA

 

 

VG1S = ±6 V, VG2S = VDS = 0

Gate 2 cutoff current

IG2SS

 

±100

nA

 

 

VG2S = ±6 V, VG1S = VDS = 0

Drain current

IDS(on)

0.5

 

 

 

 

 

 

10

mA

 

V DS = 6 V, VG1S = 0.5 V,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VG2S = 3 V

 

 

 

 

 

 

 

 

 

 

 

Gate 1 to source cutoff voltage

VG1S(off)

–0.6

 

 

+0.5

V

 

V DS = 10 V, VG2S = 3 V,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ID = 100 μA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate 2 to source cutoff voltage

VG2S(off)

0

 

 

 

 

 

 

+1.0

V

 

V DS = 10 V, VG1S = 3 V,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ID = 100 μA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Forward transfer admittance

|yfs|

16

 

 

 

 

22

 

 

 

 

 

 

mS

 

V DS = 6 V, VG2S = 3 V,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ID = 10 mA, f = 1 kHz

 

 

 

 

 

 

 

 

 

 

 

 

 

Input capacitance

Ciss

1.2

 

 

 

 

1.8

2.2

pF

 

 

VDS = 6 V, VG2S = 3V,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ID = 10 mA, f = 1 MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

Output capacitance

Coss

0.7

 

 

 

 

1.2

1.4

pF

 

 

 

 

 

 

 

 

 

 

 

 

Reverse transfer capacitance

Crss

0.02

0.03

pF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Power gain

PG

17

 

 

 

 

19.3

 

 

 

 

 

dB

 

V DS = 4 V, VG2S = 3 V,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ID = 10 mA, f = 900 MHz

 

 

 

 

 

 

 

 

 

 

Noise figure

NF

2.3

 

2.8

dB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note: Marking is “ZJ–”.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

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