HIT 2SK3140 Datasheet

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HIT 2SK3140 Datasheet

2SK3140

Silicon N Channel MOS FET

High Speed Power Switching

ADE-208-767C (Z) 4th. Edition February 1999

Features

Low on-resistance RDS(on) = 6 mΩ typ.

Low drive current

4 V gate drive device can be driven from 5 V source

Outline

TO–220CFM

D

G

1 2

3

1.

Gate

 

 

 

2.

Drain

S

 

3.

Source

2SK3140

Absolute Maximum Ratings (Ta = 25°C)

Item

Symbol

Ratings

Unit

Drain to source voltage

VDSS

60

V

Gate to source voltage

VGSS

±20

V

Drain current

ID

60

A

 

 

 

 

Drain peak current

Note 1

240

A

ID(pulse)

Body-drain diode reverse drain current

IDR

60

A

Avalanche current

Note 3

50

A

IAP

Avalanche energy

Note 3

214

mJ

EAR

Channel dissipation

Pch Note 2

35

W

Channel temperature

Tch

150

°C

 

 

 

 

Storage temperature

Tstg

–55 to +150

°C

Note: 1. PW ≤ 10 µs, duty cycle ≤ 1%

2.Value at Tc = 25°C

3.Value at Tch = 25°C, Rg ≥ 50 Ω

2

2SK3140

Electrical Characteristics (Ta = 25°C)

Item

Symbol

Min

Typ

Max

Unit

 

 

Test Conditions

Drain to source breakdown

V(BR)DSS

60

V

I

D = 10 mA, VGS = 0

voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate to source leak current

IGSS

±0.1

µA

 

 

VGS = ±20 V, VDS = 0

Zero gate voltege drain

IDSS

10

µA

 

 

VDS = 60 V, VGS = 0

current

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate to source cutoff voltage

V

1.0

2.5

V

I

D

= 1 mA, V

DS

= 10 V Note 1

 

GS(off)

 

 

 

 

 

 

 

 

Static drain to source on state

RDS(on)

6.0

7.5

m Ω

 

 

ID = 30 A, VGS = 10 V Note 1

resistance

 

8.0

12

m Ω

 

 

ID = 30 A, VGS = 4 V Note 1

 

 

 

 

 

 

 

 

Forward transfer admittance

|yfs|

45

75

S

I D = 30 A, VDS = 10 V Note 1

 

 

 

 

 

 

 

 

 

 

 

Input capacitance

Ciss

7100

pF

V

DS = 10 V

 

 

 

 

 

 

 

 

 

 

 

 

 

Output capacitance

Coss

1000

pF

V

 

GS = 0

 

 

Reverse transfer capacitance

Crss

280

pF

f = 1 MHz

 

 

 

 

 

 

 

 

 

 

 

 

Total gate charge

Qg

125

nc

V

DD = 25 V

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate to source charge

Qgs

25

nc

V

GS = 10 V

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate to drain charge

Qgd

25

nc

I

D = 60 A

 

 

 

 

 

 

 

 

 

 

Turn-on delay time

td(on)

60

ns

V

 

GS = 10 V, ID = 30 A

Rise time

tr

250

ns

R

L = 1Ω

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Turn-off delay time

td(off)

540

ns

 

 

 

 

 

 

Fall time

tf

320

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Body–drain diode forward

VDF

1.0

V

I

F = 60 A, VGS = 0

voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Body–drain diode reverse

trr

80

ns

I

F = 60 A, VGS = 0

recovery time

 

 

 

 

 

 

 

diF/ dt = 50 A/ µs

Note: 1. Pulse test

3

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