HIT 2SK3136 Datasheet

0 (0)
HIT 2SK3136 Datasheet

2SK3136

Silicon N Channel MOS FET

High Speed Power Switching

ADE-208-696B (Z) 3rd. Edition February 1999

Features

Low on-resistance RDS(on) = 4.5 mΩ typ.

Low drive current

4 V gate drive device can be driven from 5 V source

Outline

TO–220AB

D

G

 

 

 

1.

Gate

1

2.

Drain(Flange)

2

3.

Source

3

S

 

 

2SK3136

Absolute Maximum Ratings (Ta = 25°C)

Item

Symbol

Ratings

Unit

Drain to source voltage

VDSS

40

V

Gate to source voltage

VGSS

±20

V

Drain current

ID

75

A

 

 

 

 

Drain peak current

Note 1

300

A

ID(pulse)

Body-drain diode reverse drain current

IDR

75

A

Avalanche current

Note 3

50

A

IAP

Avalanche energy

Note 3

333

mJ

EAR

Channel dissipation

Pch Note 2

100

W

Channel temperature

Tch

150

°C

 

 

 

 

Storage temperature

Tstg

–55 to +150

°C

Note: 1. PW ≤ 10 µs, duty cycle ≤ 1%

2.Value at Tc = 25°C

3.Value at Tch = 25°C, Rg ≥ 50 Ω

2

 

 

 

 

 

 

 

 

 

 

 

 

 

2SK3136

 

 

Electrical Characteristics (Ta = 25°C)

 

 

 

 

 

 

 

 

 

 

 

 

Item

Symbol

Min

Typ

Max

Unit

 

 

Test Conditions

 

 

 

 

 

 

 

 

 

 

 

 

 

Drain to source breakdown voltage

V(BR)DSS

40

V

I

D = 10 mA, VGS = 0

 

 

Gate to source leak current

IGSS

±0.1

µA

 

 

VGS = ±20 V, VDS = 0

 

 

Zero gate voltege drain current

IDSS

10

µA

 

 

VDS = 40

V, VGS = 0

 

 

Gate to source cutoff voltage

V

1.0

2.5

V

I

D

= 1 mA, V

DS

= 10 V Note 1

 

 

 

GS(off)

 

 

 

 

 

 

 

 

 

 

 

Static drain to source on state

RDS(on)

4.5

5.8

m Ω

 

 

ID = 40 A, VGS = 10 V Note 1

 

 

resistance

 

6.5

10

m Ω

 

 

ID = 40 A, VGS = 4 V Note 1

 

 

 

 

 

 

 

 

 

 

 

 

Forward transfer admittance

|yfs|

50

80

S

I D = 40 A, VDS = 10 V Note 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input capacitance

Ciss

6800

pF

V

DS = 10

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Output capacitance

Coss

1300

pF

V

 

GS = 0

 

 

 

 

 

Reverse transfer capacitance

Crss

380

pF

f = 1MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Total gate charge

Qg

130

nc

V

DD = 25

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate to source charge

Qgs

25

nc

V

GS = 10

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Gate to drain charge

Qgd

30

nc

I

D = 75 A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Turn-on delay time

td(on)

60

ns

V

 

GS = 10

V, ID = 40 A

 

 

Rise time

tr

300

ns

R

L = 0.75 Ω

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Turn-off delay time

td(off)

550

ns

 

 

 

 

 

 

 

 

 

Fall time

tf

400

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Body–drain diode forward voltage

VDF

1.05

V

I

F = 75 A, VGS = 0

 

 

Body–drain diode reverse

trr

90

ns

I

F = 75 A, VGS = 0

 

 

recovery time

 

 

 

 

 

 

 

diF/ dt = 50 A/ µs

 

Note: 1. Pulse test

3

Loading...
+ 7 hidden pages