GS74104TP/J
SOJ, TSOP
Commercial Temp
Industrial Temp
1M x 4
4Mb Asynchronous SRAM
8, 10, 12, 15 ns 3.3 V VDD Center VDD and VSS
Features
•Fast access time: 8, 10, 12, 15 ns
•CMOS low power operation: 150/125/110/90 mA at minimum cycle time.
•Single 3.3 V ± 0.3 V power supply
•All inputs and outputs are TTL-compatible
•Fully static operation
•Industrial Temperature Option: –40° to 85°C
•Package line up
J:400 mil, 32-pin SOJ package
TP: 400 mil, 44-pin TSOP Type II package
Description
The GS74104 is a high speed CMOS Static RAM organized as 1,048,576 words by 4 bits. Static design eliminates the need for external clocks or timing strobes. The GS operates on a single 3.3 V power supply and all inputs and outputs are TTL-com- patible. The GS74104 is available in 400 mil SOJ and 400 mil TSOP Type-II packages.
Pin Descriptions
Symbol |
Description |
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A0–A19 |
Address input |
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DQ1–DQ4 |
Data input/output |
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CE |
Chip enable input |
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WE |
Write enable input |
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OE |
Output enable input |
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VDD |
+3.3 V power supply |
VSS |
Ground |
NC |
No connect |
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SOJ 1M x 4-Pin Configuraton
A4 |
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1 |
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32 |
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A5 |
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A3 |
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2 |
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31 |
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A6 |
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A2 |
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3 |
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30 |
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A7 |
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A1 |
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4 |
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29 |
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A8 |
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A0 |
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5 |
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28 |
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A9 |
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CE |
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6 |
32-pin |
27 |
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OE |
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DQ1 |
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7 |
26 |
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DQ4 |
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VDD |
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8 |
400 mil SOJ |
25 |
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VSS |
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VSS |
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9 |
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24 |
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VDD |
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DQ2 |
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10 |
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23 |
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DQ3 |
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11 |
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22 |
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WE |
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A10 |
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A19 |
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12 |
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21 |
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A11 |
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A18 |
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13 |
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20 |
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A12 |
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A17 |
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14 |
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19 |
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A13 |
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A16 |
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15 |
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18 |
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A14 |
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A15 |
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16 |
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17 |
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NC |
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TSOP-II 1M x 4-Pin Configuration
NC |
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1 |
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44 |
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NC |
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NC |
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2 |
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43 |
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NC |
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NC |
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3 |
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42 |
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NC |
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A4 |
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4 |
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41 |
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A5 |
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A3 |
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5 |
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40 |
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A6 |
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A2 |
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6 |
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39 |
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A7 |
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A1 |
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7 |
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38 |
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A8 |
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A0 |
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8 |
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37 |
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A9 |
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9 |
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36 |
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CE |
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OE |
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DQ1 |
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10 |
44-pin |
35 |
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DQ4 |
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VDD |
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34 |
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VSS |
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VSS |
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12 |
400 mil TSOP II |
33 |
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VDD |
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DQ2 |
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13 |
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32 |
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DQ3 |
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14 |
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31 |
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WE |
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A10 |
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A19 |
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15 |
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30 |
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A11 |
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A18 |
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16 |
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29 |
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A12 |
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A17 |
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17 |
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28 |
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A13 |
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A16 |
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18 |
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27 |
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A14 |
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A15 |
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19 |
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26 |
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NC |
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NC |
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20 |
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25 |
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NC |
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NC |
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21 |
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24 |
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NC |
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NC |
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22 |
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23 |
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NC |
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Rev: 1.07 1/2001 |
1/12 |
© 1999, Giga Semiconductor, Inc. |
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104TP/J
Block Diagram
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A0 |
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Row |
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Memory Array |
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Address |
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Decoder |
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Input |
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Buffer |
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A19 |
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Decoder |
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WE |
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Control |
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I/O Buffer |
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Truth Table |
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DQ1 |
DQ4 |
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CE |
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OE |
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WE |
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DQ1 to DQ8 |
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VDD Current |
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H |
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X |
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X |
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Not Selected |
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ISB1, ISB2 |
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L |
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L |
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H |
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Read |
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L |
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X |
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L |
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Write |
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IDD |
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L |
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H |
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H |
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High Z |
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Note: X: “H” or “L”
Rev: 1.07 1/2001 |
2/12 |
© 1999, Giga Semiconductor, Inc. |
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104TP/J
Absolute Maximum Ratings
Parameter |
Symbol |
Rating |
Unit |
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Supply Voltage |
VDD |
–0.5 to +4.6 |
V |
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Input Voltage |
VIN |
–0.5 to VDD +0.5 |
V |
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(≤ 4.6 V max.) |
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Output Voltage |
VOUT |
–0.5 to VDD +0.5 |
V |
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(≤ 4.6 V max.) |
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Allowable power dissipation |
PD |
0.7 |
W |
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Storage temperature |
TSTG |
–55 to 150 |
oC |
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Recommended Operating Conditions
Parameter |
Symbol |
Min |
Typ |
Max |
Unit |
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Supply Voltage for -10/12/15 |
VDD |
3.0 |
3.3 |
3.6 |
V |
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Supply Voltage for -8 |
VDD |
3.135 |
3.3 |
3.6 |
V |
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Input High Voltage |
VIH |
2.0 |
— |
VDD +0.3 |
V |
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Input Low Voltage |
VIL |
–0.3 |
— |
0.8 |
V |
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Ambient Temperature, |
TAc |
0 |
— |
70 |
oC |
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Commercial Range |
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Ambient Temperature, |
TAI |
–40 |
— |
85 |
oC |
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Industrial Range |
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Note:
1.Input overshoot voltage should be less than VDD +2 V and not exceed 20 ns.
2.Input undershoot voltage should be greater than –2 V and not exceed 20 ns.
Rev: 1.07 1/2001 |
3/12 |
© 1999, Giga Semiconductor, Inc. |
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS74104TP/J
Capacitance
Parameter |
Symbol |
Test Condition |
Max |
Unit |
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Input Capacitance |
CIN |
VIN = 0 V |
5 |
pF |
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Output Capacitance |
COUT |
VOUT = 0 V |
7 |
pF |
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Notes:
1.Tested at TA = 25°C, f = 1 MHz
2.These parameters are sampled and are not 100% tested.
DC I/O Pin Characteristics
Parameter |
Symbol |
Test Conditions |
Min |
Max |
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Input Leakage |
IIL |
VIN = 0 to VDD |
– 1 uA |
1 uA |
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Current |
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Output Leakage |
ILO |
Output High Z |
–1 uA |
1 uA |
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Current |
VOUT = 0 to VDD |
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Output High Voltage |
VOH |
IOH = –4mA |
2.4 |
— |
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Output Low Voltage |
VOL |
ILO = +4mA |
— |
0.4 V |
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Rev: 1.07 1/2001 |
4/12 |
© 1999, Giga Semiconductor, Inc. |
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.