October 1987
Revised January 1999
CD4007C
Dual Complementary Pair Plus Inverter
General Description
The CD4007C consists of three complementary pairs of N- and P-channel enhancement mode MOS transistors suitable for series/shunt applications. All inputs are protected from static discharge by diode clamps to VDD and VSS.
For proper operation the voltages at all pins must be constrained to be between VSS − 0.3V and VDD + 0.3V at all times.
Features
■Wide supply voltage range: 3.0V to 15V
■High noise immunity: 0.45 VCC (typ.)
Ordering Code:
Order Number |
Package Number |
Package Description |
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CD4007CM |
M14A |
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow |
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CD4007CN |
N14A |
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS–001, 0.300” Wide |
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Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignments for DIP and SOIC
Note: All P-channel substrates are connected to VDD and all N-channel substrates are connected to VSS.
Top View
Inverter Plus Pair Complementary Dual CD4007C
© 1999 Fairchild Semiconductor Corporation |
DS005943.prf |
www.fairchildsemi.com |
CD4007C
Absolute Maximum Ratings(Note 1)
Voltage at Any Pin |
VSS −0.3V to VDD +0.3V |
Operating Temperature Range |
−40°C to +85°C |
Storage Temperature Range |
−65°C to +150°C |
Power Dissipation (PD) |
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Dual-In-Line |
700 mW |
Small Outline |
500 mW |
Operating VDD Range |
VSS +3.0V to VSS +15V |
Lead Temperature |
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(Soldering, 10 seconds) |
260°C |
Note 1: This device should not be connected to circuits with the power on because high transient voltages may cause permanent damage.
DC Electrical Characteristics
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Limits |
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Symbol |
Parameter |
Conditions |
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−40°C |
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+25°C |
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+85°C |
Units |
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Min |
Typ |
Max |
Min |
Typ |
Max |
Min |
Typ |
Max |
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IL |
Quiescent Device |
VDD = 5.0V |
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0.5 |
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0.005 |
0.05 |
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15 |
μA |
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Current |
VDD = 10V |
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1.0 |
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0.005 |
1.0 |
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30 |
μA |
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PD |
Quiescent Device |
VDD = 5.0V |
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2.5 |
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0.025 |
2.5 |
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75 |
μW |
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Dissipation Package |
VDD = 10V |
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10 |
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0.05 |
10 |
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300 |
μW |
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VOL |
Output Voltage |
VDD = 5.0V |
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0.05 |
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0 |
0.01 |
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0.05 |
V |
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LOW Level |
VDD = 10V |
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0.05 |
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0 |
0.01 |
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0.05 |
V |
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VOH |
Output Voltage |
VDD = 5.0V |
4.95 |
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4.95 |
5.0 |
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4.95 |
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V |
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HIGH Level |
VDD = 10V |
9.95 |
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9.95 |
10 |
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9.95 |
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V |
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VNL |
Noise Immunity |
VDD = 5.0V, VO = 3.6V |
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1.5 |
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2.25 |
1.5 |
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1.4 |
V |
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(All inputs) |
VDD = 10V, VO = 7.2V |
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3.0 |
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4.5 |
3.0 |
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2.9 |
V |
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VNH |
Noise Immunity |
VDD = 5.0V, VO = 0.95V |
3.6 |
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3.5 |
2.25 |
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3.5 |
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V |
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(All Inputs) |
VDD = 10V, VO = 2.9V |
7.1 |
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7.0 |
4.5 |
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7.0 |
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V |
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IDN |
Output Drive Current |
VDD = 5.0V, VO = 0.4V, VI = VDD |
0.35 |
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0.3 |
1.0 |
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0.24 |
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mA |
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N-Channel |
VDD = 10V, VO = 0.5V, VI = VDD |
1.2 |
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1.0 |
2.5 |
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0.8 |
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mA |
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IDP |
Output Drive Current |
VDD = 5.0V, VO = 2.5V, VI = VSS |
−1.3 |
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−1.1 |
−4.0 |
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−0.9 |
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mA |
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P-Channel |
VDD = 10V, VO = 9.5V, VI = VSS |
−0.65 |
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−0.55 |
−2.5 |
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−0.45 |
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mA |
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II |
Input Current |
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10 |
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pA |
AC Electrical Characteristics (Note 2)
TA = 25°C and CL = 15 pF and rise and fall times = 20 ns. Typical temperature coefficient for all values of VDD = 0.3%/°C
Symbol |
Parameter |
Conditions |
Min |
Typ |
Max |
Units |
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tPLH = tPHL |
Propagation Delay Time |
VDD = 5.0V |
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35 |
75 |
ns |
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VDD = 10V |
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20 |
50 |
ns |
tTLH = tTHL |
Transition Time |
VDD = 5.0V |
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50 |
100 |
ns |
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VDD = 10V |
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30 |
50 |
ns |
CI |
Input Capacitance |
Any Input |
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5 |
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pF |
Note 2: AC Parameters are guaranteed by DC correlated testing.
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