MQ162-03
Application Manual
Real Time Clock Module
RTC-72421/72423
Model |
Product Number |
RTC-72421 A |
Q4272421x000100 |
RTC-72421 B |
Q4272421x000200 |
RTC-72423 A |
Q4272423x000600 |
RTC-72423 |
Q4272423x000700 |
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NOTICE
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RTC - 72421 / 72423
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Overview ............................................................................................. |
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Block diagram ..................................................................................... |
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Terminal connections.......................................................................... |
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Terminal functions............................................................................... |
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Characteristics .................................................................................... |
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1. |
Absolute maximum ratings........................................................................................ |
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2. |
Recommended operating conditions......................................................................... |
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3. |
Frequency characteristics and current consumption characteristics.......................... |
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4. |
Electrical characteristics ( DC characteristics ) ......................................................... |
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Switching characteristics (AC characteristics) ........................................... |
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When ALE is used .................................................................................................... |
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2. |
When ALE is fixed at VDD ......................................................................................... |
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Registers............................................................................................. |
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1. |
Register table............................................................................................................ |
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2. |
Notes ........................................................................................................................ |
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3. |
Functions of register bits (overview).......................................................................... |
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4. |
Setting the fixed-period pulse output mode and fixed-period interrupt mode............. |
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5. |
Resetting the fixed-period pulse output mode and fixed-period interrupt mode......... |
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Register description ............................................................................ |
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Timing registers ........................................................................................................ |
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CD register (control register D) ............................................................................... |
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3. |
CE register (control register E)................................................................................ |
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4. |
CF register (control register F) ................................................................................ |
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Using the RTC-72421/RTC-72423 ..................................................... |
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1. |
Power-on procedure (initialization) .......................................................................... |
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2. |
Read/write of S1 to W registers .............................................................................. |
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3. |
Write to 30-second ADJ bit ..................................................................................... |
16 |
4. |
Using the CS1 pin ................................................................................................... |
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Power supply circuit example............................................................. |
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Examples of connection to general-purpose microprocessor............. |
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External dimensions........................................................................... |
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Marking layout.................................................................................... |
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Reference data .................................................................................. |
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Application notes................................................................................ |
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Notes on handling ................................................................................................... |
21 |
2. |
Notes on packaging ................................................................................................ |
21 |
RTC - 72421 / 72423
4-BIT PARALLEL INTERFACE REAL TIME CLOCK MODULE
RTC - 72421 / 72423
•Built-in crystal unit removes need for adjustment and reduces installation costs
•Microprocessor bus compatible ( tWW, tRD = 120 ns )
•Use of C-MOS IC enables low current consumption ( 5 A Max., at VDD = 2.0 V )
•Compatibility with Intel CPU bus
•Address latch enable (ALE) pin compatible with multiplex bus CPUs
•Time (hours, minutes, seconds) and calendar (year, month, day) counter
•24-hour/12-hour switchover and automatic leap-year correction functions
•Fixed-period interrupt function
•30-seconds correction (adjustment) function
•Stop, start, and reset functions
•Battery back-up function
•Same mounting conditions as general-purpose SMD ICs possible (RTC-72423)
Pins and functions compatible with the SMC-5242 series
Overview
The RTC-72421/RTC-72423 module is a real time clock that can be connected directly to a microprocessor's bus. Its built-in crystal unit enables highly accurate time-keeping with no physical access required for adjustment and, since there is no need to connect external components, mounting and other costs can be reduced.
In addition to its time and calendar functions, the RTC-72421/RTC-72423 enables the use of 30-seconds correction and fixedperiod interrupt functions.
The RTC-72421/RTC-72423 module is ideally suited for applications requiring timing management, such as personal computers, dedicated word-processors, fax machines, multi-function telephones, and sequencers.
Block diagram |
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RTC-72421/72423 |
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OSC |
Counter |
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D3 |
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RESET |
STOP |
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HOLD |
BUSY |
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D2 |
Gate |
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bit |
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24/12 |
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D1 |
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30sec ADJ |
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bit |
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D0 |
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bit |
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WR |
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S1 |
S10 |
MI1 |
MI10 |
H1 |
H10 |
W |
Gate |
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RD |
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A3 |
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S1 to CF |
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A2 |
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D1 |
D10 |
MO1 |
MO10 |
Y1 |
Y10 |
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A1 |
Latch |
Decoder |
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A0 |
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CS0 |
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Output Selector |
ALE |
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STD.P |
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64 Hz |
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CS1 |
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1 Second carry |
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CD |
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CE |
CF |
1 Minute carry |
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1 Hour carry |
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Page - 1 |
MQ - 162 - 03 |
RTC - 72421 / 72423
Terminal connections
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RTC-72421 |
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RTC-72423 |
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STD.P |
1 |
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18 |
VDD |
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STD.P |
1 |
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VDD |
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(VDD) |
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CS0 |
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CS0 |
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N.C. |
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(VDD) |
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ALE |
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(VDD) |
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ALE |
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N.C. |
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A0 |
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CS1 |
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A0 |
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CS1 |
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N.C. |
6 |
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D0 |
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A1 |
5 |
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D0 |
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A1 |
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N.C. |
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N.C. |
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N.C. |
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A2 |
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D1 |
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A2 |
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D1 |
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A3 |
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12 |
D2 |
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A3 |
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D2 |
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RD |
11 |
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D3 |
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GND |
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RD |
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11 |
D3 |
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WR |
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GND |
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WR |
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The (VDD) pins are at the same electrical level as VDD. Do not connect these pins externally. The N.C. pins are not connected internally. Ground them in order to prevent noise.
Page - 2 |
MQ - 162 - 03 |
RTC - 72421 / 72423
Terminal functions
Signal |
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Pin No. |
Input/ou |
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Function |
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tput |
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RTC-72421 |
RTC-72423 |
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Connect these pines to a bi-directional data bus or CPU data bus. Use this bus |
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to read to and write from the internal counter and registers. |
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CS1 |
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CS0 |
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RD |
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WR |
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Mode of D0 to D3 |
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D0-D3 |
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14− 16, 19 |
Bi- |
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H |
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Output mode (read mode) |
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H |
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Input mode (write mode) |
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(Data bus) |
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H |
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Do not use |
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L |
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H or L |
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High impedance (back-up mode) |
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H |
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H or L |
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High impedance (RTC not selected) |
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Address input pins used for connection to CPU address, etc. Used to select the |
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A0-A3 |
4− |
7 |
5, 7, 9, 10 |
Input |
RTC’s internal counter and registers (address selection). |
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(Address bus) |
When the RTC is connected to a multiplexed-bus type of CPU, these pines can |
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also be used in combination with the ALE described below |
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Reads in address data and |
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state for internal latching. |
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CS0 |
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When the ALE is high, the address data and |
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state is read into the RTC. |
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CS0 |
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When the (through-mode) ALE falls, the address data and |
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state at that |
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CS0 |
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ALE |
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point are held. The held address data and |
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status are maintained while |
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3 |
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4 |
Input |
CS0 |
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(Address Latch Enable) |
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the ALE is low. |
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ALE |
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Address data and |
CS0 |
status |
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H |
Read into the RTC to set address data |
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L |
Held in the RTC (latched at the trailing edge of the ALE) |
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If the RTC is connected to a CPU that does not have an ALE pin and thus there |
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is no need to use this ALE pin, fix it to VDD. |
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Writes the data on D0 to D3 into the register of the address specified by A0 to |
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WR |
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A3, at the leading edge of |
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10 |
13 |
Input |
WR |
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(WRite) |
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Make sure that |
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RD |
and |
WR are never low at the same time. |
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Output data to D0 to D3 from the register at the address specified by A0 to A3, |
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RD |
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while |
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low. |
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8 |
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11 |
Input |
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RD |
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(ReaD) |
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RD |
and |
WR are never low at the same time. |
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When CS1 is high and |
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is low, the RTC’s chip-select function is valid and |
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CS0 |
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read and write are enabled. |
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When the RTC is connected to a multiplexed-bus type of CPU, |
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requires |
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CS1, |
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CS0 |
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CS0 |
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15,2 |
20,2 |
Input |
the operation of the ALE (see the description of the ALE). |
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(Chip Select) |
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Use CS1 connected to a power voltage detection circuit. When CS1 is high, the |
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RTC is enabled; when it is low, the RTC is on standby. |
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When CS1 goes low, the HOLD and RESET bits in the RTC registers are |
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cleared to 0. |
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This is an N-channel open drain output pin. |
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Depending on the setting of the CE register, a fixed-period interrupt signal and a |
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pulse signal are output. |
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The output from this pin cannot be inhibited by the CS1 and |
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signals. |
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CS0 |
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Use a load voltage that is less than or equal to VDD. If not using this pin, keep it |
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open-circuit. |
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An example of STD.P connection is shown below. |
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+5 V or VDD |
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STD.P |
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RTC |
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At least 2.2 kΩ |
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1 |
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1 |
Output |
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(STanDard Pulse) |
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STD.P |
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If the STD.P output is not be used during standby operation, connecting the pull- |
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up resister to +5 V provides a reduction in current consumption. If the STD.P |
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output is to be used even during standby, connect the pull-up resistor to the |
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RTC’s VDD. In this case, the current consumption will be increased by the |
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amount of current flowing through the pull-up resistor. |
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VDD |
18 |
24 |
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Connect this pin to power source. Supply to 5 V ± |
10 % to this pin during normal |
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operation; at least 2 V during battery back-up operation. |
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GND |
9 |
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12 |
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Connect this pin to ground. |
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(VDD) |
16, 17 |
22,23 |
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These pins are connected internally to VDD. Leave them open circuit. |
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N.C. |
− |
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3, 6, 8, |
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These pins are not connected internally. Ground them. |
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17, 18, 21 |
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Page - 3 |
MQ - 162 - 03 |
RTC - 72421 / 72423
Characteristics
1. Absolute maximum ratings
Item |
Symbol |
Condition |
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Specification |
Unit |
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Supply voltage |
VDD |
Ta=+25 ° C |
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− 0.3 |
to |
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7.0 |
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V |
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Input voltage |
VI |
Ta=+25 ° C |
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GND− 0.3 |
to |
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VDD+0.3 |
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V |
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Output voltage |
VO |
Ta=+25 ° C |
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GND− 0.3 |
to |
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VDD+0.3 |
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V |
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Storage temperature |
TSTG |
RTC-72421 |
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− 55 |
to |
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+85 |
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° C |
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RTC-72423 |
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− 55 |
to |
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+125 |
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° C |
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2. Recommended operating conditions |
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Item |
Symbol |
Condition |
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Specification |
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Unit |
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Supply voltage |
VDD |
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4.5 |
to |
5.5 |
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V |
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Operating temperature |
TOPR |
No condensation |
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RTC-72421 ; − |
10 to +70 |
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° C |
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RTC-72423 ; − 40 to +85 |
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° C |
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Data hold voltage |
VDH |
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2.0 |
to |
5.5 |
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V |
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CS1 data hold time |
tCDR |
See the section on data |
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2.0 Min. |
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µ s |
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hold timing |
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Operation recovery time |
tr |
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3. Frequency characteristics and current consumption characteristics |
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Item |
Symbol |
Condition |
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Specification |
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Unit |
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RTC-72421A |
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± |
10 |
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Frequency tolerance |
∆ f/f0 |
Ta=+25 ° C |
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RTC-72421B |
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± |
50 |
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VDD=5.0 V |
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RTC-72423A |
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± |
20 |
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RTC-72423 |
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± |
50 |
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× |
-6 |
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10 |
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RTC-72421 : − 10 ° C to +70 ° C |
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+10 / − 120 |
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(+25 ° C reference) |
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Operation temperature |
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RTC-72423 : − 40 ° C to +85 ° C |
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+10 / − 220 |
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(+25 ° C reference) |
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Frequency voltage |
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Ta=+25 ° C |
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± |
5 Max. |
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× 10-6 / V |
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characteristics |
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VDD=2.0 V to 5.5 V |
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Aging |
fa |
VDD=5.0 V, Ta=+25 ° C |
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± |
5 Max. |
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× 10-6 / year |
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Drop test 3 times on a hard board from |
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Shock resistance |
S.R. |
0.75 m height, or 29400 m/s2 × 0.2 ms × |
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± |
10 Max. |
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× |
10-6 |
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1/2 sin wave × 3 directions |
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Current consumption |
IDD1 |
Ta=+25 ° C, CS1=0 V |
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VDD=5.0 V |
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1.0 Typ. |
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10 Max. |
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µ A |
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IDD2 |
I/O currents excluded |
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VDD=2.0 V |
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0.9 Typ. |
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5 Max. |
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4. Electrical characteristics ( DC characteristics )
Item |
Symbol |
Condition |
Applicable pins |
Min. |
Typ. |
Max. |
Unit |
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High input voltage 1 |
VIH1 |
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All input pins except for |
2.2 |
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V |
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CS1 |
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Low input voltage 1 |
VIL1 |
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0.8 |
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High input voltage 2 |
VIH2 |
VDD=2.0 V to |
CS1 |
4/5VDD |
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V |
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5.5 V |
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Low input voltage 2 |
VIL2 |
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1/5VDD |
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Input leakage current 1 |
ILK1 |
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Input pins except for |
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1/-1 |
µ A |
VI=VDD/0 V |
D0 to D3 |
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Input leakage current 2 |
ILK2 |
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10/-10 |
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D0 to D3 |
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Low output voltage 1 |
VOL1 |
IOL=2.5 mA |
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0.4 |
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High output voltage |
VOH |
IOH=-400 µ A |
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2.4 |
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V |
Low output voltage 2 |
VOL2 |
IOL=2.5 mA |
STD.P |
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0.4 |
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Off-state leakage current |
IOFFLK |
VI = VDD / 0 V |
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10/-10 |
µ A |
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Input capacitance |
CI |
Input |
Input pins except for |
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10 |
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D0 to D3 |
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frequency |
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pF |
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Input-output capacitance |
CI/O |
1 MHz |
D0 to D3 and STD.P |
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20 |
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Page - 4 |
MQ - 162 - 03 |
RTC - 72421 / 72423
Switching characteristics (AC characteristics)
1. When ALE is used
Write mode |
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( VDD=5 V ± 0.5 V, |
RTC-72421;Ta=− 10 ° C to +70 ° C, RTC-72423;Ta=− 40 ° C to +85 ° C ) |
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Item |
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Symbol |
Condition |
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Min. |
Max. |
Unit |
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CS1 set-up time |
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tSU(CS1) |
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1000 |
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Address set-up time before ALE |
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tSU(A-ALE) |
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50 |
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Address hold time after ALE |
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th(ALE-A) |
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50 |
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ALE pulse width |
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tw(ALE) |
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80 |
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ALE set-up time before write |
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tSU(ALE-W) |
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0 |
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Write pulse width |
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tw(W) |
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120 |
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ns |
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ALE set-up time after write |
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tSU(W-ALE) |
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50 |
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Data input set-up time before write |
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tSU(D-W) |
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80 |
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Data input hold time after write |
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th(W-D) |
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10 |
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CS1 hold time |
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th(CS1) |
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1000 |
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Write recovery time |
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trec(W) |
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200 |
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Read mode |
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( VDD=5 V ± 0.5 V, |
RTC-72421;Ta=− 10 ° C to +70 ° C, RTC-72423;Ta=− 40 ° C to +85 ° C ) |
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Item |
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Symbol |
Condition |
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Min. |
Max. |
Unit |
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CS1 set-up time |
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tSU(CS1) |
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1000 |
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Address set-up time before ALE |
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tSU(A-ALE) |
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50 |
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Address hold time after ALE |
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th(ALE-A) |
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50 |
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ALE pulse width |
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tw(ALE) |
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80 |
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ALE set-up time before read |
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tSU(ALE-R) |
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0 |
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ns |
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ALE set-up time after read |
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tSU(R-ALE) |
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50 |
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Data output transfer time after read |
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tPZV(R-Q) |
CL=150 pF |
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120 |
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Data output floating transfer time after read |
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tPVZ(R-Q) |
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0 |
70 |
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CS1 hold time |
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th(CS1) |
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1000 |
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Read recovery time |
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trec(W) |
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200 |
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(1) Write mode |
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VIH2 |
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VIH2 |
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CS1 |
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tsu(CS1) |
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tsu(A-ALE) |
th(ALE-A) |
th(CS1) |
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A0 to A3 |
VIH1 |
VIH1 |
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CS0 |
VIL1 |
VIL1 |
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tw(ALE) |
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VIH1 |
VIH1 |
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ALE |
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VIL1 |
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VIL1 |
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tsu(ALE-W) |
tw(W) |
tsu(W-ALE) |
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VIH1 |
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VIH1 |
WR |
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VIL1 |
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VIL1 |
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tsu(D-W) |
th(W-D) |
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VIH1 |
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VIH1 |
D0 to D3 |
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(Input) |
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VIL1 |
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VIL1 |
(2) Read mode
|
VIH2 |
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VIH2 |
CS1 |
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tsu(CS1) |
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th(CS1) |
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tsu(A-ALE) th(ALE-A) |
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A0 to A3 |
VIH1 |
VIH1 |
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CS0 |
VIL1 |
VIL1 |
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tw(ALE) |
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VIH1 |
VIH1 |
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ALE |
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VIL1 |
VIL1 |
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tsu(ALE-R) |
tsu(R-ALE) |
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VIH1 |
VIH1 |
RD |
VIL1 |
VIL1 |
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tpzv(R-Q) |
tpvz(R-Q) |
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VIH1 |
VIH1 |
D0 to D3 |
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(Input) |
VIL1 |
VIL1 |
Page - 5 |
MQ - 162 - 03 |