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Overview: Components and Features

with the PICMG® AMC.0 Revision 2.0 Advanced Mezzanine Card Base Specification with the exception of a couplenon-conformances.See the KAT4000 Errata for details. Each AMC site is individually configurable. Chapter 8 provides more information.

System Management: The KAT4000 supports an Intelligent Platform Management Interface (IPMI) based on a Renesas microcontroller with a UART interface for processor to IPMC communication (fixed rate at 115,200 baud) and dual redundantIPMB-A/Binterfaces. The IPMC allows for features such as remote shutdown, remote reset, payload voltage monitoring, temperature monitoring, and access to Field Replaceable Unit (FRU) data. Chapter 9 provides more information.

Synchronization Clock: The synchronization clock interface consists of MT9045 or MT9046 T1/E1 system synchronizers. Chapter 10 provides more information.

RTC: TheReal-TimeClock (RTC) is an ST®Microelectronics M41T00 Serial Access Timekeeper®. Chapter 11 provides more information.

Caution: There are no serviceable parts in this product. Return all damaged boards to Emerson for

!repair (see page 2-18).

KAT4000 Options

No-CPU Configuration: Ano-CPUKAT4000 board configuration is available. This configuration includes 256 Kb of SRAM memory used by the internal 8051 microcontroller on the VSC7376 Ethernet core switch for run time code storage. This configuration omits SDRAM and NOR and NAND flash. Appendix A provides more information.

Ethernet Core Switch: The Ethernet core switch provides the interconnect between the fat pipe switch module, the Ethernet ports on the AMC sites, two channels on the ATCA backplane Base fabric, the processor, and the Update Channel (optional). A Vitesse VSC7376 GbE switch implements this function. “Ethernet Core Switch (optional)” on page4-2provides more information.

PCI Express Switch: The PCIe switch provides the interconnect between the AMC sites, the processor, and the fat pipe switch module. A PLX Technology PEX 8524 PCIe switch implements this function. “PCI Express Switch (optional)” on page4-7provides more information.

Note: Of the Ethernet core switch and the PCI Express switch, at least one of the two switches must be used on the board. The board can also use both switches.

10007175-02

KAT4000 User’s Manual

1-3

 

 

 

Overview: Components and Features

Fat Pipe Switch Module:

A high-speedfat pipe switch is provided as aplug-overmodule. It supports GbE, Serial Rapid IO (sRIO), PCI Express (PCIe) or 10 Gigabit Ethernet (10 GbE). This switch provides an interconnect between the AMC sites, the ATCAhigh-speedfabric ports, the processor, the PCIe switch and the Ethernet core switch. See “Fat Pipe Switch Module”, Chapter 5, for information on your module’s configuration.

Rear Transition Module (RTM):

The optional transition modules provide access to 16 or 32 ports when AMCs are installed on the KAT4000. AMC site ports 12-20are routed to Zone 3 for Rear Transition Module (RTM) I/O. 64 AMC signals route to 264 pins in Zone 3 (see “Zone 3” on page12-4).There are nine T1/E1 ports per AMC site routed as differential pairs (64 signals). There are separate I2C connections to the IPMC and the processor, and two ports each from the fat pipe switch module and the Ethernet Core switch. A serial port and GbE port are provided for development purposes only.

1-4

KAT4000 User’s Manual

10007175-02

 

 

 

Overview: Functional Overview

FUNCTIONAL OVERVIEW

The following block diagram provides a functional overview for the KAT4000:

Figure 1-1: General System Block Diagram

 

 

10/100

 

 

Xfmr

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PHY

 

 

 

 

 

 

 

 

To Zone 3

 

 

 

 

 

 

 

 

 

 

 

EIA-232

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Optional)

 

 

 

 

 

 

 

 

 

 

 

Transceiver

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Serial

 

 

 

 

 

 

 

 

 

 

 

PEX8524

 

 

Header

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCI Express Switch

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Optional)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

To Zone 3

 

 

 

 

 

 

4 SERDES

 

 

 

 

 

 

 

VSC7376

SERDES

 

 

 

 

 

 

 

 

2 SERDES

 

 

SERDES

 

 

 

 

 

 

 

 

 

 

 

 

Ethernet Core Switch

 

 

 

 

 

 

 

To local bus

 

SERDES

 

 

 

 

 

 

 

 

Layer 2 (Optional)

 

 

 

 

 

 

 

 

 

 

 

 

(MII)

 

 

 

 

 

 

 

 

 

2 SGMII

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2 SERDES

 

 

 

 

 

 

 

 

 

 

 

 

Eth

 

 

 

 

 

 

 

 

 

 

Optional

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Debug

 

Serial

 

 

 

GbE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PHYs (

 

 

 

 

 

 

 

 

 

 

 

10/100

 

 

 

 

 

GMII/RGMII

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCIe

 

 

 

NAND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Flash

 

 

 

 

 

 

 

 

 

 

SO-DIMM

 

 

 

 

 

I2C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Main PLD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I2C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SEEPROM

To Zone 3

 

SROM

 

 

 

 

Xfmr (2)

 

 

 

 

 

 

DDR2-667

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CPU Init

 

 

 

User 2

 

 

 

 

 

 

 

 

 

 

 

 

 

2GB

 

 

 

 

 

 

SEEPROM

 

 

SEEPROM

 

 

 

 

 

 

 

2

 

 

AMC (x4) Single-Width,

Half-/Full-/Extended-Height

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AMC.0 Common

 

AMC.z

 

Extended

 

 

 

 

 

Fat Pipes

 

 

 

 

PCIe or GbE

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IPMB-LI

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IPMC

 

 

 

 

 

 

Clock

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

To Zone 3

 

 

4 SERDES

 

 

 

 

processor

 

 

 

 

 

 

 

 

 

 

 

 

 

Serial2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-48V

 

 

 

 

 

 

 

 

 

 

 

 

 

Private I2C

Cnvrtr

EIA-232

 

 

 

 

 

 

To

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Sensors

 

 

 

Xcvr

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Serial

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Header

 

 

 

 

4 SERDES

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(no conn.

 

 

 

 

 

 

 

Fat Pipe Switch Module

 

 

 

for

 

 

 

 

 

 

 

 

 

 

GbE)

 

 

 

 

 

SERDES GbE

 

Fabric Options:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GbE, sRIO,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10-1GbE or10-10GbE

 

 

 

 

 

 

 

To Eth

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Core

 

 

4 SERDES

 

 

 

 

 

 

4 SERDES

 

 

 

 

 

 

 

 

Switch

 

 

 

To

local

bus

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

4

 

 

9

 

2

 

IPMB

Base

High Speed

High Speed

Clock

RTM I/O

 

 

Fabric A

Fabric B

 

(Optional)

P10

 

J23

 

J20

Zone 3

 

 

 

 

 

 

Zone 3

Connections

(Opt.)

10007175-02

KAT4000 User’s Manual

1-5

 

 

 

Overview: Physical Memory Map

PHYSICAL MEMORY MAP

Fig. 1-2 illustrates the KAT4000 memory map:

Figure 1-2: KAT4000 Memory Map

Hex Address

FFFF,FFFF

FFF0,0000

FF80,0000

FF70,0000

FC88,0000

FC80,0000

FC48,0000

FC40,0000

FC18,0000

FC14,0000

FC12,0000

FC10,0000

FC00,8000

FC00,0000

E200,0000

E000,0000

A000,0000

8000,0000

3FFF,FFFF

1FFF,FFFF

0000,0000

Boot Area (1 MB)

Reserved

CCSRBAR (MPC8548 Registers, 1 MB)

Reserved

Socketed Flash (if installed) (512 KB)

Reserved

CPLD Registers (512 KB)

Reserved

Fat Pipe Switch Registers

(if installed) (256 KB)

Reserved

Ethernet Core Switch Registers (128 KB)

Reserved

NAND Flash (32 KB)

Reserved

NOR Flash (32 MB)

PCIe Switch or sRIO Fat Pipe Module (if installed) (1 GB)

PCI Express Switch (if installed) (512 MB)

Reserved

Reserved

SDRAM

 

 

DDR2

SDRAM

(1 GB)

DDR2

 

(512 MB)

 

Hex Address

FC40,00B0

FC40,00AC

FC40,00A8

FC40,00A4

FC40,00A0

FC40,009C

FC40,0098

FC40,0094

FC40,0090

FC40,008C

FC40,0088

FC40,0084

FC40,0080

FC40,007C

FC40,0078

FC40,0074

FC40,0070

FC40,006C

FC40,0068

FC40,0064

FC40,0060

FC40,005C

FC40,0058

FC40,0054

FC40,0050

FC40,004C

FC40,0048

FC40,0044

FC40,0040

FC40,003C

FC40,0038

FC40,0034

FC40,0030

FC40,002C

FC40,0028

FC40,0024

FC40,0020

FC40,001C

FC40,0018

FC40,0014

FC40,0010

FC40,000C

FC40,0008

FC40,0004

FC40,0000

Clock Sync. Interrupt Register 3

Clock Sync. Interrupt Register 2

Clock Sync. Interrupt Register 1

Clock Control, aTCA CLK3 B Register

Clock Control, aTCA CLK3 A Register

Clock Control, AMC4 CLK3 Register

Clock Control, AMC4 CLK2 Register

Clock Control, AMC4 CLK1 Register

Clock Control, AMC3 CLK3 Register

Clock Control, AMC3 CLK2 Register

Clock Control, AMC3 CLK1 Register

Clock Control, AMC2 CLK3 Register

Clock Control, AMC2 CLK2 Register

Clock Control, AMC2 CLK1 Register

Clock Control, AMC1 CLK3 Register

Clock Control, AMC1 CLK2 Register

Clock Control, AMC1 CLK1 Register

Reserved

Clock Sync. Secondary Source 3

Clock Sync. Secondary Source 2

Clock Sync. Secondary Source 1

Reserved

Clock Sync. Primary Source 3

Clock Sync. Primary Source 2

Clock Sync. Primary Source 1

Reserved

Clock Sync. Control Register 3

Clock Sync. Control Register 2

Clock Sync. Control Register 1

RTM GPIO Control Register

RTM GPIO State Register

MISC Control Register

Boot Device Redirection Register

Scratch Register 1

Reset Command Register 2

Reset Command Register 1

Reset Event Register

LED Control Register

Jumper Settings Register

Reserved

Hardware Config. Register 0

PLL Configuration Register

PLD Version Register

Hardware Version Register

Product ID Register

1-6

KAT4000 User’s Manual

10007175-02

 

 

 

Overview: Physical Memory Map

Table 1-1 summarizes the physical addresses for the KAT4000 and provides references to more detailed information:

Table 1-1: KAT4000 Address Summary

Physical

Access

 

 

Address (hex):

Mode:

Description:

See Page:

FFF0,0000

R/W

Boot Area (1 MB)

 

 

 

 

FF80,0000

Reserved

FF70,0000

W

CCSRBAR (MPC8548 Registers, 1 MB)

FC88,0000

Reserved1

FC80,0000

R/W

Socketed Flash (if installed) (512 KB)

6-1

 

 

 

 

FC48,0000

Reserved

FC40,00B0

R/W

Clock Synchronizer Interrupt Register 3 (CSI3)

7-18

 

 

 

 

FC40,00AC

R/W

Clock Synchronizer Interrupt Register 2 (CSI2)

7-18

 

 

 

 

FC40,00A8

R/W

Clock Synchronizer Interrupt Register 1 (CSI1)

7-18

 

 

 

 

FC40,00A4

R/W

Clock Control, aTCA CLK3 B Register (CCR14)

7-17

 

 

 

 

FC40,00A0

R/W

Clock Control, aTCA CLK3 A Register (CCR13)

7-17

 

 

 

 

FC40,009C

R/W

Clock Control, AMC4 CLK3 Register (CCR12)

7-17

 

 

 

 

FC40,0098

R/W

Clock Control, AMC4 CLK2 Register (CCR11)

7-17

 

 

 

 

FC40,0094

R/W

Clock Control, AMC4 CLK1 Register (CCR10)

7-17

 

 

 

 

FC40,0090

R/W

Clock Control, AMC3 CLK3 Register (CCR9)

7-17

 

 

 

 

FC40,008C

R/W

Clock Control, AMC3 CLK2 Register (CCR8)

7-17

 

 

 

 

FC40,0088

R/W

Clock Control, AMC3 CLK1 Register (CCR7)

7-17

 

 

 

 

FC40,0084

R/W

Clock Control, AMC2 CLK3 Register (CCR6)

7-17

 

 

 

 

FC40,0080

R/W

Clock Control, AMC2 CLK2 Register (CCR5)

7-17

 

 

 

 

FC40,007C

R/W

Clock Control, AMC2 CLK1 Register (CCR4)

7-17

 

 

 

 

FC40,0078

R/W

Clock Control, AMC1 CLK3 Register (CCR3)

7-17

 

 

 

 

FC40,0074

R/W

Clock Control, AMC1 CLK2 Register (CCR2)

7-17

 

 

 

 

FC40,0070

R/W

Clock Control, AMC1 CLK1 Register (CCR1)

7-17

 

 

 

 

FC40,006C

Reserved

FC40,0068

R/W

Clock Synchronizer Secondary Source Register 3 (CSS3)

7-15

 

 

 

 

FC40,0064

R/W

Clock Synchronizer Secondary Source Register 2 (CSS2)

7-15

 

 

 

 

FC40,0060

R/W

Clock Synchronizer Secondary Source Register 1 (CSS1)

7-15

 

 

 

 

FC40,005C

Reserved

FC40,0058

R/W

Clock Synchronizer Primary Source Register 3 (CPS3)

7-14

 

 

 

 

FC40,0054

R/W

Clock Synchronizer Primary Source Register 2 (CPS2)

7-14

 

 

 

 

FC40,0050

R/W

Clock Synchronizer Primary Source Register 1 (CPS1)

7-14

 

 

 

 

FC40,004C

Reserved

FC40,0048

R/W

Clock Synchronizer Control Register 3 (CSC3)

7-13

 

 

 

 

FC40,0044

R/W

Clock Synchronizer Control Register 2 (CSC2)

7-13

 

 

 

 

FC40,0040

R/W

Clock Synchronizer Control Register 1 (CSC1)

7-13

 

 

 

 

10007175-02

KAT4000 User’s Manual

1-7

 

 

 

Overview: Physical Memory Map

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Physical

 

Access

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

See Page:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Address (hex):

 

Mode:

 

Description:

 

(continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,003C

 

R/W

 

RTM GPIO Control Register (RGCR)

 

7-7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,0038

 

R

 

RTM GPIO State Register (RGSR)

 

7-6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,0034

 

R/W

 

MISC Control (PCIe, SIO, I2C, Test Clock) Register (MISC)

 

7-7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,0030

 

R

 

Boot Device Redirection Register (BDRR)

 

7-12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,002C

 

R/W

 

Scratch Register 1 (SCR1)

 

7-8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,0028

 

W

 

Reset Command Register 2 (RCR2)

 

7-10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,0024

 

W

 

Reset Command Register 1 (RCR1)

 

7-9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,0020

 

R

 

Reset Event Register (RER)

 

7-9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,001C

 

R/W

 

LED Control Register (LEDR)

 

7-5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,0018

 

R

 

Jumper Settings Register (JSR)

 

7-6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC00,0014

 

 

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,0010

 

R

 

Hardware Configuration Register 0 (HCR0)

 

7-4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,000C

 

R/W

 

PLL Configuration Register (PLLC)

 

7-4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,0008

 

R

 

PLD Version Register (PVR)

 

7-3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,0004

 

R

 

Hardware Version Register (HVR)

 

7-3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC40,0000

 

R

 

Product ID Register (PIDR)

 

7-2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC18,0000

 

 

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC14,0000

 

R/W

 

Fat Pipe Ethernet Switch Registers (if installed) (256 KB)

 

5-2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC12,0000

 

 

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC10,0000

 

R/W

 

Ethernet Core Switch Registers (128 KB)

 

4-2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC00,8000

 

 

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FC00,0000

 

R/W

 

NAND Flash (32 KB)

 

6-2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E200,0000

 

 

Reserved1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E000,0000

 

R/W

 

NOR Flash (32 MB)

 

6-1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A000,0000

 

R/W

 

PCI Express Switch or sRIO Fat Pipe Switch Module (if installed)

 

4-7or5-22

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(1 GB)2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8000,0000

 

 

 

 

 

 

R/W

 

PCI Express Switch (if installed) (512 MB)2

 

4-7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4000,0000

 

 

 

 

 

 

 

Reserved1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0000,0000

 

 

 

 

 

 

R/W

 

SDRAM DDR2 (512 MB/1 GB)

 

6-2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1.Depends on Flash/memory size.

2.Both the PCI Express Switch and sRIO Fat Pipe Switch Module are optional. If both devices are discovered onboard, then the PCIe switch will be allocated 512 MB and the sRIO fat pipe switch module will be allocated 1 GB of addressable space. If neither device is found onboard, the entire 1.5 GB area is reserved.

1-8

KAT4000 User’s Manual

10007175-02

 

 

 

Overview: AMC Mapping

AMC MAPPING

The figure below shows how the KAT4000 maps to the ports defined by the AMC.0 specification:

Figure 1-3: AMC Port Mapping Regions

 

 

 

 

 

 

Port #

 

 

Port Mapping

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CLK1

 

 

 

Clocks

 

 

SYNCLK

 

 

 

 

 

 

 

 

CLK2

 

 

 

 

 

SYNCLK

 

 

 

 

 

 

Basic

 

CLK3

 

 

 

 

 

 

 

 

REFCLK/SYNCLK

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

GbE

 

 

 

 

 

 

 

Connector

 

1

 

Common Options

PCIe or GbE

 

 

 

 

 

 

 

5

 

 

 

Region

 

 

below for

 

 

 

 

 

 

 

 

2

 

 

 

 

 

See below for

 

 

 

 

 

 

 

 

3

 

 

 

 

 

 

 

 

port routing

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

 

See

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

 

Fat Pipes Region

 

 

configuration

 

 

 

 

 

 

 

 

7

 

 

 

options

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9

 

 

 

 

 

 

 

 

See below

 

 

 

 

 

 

Extended

 

10

 

 

 

 

 

 

 

 

for port

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

routing

 

 

 

 

 

 

 

 

 

 

 

11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

13

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Connector

 

14

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15

 

Extended Options

 

 

 

 

 

 

 

 

 

 

 

 

 

16

 

 

Zone 3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Region

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

17

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

18

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

19

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

20

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AMC.0 Definition

 

 

KAT4000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Implementation

 

AMC to AMC Implementation of Ports 2 and 3

 

 

 

GbE Fat Pipe

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Switch Module

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Implementation

 

B4

 

 

 

B3

 

B2

 

 

B1

 

 

 

 

 

 

 

 

 

2

3

 

2

3

 

2

 

3

 

2

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

sRIO Fat Pipe

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Switch Module

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Implementation

 

AMC to AMC Implementation of Ports 8–11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10-1GbE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B4

 

 

 

B2

 

B3

 

 

B1

 

 

 

 

Fat Pipe

 

 

 

 

 

 

 

 

 

 

Switch Module

8 9 10 11

 

8 9 10 11

 

8 9 10 11

 

8 9 10 11

 

Implementation

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port #

4GbE x1

5GbE x1

GbE x1

7GbE x1

Port #

4sRIO x1

5sRIO

x4

7

Port #

4GbE x1

5GbE x1

GbE x1

7GbE x1

10-10GbE

Port #

 

4

 

Fat Pipe

5

10 GbE

Switch Module

Implementation

x4

 

 

7

10007175-02

KAT4000 User’s Manual

1-9

 

 

 

Overview: Additional Information

Clocks: This region supports a subset of the clock architecture, as defined in the AMC.0 specification.

Common Options: This region supports essential interfaces that are common across multiple Fat Pipe implementations.

Fat Pipes: This region supports data path connections including GbE, sRIO, PCIe, and 10 GbE. It can carry large amounts of data without significantly degrading the speed of transmission.

Extended Options: This region supports Rear Transition Modules. Also, it may be used to extend the Common Options and Fat Pipes Regions, when required.

x1, x2, x4: This refers to the link width of the port (the number of lanes that can be used to interconnect between two link partners).

ADDITIONAL INFORMATION

This section lists the KAT4000 hardware regulatory certifications and briefly discusses the terminology and notation conventions used in this manual. It also lists general technical references.

Mean time between failures (MTBF) has been calculated at greater than 315,816 hours for the KAT4000 and greater than 264,795 hours for the KAT4000 with a GbE fat pipe switch module. MTBFs were calculated using Method I Case 3, Telcordia Issue 1 model at 30° C.

Product Certification

The KAT4000 hardware has been tested to comply with various safety, immunity, and emissions requirements as specified by the Federal Communications Commission (FCC), Industry Canada (IC), Underwriters Laboratories Inc.® (UL), and the European Union Directives (CE mark). The following table summarizes this compliance:

Table 1-2: Regulatory Agency Compliance

Type:

Specification:

Safety

IEC60950/EN60950 – Safety of Information Technology Equipment

 

(Western Europe)

 

UL60950, CSA C22.2 No. 60950, Third Edition – Safety of Information

 

Technology Equipment, including Electrical Business Equipment (BI-

 

National)

 

AS/NZS 60950:2000 – Safety Standard for Australia and New Zealand

 

Global IEC – CB Scheme Report IEC 60950, all country deviations

 

 

1-10

KAT4000 User’s Manual

10007175-02

 

 

 

Overview: Additional Information

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Type:

 

Specification: (continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Environmental

 

NEBS™: Telcordia™ GR-63(applies to an entire system) –

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Section 4.3 Equipment Handling Criteria;

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Section 4.4.1 Earthquake Environment and Criteria (Zone 4);

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Section 4.4.3 Office Vibration Environment and Criteria;

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Section 4.4.4 Transportation Vibration Criteria

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EMC

 

FCC Part 15, Class B – Title 47, Code of Federal Regulations, Radio

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Frequency Devices

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICES 003, Class A – Industry Canada Interference-causingEquipment

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Standard for Digital Apparatus

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NEBS: Telcordia GR-1089level 3 – Emissions and Immunity (circuit pack

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

level testing only)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EN300386 – Electromagnetic Compatibility and Radio Spectrum Matters

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(ERM), Telecommunication Network Equipment, Electromagnetic

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Compatibility (EMC) Requirements

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AS/NZS 3548 003 – Standard for radiated and conducted emissions for

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Australia and New Zealand, Class A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Emerson maintains test reports that provide specific information regarding the methods and equipment used in compliance testing. Unshielded external I/O cables, loose screws, or a poorly grounded chassis may adversely affect the KAT4000’s ability to comply with any of the stated specifications.

UL Certification

The UL web site at ul.com has a list of Emerson’s UL certifications.

1To find the list, go to the web site and search in the online certifications directory using Emerson’s UL file number, E190079. There is a list for products distributed in the United States, as well as a list for products shipped to Canada.

2Products are listed by board type followed by the model name and/or number. The KAT4000 is an AdvancedTCA (ATCA) blade. The model number is KAT4000’s Printed Circuit Board (PCB) artwork number, which is 10007505-xx.

RoHS Compliance

The KAT4000, all fat pipe modules listed in Chapter 5, and the RTM described in Chapter 13 are compliant with the European Union’s RoHS (Restriction of Use of Hazardous Substances) directive created to limit harm to the environment and human health by restricting the use of harmful substances in electrical and electronic equipment. Effective July 1, 2006, RoHS restricts the use of six substances: cadmium (Cd), mercury (Hg), hexavalent chromium (Cr (VI)), polybrominated biphenyls (PBBs), polybrominated diphenyl ethers

10007175-02

KAT4000 User’s Manual

1-11

 

 

 

Overview: Additional Information

(PBDEs) and lead (Pb). Configurations that are RoHS compliant are built with lead-freesolder. Configurations that are5-of-6are built withtin-leadsolder per thelead-in-solderRoHS exemption.

To obtain a certificate of conformity (CoC) for the KAT4000 or other modules, send an e- mail to sales@artesyncp.com or call 1-800-356-9602.Have the part number(s) (e.g.,C000####-##)for your configuration(s) available when contacting Emerson.

Terminology and Notation

Active low signals: An active low signal is indicated with an asterisk * after the signal name.

Byte, word: Throughout this manualbyte refers to 8 bits,word refers to 16 bits, andlong word refers to 32 bits,double long word refers to 64 bits.

PLD: This manual uses the acronym,PLD, as a generic term for programmable logic device (also known as FPGA, CPLD, EPLD, etc.).

Radix 2 and 16: Hexadecimal numbers end with a subscript16 or begin with0x. Binary numbers are shown with a subscript2.

Technical References

Further information on basic operation and programming of the KAT4000 components can be found in the following documents:

Table 1-3: Technical References

Device / Interface:

Document: 3

AMC/ATCA

Advanced Mezzanine Card Base Specification

 

(PICMG® AMC.0 Rev. 2.0: November 15, 2006)

 

PCI Express and Advanced Switching on AdvancedMC

 

(PICMG® AMC.1 Rev. 1.0: January 20, 2005)

 

AdvancedTCA® Base Specification

 

(PICMG® 3.0 Rev. 2.0: March 18, 2005)

 

Engineering Change Notice 3.0-2.0-001

 

(PICMG® 3.0 Rev. 2.0: ECN3.0-2.0-001;June 15, 2005)

 

AdvancedTCA® Ethernet/Fibre Channel for AdvancedTCA® Systems

 

(PICMG® 3.1 Rev. 1.0: January 22, 2003)

 

http://www.picmg.org

 

 

CPLD

MAX®II Device Handbook

 

(Altera® MII5V1-1.3,Preliminary; December 2004)

 

http://www.altera.com

 

 

1-12

KAT4000 User’s Manual

10007175-02