How it Works
show menu
DELL
Loading...
V3700
Schematics
90 pgs1.56 Mb0
Schematics
6 pgs79.06 Kb0

DELL V3700 Schematics

0 (0)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Vostro Calpella
SA
Cover Page
Custom
1 90Thursday, September 03, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Vostro Calpella
SA
Cover Page
Custom
1 90Thursday, September 03, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Vostro Calpella
SA
Cover Page
Custom
1 90Thursday, September 03, 2009
UMA
Intel Ibex Peak-M
2009-09-03
REV : SA
uFCPGA Mobile Arrandale/Clarksfield
DY : Nopop Component
UMA : Pop when schematic is UMA
DIS : Pop when schematic is DIS
ARD : Pop when schematic is Arrandale
CFD : Pop when schematic is Clarksfield
DW70 CALPELLA N11P-GE1 Schematics
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
Block Diagram
Custom
2 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
Block Diagram
Custom
2 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
Block Diagram
Custom
2 90Tuesday, September 08, 2009
UMA
EMC2102
KBC
Thermal
& Fan
Int.
KB
LPC Bus
256kB
Flash ROM
DDRIII Channel A
Winery CALPELLA Block Diagram
NUVOTON
NPCE781BA0DX
SPI
Clock Generator
SLG8SP585
37
7
62 68
39,58
Touch
PAD
68
Project code : 91.4RU01.001
Part Number : 48.4RU06.0SA
PCB P/N : 09290
Revision : SA
+1.05V_VTT
Bluetooth
USB 2.0 x 1
PCIE
USB,ESATA
Multi-Port x1
CAMERA
73
USB 2.0 x 1
USB 2.0
802.11a/b/g/n
Mini-Card
New Card
TPS2231R
Power SW
ODD
SATA
59
SPI
HDD
RICOH
R5U230
CardReader
1394
(8 in 1)SD/MMC
MS/MS Pro/xD
HD AUDIO
CODEC
IDT
92HD81-UA
HD AUDIO
OP AMP
2CH SPEAKER
MIC IN
HP OUT
Digital Mic Array
USB 2.0 x 1
63
DDRIII
Arrandale 1066MHz
Clarksfield 1333MHz
DM1
DM2
18
19
80,81,82,83
64Mbx16x8 (1GB)
VRAM(gDDR3)
4
84,85,89,90
Nvidia
N11P-GE1(40nm)
PCIe x 16
(On I/O board)
(On I/O board)
(Option)
OUTPUTSINPUTS
+PWR_SRC
PCB LAYER
L3: Signal
L2: VCC
L5: GND
L4: Signal
L1: Top
L6: Bottom
49
1394 Connector
USB 2.0 x 2
64
PCIE x 1
Right Side:
USB x 2
USB 2.0 x 1
Biometric
SATA,USB
TPM CONN
76
63
78
100MHz/
2.5Gbps
Bandwidth
:8GB
33MHz
480Mbps
100MHz
2
.5Gbps
Left Side:
USB x 2
USB 2.0 x 2
Capacity Board
SM Bus
(Option)
(On LAN board)
400KHz
SM Bus
Free fall sensor
40
45
46
+3.3V_RTC_LDO
47,48
50
ISL62883
OUTPUTS
+VCC_CORE
INPUTS
+PWR_SRC
CPU DC/DC
+3.3V_ALW
OUTPUTS
+5V_ALW
+PWR_SRC
TPS51125
INPUTS
SYSTEM DC/DC
+1.5V_SUS
SYSTEM DC/DC
OUTPUTS
+PWR_SRC
CHARGER
INPUTS
BQ24745
+DC_IN
+15V_ALW
+PBATT
86
+VCC_GFX_CORE
OUTPUTS
SYSTEM DC/DC
INPUTS
+PWR_SRC
TPS51116
+PWR_SRC
TPS51218
53
OUTPUTSINPUTS
+PWR_SRC +CPU_GFXCORE
DMIx4 FDI
Intel CPU
8,9,10,11,12,13,14
Arrandale
Clarksfield
Intel
14 USB 2.0/1.1 ports
PCH
High Definition Audio
SATA ports (6)
LPC I/F
ACPI 1.1
PCI/PCI BRIDGE
ETHERNET (10/100/1000Mb)
PCIE ports (8)
20,21,22,23,24,25,26,27,28
VRAM
RGB CRT
LVDS
HDMI
RGB CRT
LVDS
HDMI
RGB CRT
LVDS
USB 2.0 x 1
USB 2.0 x 1
Flash ROM
4MB
+0.75V_DDR_VTT
OUTPUTSINPUTS
+V_DDR_REF
SYSTEM DC/DC
ADP3211
SYSTEM DC/DC
TPS51218
51
OUTPUTS
APL5930
LDO
INPUTS
+1.8V_RUN+3.3V_ALW
DEBUG BOARD
GOLDEN FINGER
70
Touch Panel
(On Audio board)
Switchable
52
+1.05V_PCH
OUTPUTSINPUTS
+PWR_SRC
SYSTEM DC/DC
TPS51117
HDMI
55
CRT
LCD
54
RGB CRT
LVDS
HDMI
57
(On Audio board)
87
OUTPUTS
RT9025
LDO
INPUTS
+1.8V_RUN_GPU+3.3V_ALW
Arrandale 800/1066MHz
Clarksfield 1066/1333MHz
DDRIII Channel B
Arrandale 800/1066MHz
Clarksfield 1066/1333MHz
DDRIII
Arrandale 1066MHz
Clarksfield 1333MHz
10/100/1000LOM
RTL8111DL
RJ45
CONN
(On LAN board)
PCIE x 1
PCIE x 1
100MHz
2.5Gbps
PCIE
(Dual
Channel)
(On LAN board)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Vostro Calpella
SA
Power Block Diagram
Custom
3 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Vostro Calpella
SA
Power Block Diagram
Custom
3 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Vostro Calpella
SA
Power Block Diagram
Custom
3 90Tuesday, September 08, 2009
UMA
Charger
BQ24745
+PBATT
Adapter
Battery
TPS51125
Regulator LDO Switch
+5V_ALW
+3.3V_RTC_LDO
AO4468
+5V_RUN
TPS2062AD
+5V_USB0
TPS2062AD
+5V_USB1
AO3403
+3.3V_LAN
FDS8880
+3.3V_RUN+3.3V_CARDAUX
RTL8111DL
DVDD12
ISL62883
+VCC_CORE
+3.3V_CARD
SI3456BDV
+LCDVDD
+PWR_SRC
+V_DDR_REF
+1.5V_RUN
+1.5V_SUS
Power Shape
AO4407A
TPS51218
+VCC_GFX_CORE
47
、
48 86
45
45
46
Daughter BD 6342
TPS2231R
35
TPS2231R
54
+15V_ALW
AO4468
42
42
TPS2062AD
+5V_USB2
63
For USB Port1,4 For USB Port2,3 For ESATA
+5V_ALW2
Daughter BD
Daughter BD
APL5930
51
+1.8V_RUN
TPS51116RGER-GP-U
50
FDS8880
+1.05V_VTT
49
TPS51218DSCR
87
+1.05V_GFX_PCIE
TPS2231R
+1.5V_CARD
Daughter BD
FDS8880
87
+1.5V_RUN_GPU
+3.3V_ALW
Arrandale : 1.05V
Clarksfield:1.1V
ADP3211
+CPU_GFXCORE
53
For NVIDIA GPUFor Intel GPU
P2703
42
+1.5V_CPU
Daughter BD
RT9025
87
+1.8V_RUN_GPU
FDS8880
+3.3V_RUN_GPU
87
For Clarksfield
TPS51117RGYR-GP
+1.05V_PCH
52
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Num ber Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.
Vostro Calpella
SA
SMBUS Block Diagram
A2
4 90Tuesday, Septem ber 08, 2009
UMA
Title
Size Document Num ber Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.
Vostro Calpella
SA
SMBUS Block Diagram
A2
4 90Tuesday, Septem ber 08, 2009
UMA
Title
Size Document Num ber Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.
Vostro Calpella
SA
SMBUS Block Diagram
A2
4 90Tuesday, Septem ber 08, 2009
UMA
LDDC_CLK
LDDC_DATA
+3.3V_RUN_GPU
‧
‧
‧
TPDATA
TPCLK
+5V_RUN
‧
‧
‧
TouchPad Conn.
TPDATA
TPCLK
‧
‧
PSCLK1
PSDAT1
VGA
N11P-GE1
LCD Conn.
PCH SMBus Block Diagram
PCH
SMBCLK (H14)
SMBDATA (C8)
GPIO74/SDA2
GPIO73/SCL2
KBC
NPCE781
CLK_SMB
+3.3V_RUN
‧
SRN2K2J-1-GP
+3.3V_ALW
‧
‧
‧
SRN2K2J-1-GP
+3.3V_RUN
2N7002SPT
‧
‧
‧
DAT_SMB
KBC_SCL1
KBC_SDA1
I2CC_SDA
I2CC_SCL
SCL1
SDA1
‧
BAT_SCL
Express
Card
SMB_CLK
BAT_SDA
SMB_DATA
SMBus address:D2
SMBus Address:A0
SMBus Address:A2
DIMM 1
SCL (202)
SDA (200)
KBC_PWR
‧
DIMM 2
SCL (202)
SDA (200)
‧
SMBus address:16
‧
PCH_SMB_CLK
PCH_SMB_DATA
PCH_SMBCLK
PCH_SMBDATA
PBAT_SMBCLK1
PBAT_SMBDAT1
KBC SMBus Block Diagram
Battery Conn.
PCH_SMBCLK
PCH_SMBDATA
Clock
Generator
SCL (32)
SDA (31)
PCH_SMBCLK
PCH_SMBDATA
SMB_CLK
SMB_DATA
BQ24745
SCL
SDA
TPDATA
TPCLK
+3.3V_RUN
2N7002DW-1-GP
‧
‧
‧
‧
SMBus address:12
2N7002DW-1-GP
‧
‧
+3.3V_RUN_GPU
SRN2K2J-1-GP
‧
‧
+5V_CRT_RUN
‧
SRN2K2J-1-GP
CRT CONN
DDC_CLK_CON
DDC_DATA_CON
CRT_CLK_DDC
CRT_DAT_DDC
I2CA_SCL
I2CA_SDA
SRN10KJ-5-GP
SRN4K7J-8-GP
SRN100J-3-GP
SRN4K7J-8-GP
KBC_PWR
‧
SRN2K2J-1-GP
‧
‧
81
54
37
76
23
18
19
07
45
44
55
68
Minicard
WLAN
SMB_DATA
SMB_CLK
PCH_SMBCLK
64
+3.3V_RUN
‧
‧
PCH_SMBDATA
HDMI
Free fall
sensor
SDA/SDI/SDO (13)
SCL/SPC (14)
PCH_SMBDATA
PCH_SMBCLK
40
+3.3V_RUN
2N7002DW-1-GP
‧
‧
‧
+3.3V_RUN
‧
SRN2K2J-1-GP
‧
‧
+5V_RUN
‧
SRN2K2J-1-GP
HDMI_SCLK_CON
HDMI_SDATA_CON
HDMI_SCLK_DDC
HDMI_SDATA_DDC
57
(On daughter board)
THERM_SCL
THERM_SDA
SRN4K7J-8-GP
+3.3V_RUN
‧
‧
‧
Thermal
SMCLK
SMDATA
Capacity
Board
SCL
SDA
SMBus address:7A
THERM_SCL
THERM_SDA
39
IFPC_AUX_I2CW_SCL
IFPC_AUX_I2CW_SDA#
SMBus address:0A
BAT_SCL
B
AT_SDA
NC7SB3157P6X
LDDC_CLK_CON
LDDC_DATA_CON
NC7SB3157P6X
DDC_CLK_CON2
DDC_DATA_CON2
VGA SMBus Block Diagram
NC7SB3157P6X
HDMI_SCLK_CON_L
HDMI_SDATA_CON_L
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Vostro Calpella
SA
Thermal/Audio Block Diagram
Custom
5 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Vostro Calpella
SA
Thermal/Audio Block Diagram
Custom
5 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Vostro Calpella
SA
Thermal/Audio Block Diagram
Custom
5 90Tuesday, September 08, 2009
UMA
Thermal Block Diagram
Thermal
EMC2102
DP1
DN1
SC470P50V3JN-2GP
DP2
DN2
DP3
DN3
Audio Block Diagram
VGA_THERMDA
VGA_THERMDC
GPU
DPLUS
DMINUS
54
28
CPU_THERMDA
CPU_THERMDC
SC470P50V3JN-2GP
Q3901
MMBT3904-3-GP
HW T8 sensor
EMC2102_DN1
EMC2102_DP1
SC470P50V3JN-2GP
Digital
MIC
Array
DMIC_CLK/GPIO1
DMIC0/GPIO2
Codec
92HD81-UA
HP
OUT
MIC
IN
SPEAKER
VREFOUT_A_OR_F
HP1_PORT_B_L
33R2J-2-GP
AUD_DMIC_CLK
AUD_DMIC_IN0
33R2J-2-GP AUD_DMIC_IN0_R
AUD_DMIC_CLK_G_R
22
SPKR_PORT_D_L+
SPKR_PORT_D_L-
SPKR_PORT_D_R-
SPKR_PORT_D_R+
0R3-0-U-GP
AUD_SPK_L1_R
AUD_SPK_L2_R
AUD_SPK_R2_R
AUD_SPK_R1_R
AUD_SPK_L1
AUD_SPK_L2
AUD_SPK_R2
AUD_SPK_R1
HP1_PORT_B_R
AUD_HP1_JACK_L
AUD_HP1_JACK_R
50
44
HP0_PORT_A_L
HP0_PORT_A_R
AUD_EXT_MIC_L
AUD_EXT_MIC_R
AUD_VREFOUT_B
0R3-0-U-V-GP
47
50
Q3904
MMBT3904-3-GP
UMA
DIS
Q3905
MMBT3904-3-GP
System
CPU Sockt
A
B
C
D
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Vostro Calpella
SA
Table of Content
Custom
6 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Vostro Calpella
SA
Table of Content
Custom
6 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Vostro Calpella
SA
Table of Content
Custom
6 90Tuesday, September 08, 2009
UMA
USB Table
PCIE Routing
New CardLANE5
LANE2
LANE3 LAN
MiniCard WLAN
LANE1
NCLANE4
Card reader
SPKR
Name Schematics Notes
HAD_DOCK_EN#
/GPIO[33]
Low (0)-
High (1)-:
Note:
HDA_SDO Weak internal pull-down. Do not pull high.
Sampled at rising edge of RSMRST#.
HDA_SYNC
Calpella Schematic Checklist Rev.1_6
INIT3_3V# Internal pull-up. Leave as "No Connect"
GNT3#/
GPIO55
Default Mode:
Low (0) = Top Block Swap Mode
GNT0#,
GNT1#
Weak internal pull-down. Do not pull high.
Sampled at rising edge of RSMRST#.
Intel ME Crypto Transport Layer Security (TLS) cipher suite
with no confidentiality
Intel ME Crypto Transport Layer Security (TLS) cipher suite
with confidentiality
This is an unmuxed signal.
This signal has a weak internal pull-down of 20 KΩ which is enabled
w
hen PWROK is low.
Sampled at rising edge of RSMRST#.
CRB has a 1-kΩ pull-up on this signal to +3.3VA rail.
Weak internal pull-up. Do not pull low.
Sampled at rising edge of RSMRST#.
PCH Strapping
Default (SPI):
GNT2#/
GPIO53
Default - Internal pull-up.
Low (0)
SPI_MOSI
Internal weak Pull-down.
Connect to Vcc3_3 with 8.2-kΩ
- 10-kΩ weak pull-up resistor.
E
nable Intel Anti-Theft Technology:
Disable Intel Anti-Theft Technology:
NV_ALE
NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.
GPIO15
GPIO8
Reboot option at power-up
Default Mode:
No Reboot Mode with TCO Disabled:
Internal pull-up.
Note: Connect to ground with 4.7-kΩ weak pull-down resistor.
C
RB uses a 1 kΩ; do not stuff resistor.
INTVRMEN
High (1) = Integrated VRM is enabled
Low (0) = Integrated VRM is disabled
Note:
Leave both GNT0# and GNT1# floating. No pull up
required.
Boot from PCI:
Connect GNT1# to ground with 1-kΩ pull-down
r
esistor. Leave GNT0# Floating.
Boot from LPC:
Connect both GNT0# and GNT1# to ground with 1-kΩ
pull-down resistor.
= Configures DMI for ESI compatible operation (for servers
only. Not for mobile/desktops).
Connect to Vcc3_3
with 8.2-kΩ weak pull-up resistor.
Left floating, no pull-down
required.
Connect to +NVRAM_Vccq with
8.2-kΩ weak pull-up resistor.[CRB has it pulled up with 1-kΩ
no-stuff resistor]
Leave floating.
(internal pull-down)
Flash Descriptor Security will be overridden. Also, when
this signals is sampled on the rising edge of PWROK then it will also
disable Intel ME and its features.
Security measure defined in the Flash Descriptor
will be enabled.
Platform design should provide appropriate pull-up or pull-down
depending on the desired settings. If a jumper option is used to
tie this signal to GND as required by the functional strap,
the signal should be pulled low through a weak pull-down in order
to avoid asserting HDA_DOCK_EN# inadvertently.
CRB recommends 1-kΩ pull-down for FD Override.
There is an internal pull-up of 20 kΩ for HDA_DOCK_EN# which is only
enabled at boot/reset for strapping functions.
GPIO27
Default = Do not connect (floating). Internal pull-up.
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
CFG[0]
Processor Strapping
CFG[4] Disabled - No Physical Display Port attached to
Embedded DisplayPort.
CFG[3]
Pin Name Strap Description Configuration (Default value for each bit is
1 unless specified otherwise)
1:Embedded
DisplayPort
Presence
Calpella Schematic Checklist Rev.1_6
0:
Enabled - An external Display Port device is
connected to the Embedded Display Port.
PCI-Express Static
Lane Reversal
1:
0:
Normal Operation.
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
Default
Value
PCI-Express
Configuration
Select
1:
0:
Single PCI-Express Graphics
Bifurcation enabled
1
1
1
13
Touch Panel
USB2 > M/B
New Card
12
USB1 > LAN BOARD
10
0
11
USB for ESATA
Pair
4
USB
5
2
3
1
Device
BlUETOOTH
6
7
8
9
USB3 > M/B
Biometric
CAMERA
WLAN
RESERVED
(Not available for HM55)
(Not available for HM55)
RESERVED
USB4 > LAN BOARD
RESERVED
CRB uses a 330-kΩ resistor.
Enable Intel Anti-Theft Technology:
Disable Intel Anti-Theft Technology:
Low (0)-
High (1)-:
Note:
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CK_PWRGD
CLK_XTAL_IN
CLK_XTAL_OUT
CLK_CPU_BCLK1
CLK_CPU_BCLK1#
CLK_IN_DMI
CLK_IN_DMI#
CLK_PCIE_SATA1
CLK_PCIE_SATA1#
CLK_MCH_DREFCLK1
CLK_MCH_DREFCLK1#
CLK_XTAL_IN
CLK_XTAL_OUT
CK_PWRGD
CPU_STOP#
FSC
CLK_27M
CLK_27M_SS
FSC
TP_CPU_1#
TP_CPU_1
CLK_VGA_27M
CLK_VGA_27M_RC
+3.3V_RUN +3.3V_RUN_SL585
+1.05V_RUN_SL585_IO
+3.3V_RUN_SL585
+3.3V_RUN_SL585 +1.05V_RUN_SL585_IO
+3.3V_RUN
+1.05V_PCH
+1.05V_PCH
VR_CLKEN# 47
CLKIN_DMI#23
CLKIN_DMI23
CLK_CPU_BCLK23
CLK_CPU_BCLK#23
CLK_PCIE_SATA23
CLK_PCIE_SATA#23 CLK_PCH_14M 23
PCH_SMBDATA 18,19,23,40,64
PCH_SMBCLK 18,19,23,40,64
CLK_VGA_27M 81
DREFCLK#23
DREFCLK23
Title
S
ize Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
Clock Generator SLG8SP585
7 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
Clock Generator SLG8SP585
7 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
Clock Generator SLG8SP585
7 90Tuesday, September 08, 2009
UMA
FSC 0 1
133MHz
100MHz
(Default)
SPEED
1st Silego 71.08585.003
2nd ICS 71.93197.003
68.00119.131 0603
68.00084.521 0805
68.00119.131
R710R706
SS
NON-SS Mount DY
DY Mount
VGA 27M
2009/07/15
Added R,C For CLK_VGA_27M EMI
2009/07/28
Change 2N7002 ESD pretect from standard to 1KV type
P/N:84.2N702.E31
12
C701
SC1U10V2KX-1GP
DY
C701
SC1U10V2KX-1GP
DY
1
TP0701Do Not Stuff TP0701Do Not Stuff
1 2
R749
0R2J-2-GP
DY
R749
0R2J-2-GP
DY
12
C711
SCD1U10V2KX-4GP
C711
SCD1U10V2KX-4GP
1
2 3
4
RN702
SRN0J-6-GP
RN702
SRN0J-6-GP
12
C704
SCD1U10V2KX-4GP
C704
SCD1U10V2KX-4GP
12
C708
SCD1U10V2KX-4GP
C708
SCD1U10V2KX-4GP
12
C707
SCD1U10V2KX-4GP
C707
SCD1U10V2KX-4GP
12
C712
SCD1U10V2KX-4GP
C712
SCD1U10V2KX-4GP
12
C705
SCD1U10V2KX-4GP
C705
SCD1U10V2KX-4GP
12
C702
SC10U10V5ZY-1GP
DY
C702
SC10U10V5ZY-1GP
DY
1 2
R708 0R3J-0-U-GPR708 0R3J-0-U-GP
12
R706 33R2J-2-GP
DY
R706 33R2J-2-GP
DY
12
C703
SCD1U10V2KX-4GP
C703
SCD1U10V2KX-4GP
1 2
R709 0R3J-0-U-GPR709 0R3J-0-U-GP
1
2 3
4
RN701
SRN0J-6-GP
RN701
SRN0J-6-GP
G
SD
Q701
2N7002A-7-GP
Q701
2N7002A-7-GP
1
2 3
4
RN703
SRN0J-6-GP
RN703
SRN0J-6-GP
12
C714
SC12P50V2JN-3GP
C714
SC12P50V2JN-3GP
12
R710 33R2J-2-GP
DY
R710 33R2J-2-GP
DY
1
TP702Do Not Stuff TP702Do Not Stuff
1 2
R707
10KR2J-3-GP
R707
10KR2J-3-GP
1 2
R705
10KR2J-3-GP
R705
10KR2J-3-GP
1
2 3
4
RN704
SRN0J-6-GP
RN704
SRN0J-6-GP
12
EC701
SC4D7P50V2CN-1GP
DY
EC701
SC4D7P50V2CN-1GP
DY
12
C715
SC12P50V2JN-3GP
C715
SC12P50V2JN-3GP
1 2
R704
4K7R2J-2-GP
DY
R704
4K7R2J-2-GP
DY
12
C709
SC1U10V2KX-1GP
DY
C709
SC1U10V2KX-1GP
DY
12
R701 2K2R2J-2-GPR701 2K2R2J-2-GP
1 2
C718
SC4D7P50V2CN-1GP
DY
C718
SC4D7P50V2CN-1GP
DY
1 2
X701
X-14D31818M-37GP
X701
X-14D31818M-37GP
VDD_DOT
1
VSS_DOT
2
DOT_96
3
DOT_96#
4
VDD_27
5
27MHZ
6
27MHZ_SS
7
VSS_27
8
VSS_SATA
9
SRC_1/SATA
10
SRC_1/SATA#
11
VSS_SRC
12
SRC_2
13
SRC_2#
14
VDD_SRC_IO
15
CPU_STOP#
16
VDD_SRC
17
VDD_CPU_IO
18
CPU_1#
19
CPU_1
20
VSS_CPU
21
CPU_0#
22
CPU_0
23
VDD_CPU
24
CKPWRGD/PD#
25
VSS_REF
26
XTAL_OUT
27
XTAL_IN
28
VDD_REF
29
REF_0/CPU_SEL
30
SDA
31
SCL
32
GND
33
U701
SLG8SP585VTR-GP
U701
SLG8SP585VTR-GP
12
R703 33R2J-2-GPR703 33R2J-2-GP
12
C710
SC10U10V5ZY-1GP
C710
SC10U10V5ZY-1GP
5
4
3
2
1
D D
C C
B B
A A
FDI_TXN0
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXN4
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXP0
FDI_TXP5
FDI_TXP6
FDI_TXP7
FDI_TXP4
FDI_TXP1
FDI_TXP2
FDI_TXP3
EXP_RBIAS
PEG_IRCOMP_R
PCIE_MRX_GTX_N[0..15]
PCIE_MRX_GTX_P[0..15]
PCIE_MTX_GRX_P[0..15]
PCIE_MTX_GRX_N[0..15]
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_C_P3
PCIE_MTX_GRX_C_P8
PCIE_MTX_GRX_C_P13
PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_C_P6
PCIE_MTX_GRX_C_P11
PCIE_MTX_GRX_C_P4
PCIE_MTX_GRX_C_P9
PCIE_MTX_GRX_C_P14
PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_C_P7
PCIE_MTX_GRX_C_P12
PCIE_MTX_GRX_C_P5
PCIE_MTX_GRX_C_P0
PCIE_MTX_GRX_C_P10
PCIE_MTX_GRX_C_P15
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N15
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_C_N12
PCIE_MTX_GRX_C_N0
PCIE_MTX_GRX_C_N5
PCIE_MTX_GRX_C_N10
PCIE_MTX_GRX_C_N15
PCIE_MTX_GRX_C_N3
PCIE_MTX_GRX_C_N8
PCIE_MTX_GRX_C_N13
PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_N6
PCIE_MTX_GRX_C_N11
PCIE_MTX_GRX_C_N4
PCIE_MTX_GRX_C_N9
PCIE_MTX_GRX_C_N14
PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N7
PCIE_MRX_GTX_P10
PCIE_MRX_GTX_P12
PCIE_MRX_GTX_P13
PCIE_MRX_GTX_P14
PCIE_MRX_GTX_P15
PCIE_MRX_GTX_P0
PCIE_MRX_GTX_P1
PCIE_MRX_GTX_P2
PCIE_MRX_GTX_P3
PCIE_MRX_GTX_P4
PCIE_MRX_GTX_P6
PCIE_MRX_GTX_P7
PCIE_MRX_GTX_P8
PCIE_MRX_GTX_P9
PCIE_MRX_GTX_P5
PCIE_MRX_GTX_P11
PCIE_MRX_GTX_N10
PCIE_MRX_GTX_N11
PCIE_MRX_GTX_N12
PCIE_MRX_GTX_N13
PCIE_MRX_GTX_N14
PCIE_MRX_GTX_N15
PCIE_MRX_GTX_N0
PCIE_MRX_GTX_N1
PCIE_MRX_GTX_N2
PCIE_MRX_GTX_N3
PCIE_MRX_GTX_N4
PCIE_MRX_GTX_N5
PCIE_MRX_GTX_N6
PCIE_MRX_GTX_N7
PCIE_MRX_GTX_N8
PCIE_MRX_GTX_N9
DMI_PTX_CRXN022
DMI_CTX_PRXN022
DMI_PTX_CRXN122
DMI_PTX_CRXN222
DMI_PTX_CRXN322
DMI_PTX_CRXP022
DMI_PTX_CRXP122
DMI_PTX_CRXP222
DMI_PTX_CRXP322
DMI_CTX_PRXN122
DMI_CTX_PRXN222
DMI_CTX_PRXN322
DMI_CTX_PRXP022
DMI_CTX_PRXP122
DMI_CTX_PRXP222
DMI_CTX_PRXP322
FDI_FSYNC022
FDI_FSYNC122
FDI_INT22
FDI_TXN022
FDI_LSYNC022
FDI_LSYNC122
FDI_TXN122
FDI_TXN222
FDI_TXN322
FDI_TXN422
FDI_TXN522
FDI_TXN622
FDI_TXN722
FDI_TXP022
FDI_TXP122
FDI_TXP222
FDI_TXP322
FDI_TXP422
FDI_TXP522
FDI_TXP622
FDI_TXP722
PCIE_MRX_GTX_P[0..15] 80
PCIE_MRX_GTX_N[0..15] 80
PCIE_MTX_GRX_P[0..15] 80
PCIE_MTX_GRX_N[0..15] 80
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (PCIE/DMI/FDI)
8 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (PCIE/DMI/FDI)
8 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (PCIE/DMI/FDI)
8 90Tuesday, September 08, 2009
UMA
for Discrete
Calpella Platform Design Guide
Revision 1.6
FDI_TX[7:0] and FDI_TX#[7:0] can be left floating on the Arrandale. The GFX_IMON,
FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1], and FDI_INT signals on
the Arrandale side should be tied to GND (through 1-kΩ ±5% resistors).
2.4 Arrandale Graphics Disable Guideline
Page 89
It applies to Arrandale and Clarksfield discrete graphic designs.
DMI
CPU SKT:1st:Molex P/N:62.10053.561
2nd:Foxconn P/N:62.10055.321
1 2
C808 SCD1U10V2KX-5GP
DIS
C808 SCD1U10V2KX-5GP
DIS
1 2
C829 SCD1U10V2KX-5GP
DIS
C829 SCD1U10V2KX-5GP
DIS
1 2
C826 SCD1U10V2KX-5GP
DIS
C826 SCD1U10V2KX-5GP
DIS
1 2
R801 49D9R2F-GPR801 49D9R2F-GP
1 2
C805 SCD1U10V2KX-5GP
DIS
C805 SCD1U10V2KX-5GP
DIS
1 2
C811 SCD1U10V2KX-5GP
DIS
C811 SCD1U10V2KX-5GP
DIS
1 2
C832 SCD1U10V2KX-5GP
DIS
C832 SCD1U10V2KX-5GP
DIS
1 2
C824 SCD1U10V2KX-5GP
DIS
C824 SCD1U10V2KX-5GP
DIS
1 2
C816 SCD1U10V2KX-5GP
DIS
C816 SCD1U10V2KX-5GP
DIS
1 2
C822 SCD1U10V2KX-5GP
DIS
C822 SCD1U10V2KX-5GP
DIS
1 2
C803 SCD1U10V2KX-5GP
DIS
C803 SCD1U10V2KX-5GP
DIS
1 2
R802 750R2F-GPR802 750R2F-GP
1 2
C818 SCD1U10V2KX-5GP
DIS
C818 SCD1U10V2KX-5GP
DIS
DMI_RX#0
A24
DMI_RX#1
C23
DMI_RX#2
B22
DMI_RX#3
A21
DMI_RX0
B24
DMI_RX1
D23
DMI_RX2
B23
DMI_RX3
A22
DMI_TX#0
D24
DMI_TX#1
G24
DMI_TX#2
F23
DMI_TX#3
H23
DMI_TX0
D25
DMI_TX1
F24
DMI_TX3
G23
DMI_TX2
E23
FDI_TX#0
E22
FDI_TX#1
D21
FDI_TX#2
D19
FDI_TX#3
D18
FDI_TX#4
G21
FDI_TX#5
E19
FDI_TX#6
F21
FDI_TX#7
G18
FDI_TX0
D22
FDI_TX1
C21
FDI_TX2
D20
FDI_TX3
C18
FDI_TX4
G22
FDI_TX5
E20
FDI_TX6
F20
FDI_TX7
G19
FDI_FSYNC0
F17
FDI_FSYNC1
E17
FDI_INT
C17
FDI_LSYNC0
F18
FDI_LSYNC1
D17
PEG_ICOMPI
B26
PEG_ICOMPO
A26
PEG_RBIAS
A25
PEG_RCOMPO
B27
PEG_RX#0
K35
PEG_RX#1
J34
PEG_RX#2
J33
PEG_RX#3
G35
PEG_RX#4
G32
PEG_RX#5
F34
PEG_RX#6
F31
PEG_RX#7
D35
PEG_RX#8
E33
PEG_RX#9
C33
PEG_RX#10
D32
PEG_RX#11
B32
PEG_RX#12
C31
PEG_RX#13
B28
PEG_RX#14
B30
PEG_RX#15
A31
PEG_RX0
J35
PEG_RX1
H34
PEG_RX2
H33
PEG_RX3
F35
PEG_RX4
G33
PEG_RX5
E34
PEG_RX6
F32
PEG_RX7
D34
PEG_RX8
F33
PEG_RX9
B33
PEG_RX10
D31
PEG_RX11
A32
PEG_RX12
C30
PEG_RX13
A28
PEG_RX14
B29
PEG_RX15
A30
PEG_TX#0
L33
PEG_TX#1
M35
PEG_TX#2
M33
PEG_TX#3
M30
PEG_TX#4
L31
PEG_TX#5
K32
PEG_TX#6
M29
PEG_TX#7
J31
PEG_TX#8
K29
PEG_TX#9
H30
PEG_TX#10
H29
PEG_TX#11
F29
PEG_TX#12
E28
PEG_TX#13
D29
PEG_TX#14
D27
PEG_TX#15
C26
PEG_TX0
L34
PEG_TX1
M34
PEG_TX2
M32
PEG_TX3
L30
PEG_TX4
M31
PEG_TX5
K31
PEG_TX6
M28
PEG_TX7
H31
PEG_TX8
K28
PEG_TX9
G30
PEG_TX10
G29
PEG_TX11
F28
PEG_TX12
E27
PEG_TX13
D28
PEG_TX14
C27
PEG_TX15
C25
PCI EXPRESS -- GRAPHICS
DMI
Intel(R) FDI
1 OF 9
CLARKSFIELD
CPU1A
CLARKUNF
PCI EXPRESS -- GRAPHICS
DMI
Intel(R) FDI
1 OF 9
CLARKSFIELD
CPU1A
CLARKUNF
1 2
C817 SCD1U10V2KX-5GP
DIS
C817 SCD1U10V2KX-5GP
DIS
1 2
C809 SCD1U10V2KX-5GP
DIS
C809 SCD1U10V2KX-5GP
DIS
1 2
C815 SCD1U10V2KX-5GP
DIS
C815 SCD1U10V2KX-5GP
DIS
1 2
C827 SCD1U10V2KX-5GP
DIS
C827 SCD1U10V2KX-5GP
DIS
1 2
C802 SCD1U10V2KX-5GP
DIS
C802 SCD1U10V2KX-5GP
DIS
1 2
C801 SCD1U10V2KX-5GP
DIS
C801 SCD1U10V2KX-5GP
DIS
1 2
C806 SCD1U10V2KX-5GP
DIS
C806 SCD1U10V2KX-5GP
DIS
1 2
C814 SCD1U10V2KX-5GP
DIS
C814 SCD1U10V2KX-5GP
DIS
1 2
C831 SCD1U10V2KX-5GP
DIS
C831 SCD1U10V2KX-5GP
DIS
1 2
C807 SCD1U10V2KX-5GP
DIS
C807 SCD1U10V2KX-5GP
DIS
1 2
C812 SCD1U10V2KX-5GP
DIS
C812 SCD1U10V2KX-5GP
DIS
1 2
C830 SCD1U10V2KX-5GP
DIS
C830 SCD1U10V2KX-5GP
DIS
1 2
C804 SCD1U10V2KX-5GP
DIS
C804 SCD1U10V2KX-5GP
DIS
1 2
C820 SCD1U10V2KX-5GP
DIS
C820 SCD1U10V2KX-5GP
DIS
1 2
C828 SCD1U10V2KX-5GP
DIS
C828 SCD1U10V2KX-5GP
DIS
1 2
C819 SCD1U10V2KX-5GP
DIS
C819 SCD1U10V2KX-5GP
DIS
1 2
C821 SCD1U10V2KX-5GP
DIS
C821 SCD1U10V2KX-5GP
DIS
1 2
C813 SCD1U10V2KX-5GP
DIS
C813 SCD1U10V2KX-5GP
DIS
1 2
C825 SCD1U10V2KX-5GP
DIS
C825 SCD1U10V2KX-5GP
DIS
1 2
C810 SCD1U10V2KX-5GP
DIS
C810 SCD1U10V2KX-5GP
DIS
1 2
C823 SCD1U10V2KX-5GP
DIS
C823 SCD1U10V2KX-5GP
DIS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_CLK#_R
PEG_CLK_R
PM_DRAM_PW RGD
BCLK_CPU_P_R
BCLK_CPU_N _R
H_COMP3
H_COMP2
H_COMP1
H_COMP0
SKTOCC#_R
H_CATERR #
H_CATERR #
H_CPURST #
PLT_RST#_R
BCLK_ITP_P
BCLK_ITP_N
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
H_PWRG D_XDP
SM_RCOMP_2
SM_RCOMP_1
SM_RCOMP_0
XDP_TDI_R
XDP_TDO_M
XDP_TDI_M
XDP_TDO_R
XDP_TDI
XDP_TDO
XDP_TRST#
XDP_TCLK
XDP_PREQ#
XDP_TDI_R
XDP_TMS
H_CPURST #
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M
H_DBR#_R
XDP_TRST#
XDP_DBRESE T#
XDP_OBS0
XDP_OBS1
XDP_OBS3
XDP_OBS2
XDP_OBS5
XDP_OBS4
XDP_OBS7
XDP_OBS6
XDP_OBS1
XDP_OBS5
H_CPUPW RGD_XDP
XDP_TDI
XDP_RST#_R
XDP_TDO
XDP_OBS2
XDP_TMS
XDP_OBS6
H_PWRG OOD
PM_PWRBT N#_XDP
XDP_PRDY#
XDP_OBS3
XDP_OBS7
H_PWRG D_XDP_R
XDP_TRST#
XDP_OBS0
H_PWRG D_XDP
XDP_OBS4
XDP_RST#_R
XDP_PREQ#
XDP_TCLK
VCCPWR GOOD
H_PROCHO T_R#
H_PROCHO T_R#
PM_EXTTS#0_C
PM_EXTTS#1_C
DPLL_REF_SSC LK#_R
DPLL_REF_SSC LK_R
SM_DRAMRST #
XDP_RST#_R
SM_DRAMRST #
VTT_PWR GD_R3
U927_B
PM_DRAM_PW RGD
BCLK_ITP_N
BCLK_ITP_PBCLK_ITP_P_R
BCLK_ITP_N_R
DPLL_REF_SSC LK_R
DPLL_REF_SSC LK#_R
+1.5V_SUS
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.5V_CPU
+3.3V_ALW
CLK_EXP_N 23
CLK_EXP_P 23
H_PM_SYNC22
PM_DRAM_PW RGD22
BCLK_CPU_P 25
BCLK_CPU_N 25
H_PECI25
H_PWRG OOD25,42
PLT_RST#21,37,64,70,76,77,80
H_VTTPW RGD49
PM_EXTTS#1 19
SML0_DATA23
XDP_DBRESE T# 22
PM_PWRBT N#_R22
PLT_RST# 21,37,64,70,76,77,8 0
H_THRMTR IP#25,37,42
PM_EXTTS#0 18
SML0_CLK23
H_PROCHO T#47
CLK_DP_N 23
CLK_DP_P 23
DDR3_DR AMRST# 18,1 9
DDR_RST _GATE 11,25
VTT_PWR GD37,49,50
Title
S
ize Document Num ber Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.
Vostro Calpella
SA
CPU (THERMAL/CLOCK/PM )
9 90Tuesday, Septem ber 08, 2009
UMA
Title
Size Document Num ber Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.
Vostro Calpella
SA
CPU (THERMAL/CLOCK/PM )
9 90Tuesday, Septem ber 08, 2009
UMA
Title
Size Document Num ber Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O .C.
Vostro Calpella
SA
CPU (THERMAL/CLOCK/PM )
9 90Tuesday, Septem ber 08, 2009
UMA
Processor Compensation Signals
Processor Pullups
DDR3 Compensation Signals
CPU Only
GMCH Only
Scan Chain
(Default)
Stuff --> R921, R922
No Stuff --> R924, R926, R925
Stuff --> R921, R924, R926
No Stuff --> R922, R925
Stuff --> R926, R925
No Stuff --> R921, R922, R924
JTAG MAPPING
XDP Connector
CPU
TCK(PIN AN28)
TCK(PIN 57)
+1.05V_VCCP use Decoupling Capacitor close
ITP connector 100 mil ( max )
XDP Connector
Calpella Platform S3 Power Reduction Platform
S3 Power Reduction CRB Implementation
Design Details
2009/07/28
Change 2N7002 ESD pretect from standard to 1KV type
P/N:84.2N702.E31
2009/08/06
Changed Q901 from 2N7002 to BSS 138 MOSFET,For Vgs(th)<=1.5V.
R913:ARD = 1K6R2F-GP P/N:64.160 15.6DL
CFD = 1K5R2F-2-GP P/N:64.1 5015.6DL
0.75k
S3 Power Reduction circuit
R920R919
1.1k(DY)
Normal
425302_425302_Calpella_S3PowerReduction_WhitePape Revision 0.9
AUB
CFD
1.1k(DY) 0.75k
R977
1.6k
1.5k
3k
R920R919
1.27k
AUB
CFD
1.1k 3k
R977
1.6k(DY)
1.5k(DY)
12
R928
51R2J-2-GP
R928
51R2J-2-GP
1
2 3
4
RN901
SRN0J-6-GP
RN901
SRN0J-6-GP
12
R915
750R2F-GP
R915
750R2F-GP
1 2
R909
0R2J-2-GP
R909
0R2J-2-GP
12
R938 Do Not StuffR938 Do Not Stuff
1
2 3
4
RN907
SRN0J-6-GP
DIS
RN907
SRN0J-6-GP
DIS
12
C903
SCD1U10V2KX- 4GP
C903
SCD1U10V2KX- 4GP
1 2
R935
0R2J-2-GP
R935
0R2J-2-GP
1 2
R936
0R2J-2-GP
DY
R936
0R2J-2-GP
DY
1 2
R905 49D9R2F -GPR905 49D9R2F -GP
1 2
R926 0R2J-2-GPR926 0R2J-2-GP
SM_RCOMP1
AM1
SM_RCOMP2
AN1
SM_DRAMRST#
F6
SM_RCOMP0
AL1
BCLK#
B16
BCLK
A16
BCLK_ITP#
AT30
BCLK_ITP
AR30
PEG_CLK#
D16
PEG_CLK
E16
DPLL_REF_SSCLK#
A17
DPLL_REF_SSCLK
A18
CATERR#
AK14
COMP3
AT23
PECI
AT15
PROCHOT#
AN26
THERMTRIP#
AK15
RESET_OBS#
AP26
VCCPWRGOOD_1
AN14
VCCPWRGOOD_0
AN27
SM_DRAMPWROK
AK13
VTTPWRGOOD
AM15
RSTIN#
AL14
PM_EXT_TS#0
AN15
PM_EXT_TS#1
AP15
PRDY#
AT28
PREQ#
AP27
TCK
AN28
TMS
AP28
TRST#
AT27
TDI
AT29
TDO
AR27
TDI_M
AR29
TDO_M
AP29
DBR#
AN25
BPM#0
AJ22
BPM#1
AK22
BPM#2
AK24
BPM#3
AJ24
BPM#4
AJ25
BPM#5
AH22
BPM#6
AK23
BPM#7
AH23
COMP2
AT24
PM_SYNC
AL15
TAPPWRGOOD
AM26
COMP1
G16
COMP0
AT26
SKTOCC#
AH24
CLOCKS
MISC THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
2 OF 9
CLARKSFIELD
CPU1B
CLARKUNF
CLOCKS
MISC THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
2 OF 9
CLARKSFIELD
CPU1B
CLARKUNF
1 2
R910 24D9R2F -L-GPR910 24D9R2F-L -GP
1 2
R913
1K6R2F-GP
R913
1K6R2F-GP
1 2
R902 49D9R2F -GPR902 49D9R2F -GP
1 2
R933 68R2-GPR933 68R2-GP
12
R919
1K27R2F-L-GP
R919
1K27R2F-L-GP
1
TP901D o Not Stuff TP901D o Not Stuff
12
R977
1K6R2F-GP
DY
R977
1K6R2F-GP
DY
1
2 3
4
RN906
SRN0J-6-GP
RN906
SRN0J-6-GP
1 2
R907 100R2F-L 1-GP-UR907 100R2F-L 1-GP-U
12
C915
SCD1U10V2KX-5GP
DY
C915
SCD1U10V2KX-5GP
DY
12
C902
SCD1U16V2KX- 3GP
DY
C902
SCD1U16V2KX- 3GP
DY
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
64
61
NP1
NP2
62
63
XDP1
Do Not Stuff
DY
XDP1
Do Not Stuff
DY
1 2
R906 49D9R2F -GPR906 49D9R2F -GP
1 2
R911 130R2F-1 -GPR911 130R2F -1-GP
1 2
R903 20R2F-G PR 903 20R2F-GP
1
2 3
4
RN904
SRN0J-6-GP
UMA
RN904
SRN0J-6-GP
UMA
12
R924
0R2J-2-GP
R924
0R2J-2-GP
1 2
R929 0R2J-2- GP
DY
R929 0R2J-2- GP
DY
1 2
R908 0R2J-2-GPR908 0R2J-2-GP
1 2
R904 68R2-GP
DY
R904 68R2-GP
DY
1 2
R901 20R2F-G PR 901 20R2F-GP
1 2
R932 0R2J-2-GP
DY
R932 0R2J-2-GP
DY
12
R920
3KR2F-GP
R920
3KR2F-GP
1 2
R918 51R2J-2-G P
DY
R918 51R2J-2-G P
DY
1 2
R922 0R2J-2-GP
DY
R922 0R2J-2-GP
DY
1 2
R914 51R2J-2-G P
DY
R914 51R2J-2-G P
DY
12
R923
51R2J-2-GP
R923
51R2J-2-GP
1
2 3
G
S
D
Q901
BSS138LT1
DY
G
S
D
Q901
BSS138LT1
DY
1 2
R921 0R2J-2-GPR921 0R2J-2-GP
1
2 3
4
RN903
SRN0J-6-GP
RN903
SRN0J-6-GP
1 2
R917 51R2J-2-G P
DY
R917 51R2J-2-G P
DY
1 2
R931
1KR2J-1-GP
DY
R931
1KR2J-1-GP
DY
1 2
R937
10KR2J-3-GP
R937
10KR2J-3-GP
12
C901
SCD1U16V2KX- 3GP
DY
C901
SCD1U16V2KX- 3GP
DY
1 2
R927 1KR2J-1- GP
DY
R927 1KR2J-1- GP
DY
1 2
R988
100KR2J-1-GP
DY
R988
100KR2J-1-GP
DY
1
23
4
RN905
SRN10KJ-5-G P
RN905
SRN10KJ-5-G P
12
R934
1KR2J-1-GP
DY
R934
1KR2J-1-GP
DY
1 2
R925 0R2J-2-GP
DY
R925 0R2J-2-GP
DY
12
R912 Do Not StuffR912 Do Not Stuff
1 2
R916 51R2J-2-G P
DY
R916 51R2J-2-G P
DY
B
1
A
2
GND
3
Y
4
VCC
5
U927
74LVC1G08GW -1-GP
U927
74LVC1G08GW -1-GP
1 2
R930 0R2J-2- GP
DY
R930 0R2J-2- GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DQ44
M_A_DQ36
M_A_DQ47
M_A_DQ40
M_A_DQ39
M_A_DQ37
M_A_DQ35
M_A_DQ34
M_A_DQ59
M_A_DQ54
M_A_DQ53
M_A_DQ63
M_A_DQ60
M_A_DQ61
M_A_DQ58
M_A_DQ51
M_A_DQ48
M_A_DQ57
M_A_DQ55
M_A_DQ49
M_A_DQ50
M_A_DQ62
M_A_DQ52
M_A_DQ56
M_A_DQ[63..0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ7
M_A_DQ5
M_A_DQ4
M_A_DQ6
M_A_DQ12
M_A_DQ10
M_A_DQ13
M_A_DQ9
M_A_DQ8
M_A_DQ11
M_A_DQ15
M_A_DQ14
M_A_DQ27
M_A_DQ25
M_A_DQ20
M_A_DQ19
M_A_DQ30
M_A_DQ18
M_A_DQ16
M_A_DQ28
M_A_DQ17
M_A_DQ26
M_A_DQ31
M_A_DQ29
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ21
M_A_DQ46
M_A_DQ42
M_A_DQ38
M_A_DQ32
M_A_DQ45
M_A_DQ33
M_A_DQ43
M_A_DQ41
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_A0
M_A_A6
M_A_A3
M_A_A5
M_A_A7
M_A_A1
M_A_A2
M_A_A4
M_A_A10
M_A_A8
M_A_A13
M_A_A11
M_A_A9
M_A_A12
M_A_A14
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ15
M_B_DQ13
M_B_DQ12
M_B_DQ14
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ23
M_B_DQ21
M_B_DQ20
M_B_DQ22
M_B_DQ28
M_B_DQ26
M_B_DQ29
M_B_DQ25
M_B_DQ31
M_B_DQ24
M_B_DQ27
M_B_DQ30
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ39
M_B_DQ37
M_B_DQ36
M_B_DQ38
M_B_DQ44
M_B_DQ42
M_B_DQ45
M_B_DQ41
M_B_DQ47
M_B_DQ40
M_B_DQ43
M_B_DQ46
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ55
M_B_DQ53
M_B_DQ52
M_B_DQ54
M_B_DQ60
M_B_DQ58
M_B_DQ61
M_B_DQ57
M_B_DQ63
M_B_DQ56
M_B_DQ59
M_B_DQ62
M_B_DQ[63..0]
M_B_A12
M_B_A9
M_B_A11
M_B_A13
M_B_A8
M_B_A10
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_A14
M_A_DQS#0
M_A_DQS#3
M_A_DQS#6
M_A_DQS#4
M_A_DQS#1
M_A_DQS#2
M_A_DQS#5
M_A_DQS#7
M_A_DQS5
M_A_DQS7
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS0
M_A_DQS1
M_A_DQS6
M_B_A15
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_A_A15
M_A_DQ[63..0]18
M_B_DQ[63..0]19
M_CLK_DDR0 18
M_CLK_DDR#0 18
M_CKE0 18
M_CS1# 18
M_CS0# 18
M_CLK_DDR1 18
M_CLK_DDR#1 18
M_CKE1 18
M_ODT1 18
M_ODT0 18
M_CLK_DDR2 19
M_CLK_DDR#2 19
M_CKE2 19
M_CS3# 19
M_CS2# 19
M_ODT3 19
M_ODT2 19
M_CLK_DDR3 19
M_CLK_DDR#3 19
M_CKE3 19
M_A_BS018
M_A_BS118
M_A_BS218
M_B_BS019
M_B_BS119
M_B_BS219
M_A_CAS#18
M_A_RAS#18
M_A_WE#18
M_B_CAS#19
M_B_RAS#19
M_B_WE#19
M_A_DM[7..0] 18
M_A_DQS#[7..0] 18
M_A_DQS[7..0] 18
M_A_A[15..0] 18
M_B_DQS#[7..0] 19
M_B_DM[7..0] 19
M_B_DQS[7..0] 19
M_B_A[15..0] 19
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (DDR)
10 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (DDR)
10 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (DDR)
10 90Tuesday, September 08, 2009
UMA
SB_BS0
AB1
SB_BS1
W5
SB_BS2
R7
SB_CAS#
AC5
SB_RAS#
Y7
SB_WE#
AC6
SB_CK0
W8
SB_CK1
V7
SB_CK#0
W9
SB_CK#1
V6
SB_CKE0
M3
SB_CKE1
M2
SB_CS#0
AB8
SB_CS#1
AD6
SB_ODT0
AC7
SB_ODT1
AD1
SB_DM0
D4
SB_DM1
E1
SB_DM2
H3
SB_DM3
K1
SB_DM4
AH1
SB_DM5
AL2
SB_DM6
AR4
SB_DM7
AT8
SB_DQS4
AG2
SB_DQS#4
AH2
SB_DQS5
AL5
SB_DQS#5
AL4
SB_DQS6
AP5
SB_DQS#6
AR5
SB_DQS7
AR7
SB_DQS#7
AR8
SB_DQS0
C5
SB_DQS#0
D5
SB_DQS1
E3
SB_DQS#1
F4
SB_DQS2
H4
SB_DQS#2
J4
SB_DQS3
M5
SB_DQS#3
L4
SB_MA0
U5
SB_MA1
V2
SB_MA2
T5
SB_MA3
V3
SB_MA4
R1
SB_MA5
T8
SB_MA6
R2
SB_MA7
R6
SB_MA8
R4
SB_MA9
R5
SB_MA10
AB5
SB_MA11
P3
SB_MA12
R3
SB_MA13
AF7
SB_MA14
P5
SB_MA15
N1
SB_DQ0
B5
SB_DQ1
A5
SB_DQ2
C3
SB_DQ3
B3
SB_DQ4
E4
SB_DQ5
A6
SB_DQ6
A4
SB_DQ7
C4
SB_DQ8
D1
SB_DQ9
D2
SB_DQ10
F2
SB_DQ11
F1
SB_DQ12
C2
SB_DQ13
F5
SB_DQ14
F3
SB_DQ15
G4
SB_DQ16
H6
SB_DQ17
G2
SB_DQ18
J6
SB_DQ19
J3
SB_DQ20
G1
SB_DQ21
G5
SB_DQ22
J2
SB_DQ23
J1
SB_DQ24
J5
SB_DQ25
K2
SB_DQ26
L3
SB_DQ27
M1
SB_DQ28
K5
SB_DQ29
K4
SB_DQ30
M4
SB_DQ31
N5
SB_DQ32
AF3
SB_DQ33
AG1
SB_DQ34
AJ3
SB_DQ35
AK1
SB_DQ36
AG4
SB_DQ37
AG3
SB_DQ38
AJ4
SB_DQ39
AH4
SB_DQ40
AK3
SB_DQ41
AK4
SB_DQ42
AM6
SB_DQ43
AN2
SB_DQ44
AK5
SB_DQ45
AK2
SB_DQ46
AM4
SB_DQ47
AM3
SB_DQ48
AP3
SB_DQ49
AN5
SB_DQ50
AT4
SB_DQ51
AN6
SB_DQ52
AN4
SB_DQ53
AN3
SB_DQ54
AT5
SB_DQ55
AT6
SB_DQ56
AN7
SB_DQ57
AP6
SB_DQ58
AP8
SB_DQ59
AT9
SB_DQ60
AT7
SB_DQ61
AP9
SB_DQ62
AR10
SB_DQ63
AT10
DDR SYSTEM MEMORY - B
4 OF 9
CLARKSFIELD
CPU1D
CLARKUNF
DDR SYSTEM MEMORY - B
4 OF 9
CLARKSFIELD
CPU1D
CLARKUNF
SA_BS0
AC3
SA_BS1
AB2
SA_BS2
U7
SA_CAS#
AE1
SA_RAS#
AB3
SA_WE#
AE9
SA_CK0
AA6
SA_CK1
Y6
SA_CK#0
AA7
SA_CK#1
Y5
SA_CKE0
P7
SA_CKE1
P6
SA_CS#0
AE2
SA_CS#1
AE8
SA_ODT0
AD8
SA_ODT1
AF9
SA_DM0
B9
SA_DM1
D7
SA_DM2
H7
SA_DM3
M7
SA_DM4
AG6
SA_DM5
AM7
SA_DM6
AN10
SA_DM7
AN13
SA_DQS0
C8
SA_DQS#0
C9
SA_DQS1
F9
SA_DQS#1
F8
SA_DQS2
H9
SA_DQS#2
J9
SA_DQS3
M9
SA_DQS#3
N9
SA_DQS4
AH8
SA_DQS#4
AH7
SA_DQS5
AK10
SA_DQS#5
AK9
SA_DQS6
AN11
SA_DQS#6
AP11
SA_DQS7
AR13
SA_DQS#7
AT13
SA_MA0
Y3
SA_MA1
W1
SA_MA2
AA8
SA_MA3
AA3
SA_MA4
V1
SA_MA5
AA9
SA_MA6
V8
SA_MA7
T1
SA_MA8
Y9
SA_MA9
U6
SA_MA10
AD4
SA_MA11
T2
SA_MA12
U3
SA_MA13
AG8
SA_MA14
T3
SA_MA15
V9
SA_DQ0
A10
SA_DQ1
C10
SA_DQ2
C7
SA_DQ3
A7
SA_DQ4
B10
SA_DQ5
D10
SA_DQ6
E10
SA_DQ7
A8
SA_DQ8
D8
SA_DQ9
F10
SA_DQ10
E6
SA_DQ11
F7
SA_DQ12
E9
SA_DQ13
B7
SA_DQ14
E7
SA_DQ15
C6
SA_DQ16
H10
SA_DQ17
G8
SA_DQ18
K7
SA_DQ19
J8
SA_DQ20
G7
SA_DQ21
G10
SA_DQ22
J7
SA_DQ23
J10
SA_DQ24
L7
SA_DQ25
M6
SA_DQ26
M8
SA_DQ27
L9
SA_DQ28
L6
SA_DQ29
K8
SA_DQ30
N8
SA_DQ31
P9
SA_DQ32
AH5
SA_DQ33
AF5
SA_DQ34
AK6
SA_DQ35
AK7
SA_DQ36
AF6
SA_DQ37
AG5
SA_DQ38
AJ7
SA_DQ39
AJ6
SA_DQ40
AJ10
SA_DQ41
AJ9
SA_DQ42
AL10
SA_DQ43
AK12
SA_DQ44
AK8
SA_DQ45
AL7
SA_DQ46
AK11
SA_DQ47
AL8
SA_DQ48
AN8
SA_DQ49
AM10
SA_DQ50
AR11
SA_DQ51
AL11
SA_DQ52
AM9
SA_DQ53
AN9
SA_DQ54
AT11
SA_DQ55
AP12
SA_DQ56
AM12
SA_DQ57
AN12
SA_DQ58
AM13
SA_DQ59
AT14
SA_DQ60
AT12
SA_DQ61
AL13
SA_DQ62
AR14
SA_DQ63
AP14
DDR SYSTEM MEMORY A
3 OF 9
CLARKSFIELD
CPU1C
CLARKUNF
DDR SYSTEM MEMORY A
3 OF 9
CLARKSFIELD
CPU1C
CLARKUNF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RSVD#AJ15
RSVD#AH15
CFG0
CFG3
CFG4
CFG0
CFG4
CFG1
CFG2
CFG5
CFG6
CFG7
CFG9
CFG10
CFG8
CFG12
CFG13
CFG11
CFG15
CFG16
CFG14
CFG17
CFG7
CFG3
SB_DIMM_VREF#
SA_DIMM_VREF#
SA_DIMM_VREF#
SB_DIMM_VREF#M_VREF_DQ_DIMM1
M_VREF_DQ_DIMM0
DDR_RST_GATE9,25
DDR_RST_GATE9,25
M_VREF_DQ_DIMM018
M_VREF_DQ_DIMM119
Title
S
ize Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (RESERVED)
11 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (RESERVED)
11 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (RESERVED)
11 90Tuesday, September 08, 2009
UMA
PCI-Express Configuration Select
CFG0
1:Single PEG
0:Bifurcation enabled
CFG4 - Display Port Presence
CFG4
1:Disabled; No Physical Display Port
attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port
VSS (AP34) can be left NC is
CRB implementation; EDS/DG
recommendation to GND.
CFG7(Reserved) - Temporarily used for early
Clarksfield samples.
CFG7 Clarksfield (only for early samples pre-ES1) -
Connect to GND with 3.01K Ohm/5% resistor.
Note: Only temporary for early CFD sample
(rPGA/BGA) [For details please refer to the
WW33 MoW and sighting report].
For a common M/B design (for AUB and CFD),
the pull-down resistor shouble be used. Does
not impact AUB functionality.
CFG3 - PCI-Express Static Lane Reversal
CFG3
1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...
DIS
改
改改
改
5%
Calpella Platform Design Guide
Revision 1.6
Switchable GFX, just like integrated GFX only, to enable LVDS it is required that the
OEM set the LDVS (L_DDC_DATA) strap to present (pulled up) and the eDP strap
(CFG[4]) to disabled (not pulled down).
4.8.3.1 LVDS Switching
4.8.3.2 eDP Switching
eDP for Switchable GFX can only be driven out of Port D of PCH. To configure Port D for
embedded DP it is required to set the DDPD_CTRLDATA strap high to 3.3V Core rail
through 2.2 kΩ ±5% resistor, LVDS (L_DDC_DATA) strap as no connect and the eDP
strap CFG[4] as no connect.
Page 482,486
CFG0
AM30
CFG1
AM28
CFG2
AP31
CFG3
AL32
CFG4
AL30
CFG5
AM31
CFG6
AN29
CFG7
AM32
CFG8
AK32
CFG9
AK31
CFG10
AK28
CFG11
AJ28
CFG12
AN30
CFG13
AN32
CFG14
AJ32
CFG15
AJ29
CFG16
AJ30
CFG17
AK30
RSVD#AH25
AH25
RSVD#AK26
AK26
RSVD#AJ26
AJ26
RSVD#AJ27
AJ27
RSVD_TP_86
H16
RSVD#AL28
AL28
RSVD#AL29
AL29
RSVD#AP30
AP30
RSVD#AP32
AP32
RSVD#AL27
AL27
RSVD#AT31
AT31
RSVD#AT32
AT32
RSVD#AP33
AP33
RSVD#AR33
AR33
RSVD#AR32
AR32
RSVD#J28
J28
RSVD#J29
J29
RSVD#A19
A19
RSVD#B19
B19
RSVD#A20
A20
RSVD#B20
B20
RSVD#T9
T9
RSVD#U9
U9
RSVD#AB9
AB9
RSVD#AC9
AC9
SA_CK2
AA5
SA_CK#2
AA4
SA_CKE2
R8
SA_CK3
AA2
SA_CK#3
AA1
SA_CKE3
R9
SA_CS#2
AD3
SA_CS#3
AG7
SA_ODT2
AD2
SA_ODT3
AE3
SB_CK2
V4
SB_CK#2
V5
SB_CKE2
N2
SB_CK3
W3
SB_CK#3
W2
SB_CKE3
N3
SB_CS#2
AD5
SB_CS#3
AE5
SB_ODT2
AD7
SB_ODT3
AD9
RSVD#AL26
AL26
RSVD_NCTF_37
AR2
RSVD#AP25
AP25
RSVD#AL25
AL25
RSVD#AL24
AL24
RSVD#AL22
AL22
RSVD#AJ33
AJ33
RSVD#AG9
AG9
RSVD#M27
M27
RSVD#L28
L28
SA_DIMM_VREF
J17
SB_DIMM_VREF
H17
RSVD#G25
G25
RSVD#G17
G17
RSVD#E31
E31
RSVD#E30
E30
RSVD#AJ13
AJ13
RSVD#AJ12
AJ12
RSVD_TP#E15
E15
RSVD_TP#F15
F15
KEY
A2
RSVD#D15
D15
RSVD#C15
C15
RSVD#AJ15
AJ15
RSVD#AH15
AH15
VSS
AP34
RESERVED
5 OF 9
CLARKSFIELD
CPU1E
CLARKUNF
RESERVED
5 OF 9
CLARKSFIELD
CPU1E
CLARKUNF
1
TP1111Do Not Stuff TP1111Do Not Stuff
1
TP1120 Do Not StuffTP1120 Do Not Stuff
1
TP1114Do Not Stuff TP1114Do Not Stuff
12
R1108
100KR2J-1-GP
CFD
R1108
100KR2J-1-GP
CFD
G
D S
Q1101
AO3418-GP
CFD
Q1101
AO3418-GP
CFD
1
TP1104Do Not Stuff TP1104Do Not Stuff
1
TP1109Do Not Stuff TP1109Do Not Stuff
1
TP1107Do Not Stuff TP1107Do Not Stuff
1
TP1106Do Not Stuff TP1106Do Not Stuff
1
TP1112Do Not Stuff TP1112Do Not Stuff
1
TP1110Do Not Stuff TP1110Do Not Stuff
1
TP1121 Do Not StuffTP1121 Do Not Stuff
1
TP1101Do Not Stuff TP1101Do Not Stuff
1
TP1113Do Not Stuff TP1113Do Not Stuff
12
R1110
100KR2J-1-GP
CFD
R1110
100KR2J-1-GP
CFD
G
D S
Q1102
AO3418-GP
CFD
Q1102
AO3418-GP
CFD
12
R1102
3KR2F-GP
R1102
3KR2F-GP
1
TP1108Do Not Stuff TP1108Do Not Stuff
1 2
R1104 0R2J-2-GP
DY
R1104 0R2J-2-GP
DY
12
R1109
3KR2F-GP
DY
R1109
3KR2F-GP
DY
1
TP1115Do Not Stuff TP1115Do Not Stuff
1
TP1102Do Not Stuff TP1102Do Not Stuff
12
R1103
3KR2F-GP
DY
R1103
3KR2F-GP
DY
1 2
R1105 0R2J-2-GP
DY
R1105 0R2J-2-GP
DY
12
R1101
3KR2F-GP
DY
R1101
3KR2F-GP
DY
1
TP1105Do Not Stuff TP1105Do Not Stuff
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC_SENSE
CPU_VID6
VSS_SENSE
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
TP_VTT_SELECT
TP_VSS_SENSE_VTT
+VCC_CORE
+VCC_CORE
+VCC_CORE
+1.05V_VTT
+1.05V_VTT
CPU_VID[6..0] 47
VCC_SENSE 47
VSS_SENSE 47
PSI# 47
PM_DPRSLPVR 47
IMVP_IMON 47
VTT_SENSE 49
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (VCC_CORE)
12 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (VCC_CORE)
12 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (VCC_CORE)
12 90Tuesday, September 08, 2009
UMA
PROCESSOR CORE POWER
The decoupling capacitors, filter
recommendations and sense resistors on the
CPU/PCH Rails are specific to the CRB
Implementation. Customers need to follow the
recommendations in the Calpella Platform
Design Guide.
Please note that the VTT Rail
Values are
Arrandale VTT=1.05V;
Clarksfield VTT=1.1V
VTT_SELECT = Low, 1.1V
VTT_SELECT = High, 1.05V
Clarksfield = 52A
Arrandale = 48A
DIS(Arrandale +1.05V_VTT) = 20.95A
UMA(Arrandale +1.05V_VTT) = 19.84A
DIS(Clarksfield +1.05V_VTT) = 14.4A
12
R1204
100R2F-L1-GP-U
R1204
100R2F-L1-GP-U
12
R1201
100R2F-L1-GP-U
R1201
100R2F-L1-GP-U
12
C1202
SC10U10V5ZY-1GP
C1202
SC10U10V5ZY-1GP
12
C1223
SC10U6D3V5MX-3GP
C1223
SC10U6D3V5MX-3GP
12
C1212
SC10U6D3V5MX-3GP
C1212
SC10U6D3V5MX-3GP
1
TP1203
Do Not Stuff
TP1203
Do Not Stuff
12
C1231
SC10U6D3V5MX-3GP
C1231
SC10U6D3V5MX-3GP
12
C1242
SC22U6D3V5MX-2GP
C1242
SC22U6D3V5MX-2GP
12
C1238
SC10U6D3V5MX-3GP
C1238
SC10U6D3V5MX-3GP
12
C1210
SC10U6D3V5MX-3GP
C1210
SC10U6D3V5MX-3GP
12
C1228
SC10U6D3V5MX-3GP
C1228
SC10U6D3V5MX-3GP
12
C1209
SC10U6D3V5MX-3GP
C1209
SC10U6D3V5MX-3GP
12
C1232
SC22U6D3V5MX-2GP
C1232
SC22U6D3V5MX-2GP
12
C1241
SC22U6D3V5MX-2GP
C1241
SC22U6D3V5MX-2GP
12
C1243
SC10U6D3V5MX-3GP
DY
C1243
SC10U6D3V5MX-3GP
DY
12
C1225
SC22U6D3V5MX-2GP
C1225
SC22U6D3V5MX-2GP
12
C1224
SC10U6D3V5MX-3GP
C1224
SC10U6D3V5MX-3GP
12
C1239
SC10U6D3V5MX-3GP
C1239
SC10U6D3V5MX-3GP
12
C1205
SC10U10V5ZY-1GP
C1205
SC10U10V5ZY-1GP
12
C1215
SC10U6D3V5MX-3GP
C1215
SC10U6D3V5MX-3GP
12
C1237
SC10U6D3V5MX-3GP
C1237
SC10U6D3V5MX-3GP
12
C1204
SC10U10V5ZY-1GP
C1204
SC10U10V5ZY-1GP
ISENSE
AN35
VTT_SENSE
B15
PSI#
AN33
VID
AK35
VID
AK33
VID
AK34
VID
AL35
VID
AL33
VID
AM33
VID
AM35
PROC_DPRSLPVR
AM34
VTT_SELECT
G15
VCC_SENSE
AJ34
VSS_SENSE_VTT
A15
VCC
AG35
VCC
AG34
VCC
AG33
VCC
AG32
VCC
AG31
VCC
AG30
VCC
AG29
VCC
AG28
VCC
AG27
VCC
AG26
VCC
AF35
VCC
AF34
VCC
AF33
VCC
AF32
VCC
AF31
VCC
AF30
VCC
AF29
VCC
AF28
VCC
AF27
VCC
AF26
VCC
AD35
VCC
AD34
VCC
AD33
VCC
AD32
VCC
AD31
VCC
AD30
VCC
AD29
VCC
AD28
VCC
AD27
VCC
AD26
VCC
AC35
VCC
AC34
VCC
AC33
VCC
AC32
VCC
AC31
VCC
AC30
VCC
AC29
VCC
AC28
VCC
AC27
VCC
AC26
VCC
AA35
VCC
AA34
VCC
AA33
VCC
AA32
VCC
AA31
VCC
AA30
VCC
AA29
VCC
AA28
VCC
AA27
VCC
AA26
VCC
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
VCC
Y30
VCC
Y29
VCC
Y28
VCC
Y27
VCC
Y26
VCC
V35
VCC
V34
VCC
V33
VCC
V32
VCC
V31
VCC
V30
VCC
V29
VCC
V28
VCC
V27
VCC
V26
VCC
U35
VCC
U34
VCC
U33
VCC
U32
VCC
U31
VCC
U30
VCC
U29
VCC
U28
VCC
U27
VCC
U26
VCC
R35
VCC
R34
VCC
R33
VCC
R32
VCC
R31
VCC
R30
VCC
R29
VCC
R28
VCC
R27
VCC
R26
VCC
P35
VCC
P34
VCC
P33
VCC
P32
VCC
P31
VCC
P30
VCC
P29
VCC
P28
VCC
P27
VCC
P26
VTT0
AF10
VTT0
AE10
VTT0
AC10
VTT0
AB10
VTT0
Y10
VTT0
W10
VTT0
U10
VTT0
T10
VTT0
J12
VTT0
J11
VTT0
AH14
VTT0
AH12
VTT0
AH11
VTT0
AH10
VTT0
J14
VTT0
J13
VTT0
H14
VTT0
H12
VTT0
G14
VTT0
G13
VTT0
G12
VTT0
G11
VTT0
F14
VTT0
F13
VTT0
F12
VTT0
F11
VTT0
E14
VTT0
E12
VTT0
D14
VTT0
D13
VTT0
D12
VTT0
D11
VTT0
C14
VTT0
C13
VTT0
C12
VTT0
C11
VTT0
B14
VTT0
B12
VTT0
A14
VTT0
A13
VTT0
A12
VTT0
A11
VSS_SENSE
AJ35
VTT0
J16
VTT0
J15
POWER
CPU CORE SUPPLY
1.1V RAIL POWER
SENSE LINES
CPU VIDS
6 OF 9
CLARKSFIELD
CPU1F
CLARKUNF
POWER
CPU CORE SUPPLY
1.1V RAIL POWER
SENSE LINES
CPU VIDS
6 OF 9
CLARKSFIELD
CPU1F
CLARKUNF
12
C1208
SC10U6D3V5MX-3GP
C1208
SC10U6D3V5MX-3GP
12
C1218
SC10U10V5ZY-1GP
C1218
SC10U10V5ZY-1GP
12
C1234
SC10U6D3V5MX-3GP
C1234
SC10U6D3V5MX-3GP
1
TP1202
Do Not Stuff
TP1202
Do Not Stuff
12
C1227
SC22U6D3V5MX-2GP
C1227
SC22U6D3V5MX-2GP
12
C1217
SC10U10V5ZY-1GP
C1217
SC10U10V5ZY-1GP
12
C1213
SC10U6D3V5MX-3GP
C1213
SC10U6D3V5MX-3GP
12
C1240
SC10U6D3V5MX-3GP
C1240
SC10U6D3V5MX-3GP
12
C1226
SC22U6D3V5MX-2GP
C1226
SC22U6D3V5MX-2GP
12
C1214
SC10U6D3V5MX-3GP
C1214
SC10U6D3V5MX-3GP
12
C1220
SC10U6D3V5MX-3GP
C1220
SC10U6D3V5MX-3GP
12
C1235
SC10U6D3V5MX-3GP
C1235
SC10U6D3V5MX-3GP
12
C1207
SC10U6D3V5MX-3GP
C1207
SC10U6D3V5MX-3GP
12
C1236
SC10U6D3V5MX-3GP
C1236
SC10U6D3V5MX-3GP
12
C1229
SC10U6D3V5MX-3GP
C1229
SC10U6D3V5MX-3GP
12
C1230
SC10U6D3V5MX-3GP
C1230
SC10U6D3V5MX-3GP
12
C1206
SC10U6D3V5MX-3GP
C1206
SC10U6D3V5MX-3GP
12
C1201
SC10U10V5ZY-1GP
C1201
SC10U10V5ZY-1GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TP_GFX_DPRSLPVR
GFX_IMON_R
+1.5V_CPU
+1.8V_RUN
+CPU_GFXCORE
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.5V_CPU
+1.5V_SUS
+1.5V_CPU
+1.5V_SUS
+1.5V_CPU
+1.5V_SUS
+1.5V_CPU
+1.5V_SUS
GFX_VR_EN 53
VCC_AXG_SENSE 53
VSS_AXG_SENSE 53
GFX_IMON 53
GFX_VID0 53
GFX_VID1 53
GFX_VID2 53
GFX_VID3 53
GFX_VID4 53
GFX_VID5 53
GFX_VID6 53
Title
S
ize Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (VCC_GFXCORE)
13 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (VCC_GFXCORE)
13 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (VCC_GFXCORE)
13 90Tuesday, September 08, 2009
UMA
18A
ARD=1.35A
CFD=1.1A
Please note that the VTT Rail
Values are
Arrandale VTT=1.05V;
Clarksfield VTT=1.1V
22A
2009/08/12
Follow Intel "425302_Calpella_S3PowerReduction_WhitePaper_Rev0.9.
pdf" document.
ARD=3A
CFD=6A
1
TP1303 Do Not StuffTP1303 Do Not Stuff
12
C1379
SCD1U10V2KX-4GP
DY
C1379
SCD1U10V2KX-4GP
DY
12
C1301
SC1U10V2KX-1GP
C1301
SC1U10V2KX-1GP
12
C1305
SC1U10V2KX-1GP
C1305
SC1U10V2KX-1GP
12
C1311
SC10U6D3V5MX-3GP
C1311
SC10U6D3V5MX-3GP
12
C1324
SC10U6D3V5MX-3GP
DY
C1324
SC10U6D3V5MX-3GP
DY
12
C1306
SC10U6D3V5MX-3GP
C1306
SC10U6D3V5MX-3GP
1 2
R1301
0R2J-2-GP
UMA
R1301
0R2J-2-GP
UMA
12
C1316
SC10U6D3V5MX-3GP
C1316
SC10U6D3V5MX-3GP
12
C1309
SC10U6D3V5MX-3GP
C1309
SC10U6D3V5MX-3GP
12
C1328
SC10U6D3V5MX-3GP
C1328
SC10U6D3V5MX-3GP
12
C1312
SC10U6D3V5MX-3GP
C1312
SC10U6D3V5MX-3GP
12
C1302
SC1U10V2KX-1GP
C1302
SC1U10V2KX-1GP
12
C1314
SC10U6D3V5MX-3GP
C1314
SC10U6D3V5MX-3GP
12
C1320
SC4D7U6D3V5KX-3GP
C1320
SC4D7U6D3V5KX-3GP
12
C1313
SC10U6D3V5MX-3GP
C1313
SC10U6D3V5MX-3GP
12
C1323
SC10U6D3V5MX-3GP
C1323
SC10U6D3V5MX-3GP
1 2
R1302
1KR2J-1-GP
DIS
R1302
1KR2J-1-GP
DIS
12
C1376
SCD1U10V2KX-4GP
DY
C1376
SCD1U10V2KX-4GP
DY
12
C1327
SC10U6D3V5MX-3GP
DY
C1327
SC10U6D3V5MX-3GP
DY
12
C1326
SC10U6D3V5MX-3GP
C1326
SC10U6D3V5MX-3GP
12
C1303
SC1U10V2KX-1GP
C1303
SC1U10V2KX-1GP
12
C1325
SC10U6D3V5MX-3GP
C1325
SC10U6D3V5MX-3GP
12
C1318
SC1U25V5KX-1GP
C1318
SC1U25V5KX-1GP
12
TC1303
SE330U2VDM-L-GP
DY
TC1303
SE330U2VDM-L-GP
DY
12
C1307
SC10U6D3V5MX-3GP
C1307
SC10U6D3V5MX-3GP
GFX_VID
AM22
GFX_VID
AP22
GFX_VID
AN22
GFX_VID
AP23
GFX_VID
AM23
GFX_VID
AP24
GFX_VID
AN24
GFX_VR_EN
AR25
GFX_DPRSLPVR
AT25
GFX_IMON
AM24
VAXG_SENSE
AR22
VSSAXG_SENSE
AT22
VAXG
AT21
VAXG
AT19
VAXG
AT18
VAXG
AT16
VAXG
AR21
VAXG
AR19
VAXG
AR18
VAXG
AR16
VAXG
AP21
VAXG
AP19
VAXG
AP18
VAXG
AP16
VAXG
AN21
VAXG
AN19
VAXG
AN18
VAXG
AN16
VAXG
AM21
VAXG
AM19
VAXG
AM18
VAXG
AM16
VAXG
AL21
VAXG
AL19
VAXG
AL18
VAXG
AL16
VAXG
AK21
VAXG
AK19
VAXG
AK18
VAXG
AK16
VAXG
AJ21
VAXG
AJ19
VAXG
AJ18
VAXG
AJ16
VAXG
AH21
VAXG
AH19
VAXG
AH18
VAXG
AH16
VTT1
J24
VTT1
J23
VTT1
H25
VTT1
K26
VTT1
J27
VTT1
J26
VTT1
J25
VTT1
H27
VTT1
G28
VTT1
G27
VTT1
G26
VTT1
F26
VTT1
E26
VTT1
E25
VDDQ
AJ1
VDDQ
AF1
VDDQ
AE7
VDDQ
AE4
VDDQ
AC1
VDDQ
AB7
VDDQ
AB4
VDDQ
Y1
VDDQ
W7
VDDQ
W4
VDDQ
U1
VDDQ
T7
VDDQ
T4
VDDQ
P1
VDDQ
N7
VDDQ
N4
VDDQ
L1
VDDQ
H1
VTT0
P10
VTT0
N10
VTT0
L10
VTT0
K10
VCCPLL
L26
VCCPLL
L27
VCCPLL
M26
VTT1
J22
VTT1
J20
VTT1
J18
VTT1
H21
VTT1
H20
VTT1
H19
POWER
GRAPHICS VIDs
GRAPHICS
DDR3 - 1.5V RAILS
FDI PEG & DMI
SENSE
LINES
1.1V1.8V
7 OF 9
CLARKSFIELD
CPU1G
CLARKUNF
POWER
GRAPHICS VIDs
GRAPHICS
DDR3 - 1.5V RAILS
FDI PEG & DMI
SENSE
LINES
1.1V1.8V
7 OF 9
CLARKSFIELD
CPU1G
CLARKUNF
12
C1377
SCD1U10V2KX-4GP
DY
C1377
SCD1U10V2KX-4GP
DY
12
C1321
SC2D2U10V3KX-1GP
C1321
SC2D2U10V3KX-1GP
12
C1310
SC10U6D3V5MX-3GP
C1310
SC10U6D3V5MX-3GP
12
C1319
SC1U25V5KX-1GP
C1319
SC1U25V5KX-1GP
12
C1322
SC10U6D3V5MX-3GP
C1322
SC10U6D3V5MX-3GP
12
C1378
SCD1U10V2KX-4GP
DY
C1378
SCD1U10V2KX-4GP
DY
12
C1317
SC10U6D3V5MX-3GP
C1317
SC10U6D3V5MX-3GP
12
C1304
SC1U10V2KX-1GP
C1304
SC1U10V2KX-1GP
12
TC1301
SE330U2D5VDM-2GP
TC1301
SE330U2D5VDM-2GP
12
C1315
SC10U6D3V5MX-3GP
C1315
SC10U6D3V5MX-3GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TP_MCP_VSS_NCTF2
TP_MCP_VSS_NCTF1
TP_MCP_VSS_NCTF4
TP_MCP_VSS_NCTF3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (VSS)
14 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (VSS)
14 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
CPU (VSS)
14 90Tuesday, September 08, 2009
UMA
1
TP1406TP1406
1
TP1401TP1401
1
TP1405TP1405
1
TP1402TP1402
VSS
K27
VSS
K9
VSS
K6
VSS
K3
VSS
J32
VSS
J30
VSS
J21
VSS
J19
VSS
H35
VSS
H32
VSS
H28
VSS
H26
VSS
H24
VSS
H22
VSS
H18
VSS
H15
VSS
H13
VSS
H11
VSS
H8
VSS
H5
VSS
H2
VSS
G34
VSS
G31
VSS
G20
VSS
G9
VSS
G6
VSS
G3
VSS
F30
VSS
F27
VSS
F25
VSS
F22
VSS
F19
VSS
F16
VSS
E35
VSS
E32
VSS
E29
VSS
E24
VSS
E21
VSS
E18
VSS
E13
VSS
E11
VSS
E8
VSS
E5
VSS
E2
VSS
D33
VSS
D30
VSS
D26
VSS
D9
VSS
D6
VSS
D3
VSS
C34
VSS
C32
VSS
C29
VSS
C28
VSS
C24
VSS
C22
VSS
C20
VSS
C19
VSS
C16
VSS
B31
VSS
B25
VSS
B21
VSS
B18
VSS
B17
VSS
B13
VSS
B11
VSS
B8
VSS
B6
VSS
B4
VSS
A29
VSS_NCTF#AT35
AT35
VSS_NCTF#AT1
AT1
VSS_NCTF
AR34
VSS_NCTF
B34
VSS_NCTF
B2
VSS_NCTF#B1
B1
VSS_NCTF#A35
A35
VSS
A27
VSS
A23
VSS
A9
RSVD_NCTF#A3
A3
RSVD_NCTF#A33
A33
RSVD_NCTF#A34
A34
RSVD_NCTF#AP1
AP1
RSVD_NCTF#AP35
AP35
RSVD_NCTF#AR1
AR1
RSVD_NCTF#AR35
AR35
RSVD_NCTF#AT2
AT2
RSVD_NCTF#AT3
AT3
RSVD_NCTF#AT33
AT33
RSVD_NCTF#AT34
AT34
RSVD_NCTF#C1
C1
RSVD_NCTF#C35
C35
RSVD_NCTF#B35
B35
VSS
NCTF
9 OF 9
CLARKSFIELD
NCYF TEST PIN:
A35,AT1,AT35,B1,A3,A33,A34,
AP1,AP35,AR1,AR35,AT2,AT3,
AT33,AT34,C1,C35,B35
CPU1I
CLARKUNF
VSS
NCTF
9 OF 9
CLARKSFIELD
NCYF TEST PIN:
A35,AT1,AT35,B1,A3,A33,A34,
AP1,AP35,AR1,AR35,AT2,AT3,
AT33,AT34,C1,C35,B35
CPU1I
CLARKUNF
VSS
AT20
VSS
AT17
VSS
AR31
VSS
AR28
VSS
AR26
VSS
AR24
VSS
AR23
VSS
AR20
VSS
AR17
VSS
AR15
VSS
AR12
VSS
AR9
VSS
AR6
VSS
AR3
VSS
AP20
VSS
AP17
VSS
AP13
VSS
AP10
VSS
AP7
VSS
AP4
VSS
AP2
VSS
AN34
VSS
AN31
VSS
AN23
VSS
AN20
VSS
AN17
VSS
AM29
VSS
AM27
VSS
AM25
VSS
AM20
VSS
AM17
VSS
AM14
VSS
AM11
VSS
AM8
VSS
AM5
VSS
AM2
VSS
AL34
VSS
AL31
VSS
AL23
VSS
AL20
VSS
AL17
VSS
AL12
VSS
AL9
VSS
AL6
VSS
AL3
VSS
AK29
VSS
AK27
VSS
AK25
VSS
AK20
VSS
AK17
VSS
AJ31
VSS
AJ23
VSS
AJ20
VSS
AJ17
VSS
AJ14
VSS
AJ11
VSS
AJ8
VSS
AJ5
VSS
AJ2
VSS
AH35
VSS
AH34
VSS
AH33
VSS
AH32
VSS
AH31
VSS
AH30
VSS
AH29
VSS
AH28
VSS
AH27
VSS
AH26
VSS
AH20
VSS
AH17
VSS
AH13
VSS
AH9
VSS
AH6
VSS
AH3
VSS
AG10
VSS
AF8
VSS
AF4
VSS
AF2
VSS
AE35
VSS
AE34
VSS
AE33
VSS
AE32
VSS
AE31
VSS
AE30
VSS
AE29
VSS
AE28
VSS
AE27
VSS
AE26
VSS
AE6
VSS
AD10
VSS
AC8
VSS
AC4
VSS
AC2
VSS
AB35
VSS
AB34
VSS
AB33
VSS
AB32
VSS
AB31
VSS
AB30
VSS
AB29
VSS
AB28
VSS
AB27
VSS
AB26
VSS
AB6
VSS
AA10
VSS
Y8
VSS
Y4
VSS
Y2
VSS
W35
VSS
W34
VSS
W33
VSS
W32
VSS
W31
VSS
W30
VSS
W29
VSS
W28
VSS
W27
VSS
W26
VSS
W6
VSS
V10
VSS
U8
VSS
U4
VSS
U2
VSS
T35
VSS
T34
VSS
T33
VSS
T32
VSS
T31
VSS
T30
VSS
T29
VSS
T28
VSS
T27
VSS
T26
VSS
T6
VSS
R10
VSS
P8
VSS
P4
VSS
P2
VSS
N35
VSS
N34
VSS
N33
VSS
N32
VSS
N31
VSS
N30
VSS
N29
VSS
N28
VSS
N27
VSS
N26
VSS
N6
VSS
M10
VSS
L35
VSS
L32
VSS
L29
VSS
L8
VSS
L5
VSS
L2
VSS
K34
VSS
K33
VSS
K30
VSS
8 OF 9
CLARKSFIELD
CPU1H
CLARKUNF
VSS
8 OF 9
CLARKSFIELD
CPU1H
CLARKUNF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
Reserved
A3
15 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
Reserved
A3
15 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
Reserved
A3
15 90Tuesday, September 08, 2009
UMA
(Blank)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
Reserved
A3
16 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
Reserved
A3
16 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
Reserved
A3
16 90Tuesday, September 08, 2009
UMA
(Blank)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
(Reserve)
A3
17 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
(Reserve)
A3
17 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
(Reserve)
A3
17 90Tuesday, September 08, 2009
UMA
(Blank)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_A0
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ17
M_A_DQ18
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ19
M_A_DQ20
M_A_A1
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_A2
M_A_A3
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_A4
M_A_A5
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_BS1
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQ0
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_ODT0
M_ODT1
M_A_DQS#0
M_A_BS2
M_A_DQS#1
M_A_DQS#2
M_A_BS0
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_A15
M_VREF_DQ_DIMM0
M_CLK_DDR#0
M_CLK_DDR1
SA0_DM1
SA1_DM1
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
PCH_SMBDATA
PCH_SMBCLK
M_CLK_DDR0
M_CLK_DDR#0
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_CLK_DDR#1
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR#1
SA0_DM1
SA1_DM1
+V_DDR_REF
+0.75V_DDR_VTT
+0.75V_DDR_VTT
+1.5V_SUS
+3.3V_RUN
+1.5V_SUS
+V_DDR_REF
+1.5V_SUS
M_A_DQS#[7..0]10
M_A_DQ[63..0]10
M_A_DM[7..0]10
M_A_DQS[7..0]10
M_A_A[15..0]10
M_A_BS210
M_A_BS010
M_A_BS110
M_ODT010
M_ODT110
DDR3_DRAMRST#9,19
M_CLK_DDR#0 10
M_CKE1 10
M_CS0# 10
M_CLK_DDR#1 10
M_CLK_DDR1 10
M_CKE0 10
M_A_WE# 10
M_A_CAS# 10
M_CS1# 10
M_CLK_DDR0 10
M_A_RAS# 10
PCH_SMBDATA 7,19,23,40,64
PCH_SMBCLK 7,19,23,40,64
PM_EXTTS#0 9
M_VREF_DQ_DIMM0 11
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
DDRIII-SODIMM SLOT1
Custom
18 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
DDRIII-SODIMM SLOT1
Custom
18 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
DDRIII-SODIMM SLOT1
Custom
18 90Tuesday, September 08, 2009
UMA
Layout Note:
Place near DM1
SSID = MEMORY
Height 5.2mm
put near connector
SMBUS address:A0
Layout Note:
Put close to VTT1,VTT2.
2009/07/30
Change connect or to 62.10017 .K11
2009/08/12
Follow Intel "425302_Calpella_S3PowerReduction_WhitePaper_Rev0.9.
pdf" document.
Note:
If SA0_DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
If SA0_DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
If SA0_DIM0 = 0, SA1_DIM0 = 1
SO-DIMMA SPD Address is 0xA4
12
C1807
SC2D2U10V3KX-1GP
DY
C1807
SC2D2U10V3KX-1GP
DY
12
C1816
SC10U6D3V5MX-3GP
C1816
SC10U6D3V5MX-3GP
12
C1801
SC1U10V2KX-1GP
C1801
SC1U10V2KX-1GP
12
C1812
SC10U6D3V5MX-3GP
C1812
SC10U6D3V5MX-3GP
12
C1806
SCD1U16V2KX-3GP
C1806
SCD1U16V2KX-3GP
12
C1872
SCD1U10V2KX-4GP
C1872
SCD1U10V2KX-4GP
12
C1817
SCD1U16V2KX-3GP
C1817
SCD1U16V2KX-3GP
12
C1819
Do Not Stuff
C1819
Do Not Stuff
12
C1820
Do Not Stuff
C1820
Do Not Stuff
12
TC1803
ST330U2D5VBM-1-GP
TC1803
ST330U2D5VBM-1-GP
12
C1873
SCD1U10V2KX-4GP
C1873
SCD1U10V2KX-4GP
12
C1814
SC1U10V2KX-1GP
C1814
SC1U10V2KX-1GP
12
C1805
SC2D2U10V3KX-1GP
C1805
SC2D2U10V3KX-1GP
12
C1815
SC1U10V2KX-1GP
C1815
SC1U10V2KX-1GP
12
C1874
SCD1U10V2KX-4GP
C1874
SCD1U10V2KX-4GP
12
C1823
SC10U6D3V5MX-3GP
C1823
SC10U6D3V5MX-3GP
12
C1803
SC10U6D3V5MX-3GP
C1803
SC10U6D3V5MX-3GP
12
C1810
SCD1U16V2KX-3GP
C1810
SCD1U16V2KX-3GP
12
C1811
SC10U6D3V5MX-3GP
C1811
SC10U6D3V5MX-3GP
12
R1803
0R2J-2-GP
ARD
R1803
0R2J-2-GP
ARD
12
C1875
SCD1U10V2KX-4GP
C1875
SCD1U10V2KX-4GP
12
C1821
Do Not Stuff
C1821
Do Not Stuff
12
R1801
10KR2J-3-GP
R1801
10KR2J-3-GP
12
C1813
SC1U10V2KX-1GP
C1813
SC1U10V2KX-1GP
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_DQ
1
VSS
2
NP1
NP1
NP2
NP2
RAS#
110
WE#
113
CAS#
115
CS0#
114
CS1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
SDA
200
SCL
202
VDDSPD
199
SA0
197
SA1
201
VREF_CA
126
VDD18
124
NC#1
77
NC#2
122
NC#/TEST
125
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD13
111
VDD14
112
VDD15
117
VDD16
118
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VDD1
75
VSS
65
VSS
66
VSS
71
VSS
72
VDD2
76
VDD11
105
VDD12
106
VDD17
123
VSS
127
VSS
128
VSS
134
VSS
133
VSS
138
VSS
139
VSS
144
VSS
145
VSS
151
VSS
150
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
173
VSS
172
VSS
179
VSS
178
VSS
185
VSS
184
VSS
189
VSS
190
VSS
195
VSS
196
RESET#
30
EVENT#
198
VSS
205
VSS
206
VTT1
203
VTT2
204
DM1
DDR3-204P-25-GP
62.10017.K11
DM1
DDR3-204P-25-GP
62.10017.K11
12
C1802
SC10U6D3V5MX-3GP
C1802
SC10U6D3V5MX-3GP
12
C1804
SC10U6D3V5MX-3GP
C1804
SC10U6D3V5MX-3GP
12
C1818
Do Not Stuff
C1818
Do Not Stuff
12
R1802
10KR2J-3-GP
R1802
10KR2J-3-GP
12
C1809
SC2D2U10V3KX-1GP
C1809
SC2D2U10V3KX-1GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_DQ0
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_DQ1
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_BS2
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_BS0
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_ODT2
M_ODT3
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_BS1
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS#0
M_B_A15
M_VREF_DQ_DIMM1
PCH_SMBDATA
PCH_SMBCLK
M_CLK_DDR#3
M_CLK_DDR3
M_CLK_DDR2
M_CLK_DDR#2
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
SA1_DM2
SA0_DM2
M_CLK_DDR#2
M_CLK_DDR2
M_CLK_DDR3
M_CLK_DDR#3
SA0_DM2
SA1_DM2
+V_DDR_REF
+1.5V_SUS
+3.3V_RUN
+1.5V_SUS
+0.75V_DDR_VTT
+0.75V_DDR_VTT
+3.3V_RUN
+V_DDR_REF
+1.5V_SUS
M_B_DQS#[7..0]10
M_B_DQ[63..0]10
M_B_DM[7..0]10
M_B_DQS[7..0]10
M_B_A[15..0]10
M_B_BS210
M_B_BS010
M_B_BS110
M_ODT210
M_ODT310
DDR3_DRAMRST#9,18
M_CLK_DDR#2 10
M_CLK_DDR2 10
M_CLK_DDR#3 10
M_CLK_DDR3 10
M_B_WE# 10
M_B_CAS# 10
M_B_RAS# 10
M_CKE3 10
M_CS2# 10
M_CKE2 10
M_CS3# 10
PCH_SMBCLK 7,18,23,40,64
PCH_SMBDATA 7,18,23,40,64
PM_EXTTS#1 9
M_VREF_DQ_DIMM1 11
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
DDRIII-SODIMM SLOT2
Custom
19 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
DDRIII-SODIMM SLOT2
Custom
19 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
DDRIII-SODIMM SLOT2
Custom
19 90Tuesday, September 08, 2009
UMA
SSID = MEMORY
Height 9.2mm
Layout Note:
Place near DM2
put near connector
SMBUS address:A4
Layout Note:
Put close to VTT1,VTT2.
2009/07/30
Change connect or to 62.10017 .K01
2009/08/12
Follow Intel "425302_Calpella_S3PowerReduction_WhitePaper_Rev0.9.
pdf" document.
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_DQ
1
VSS
2
NP1
NP1
NP2
NP2
RAS#
110
WE#
113
CAS#
115
CS0#
114
CS1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
SDA
200
SCL
202
VDDSPD
199
SA0
197
SA1
201
VREF_CA
126
VDD18
124
NC#1
77
NC#2
122
NC#/TEST
125
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD13
111
VDD14
112
VDD15
117
VDD16
118
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VDD1
75
VSS
65
VSS
66
VSS
71
VSS
72
VDD2
76
VDD11
105
VDD12
106
VDD17
123
VSS
127
VSS
128
VSS
134
VSS
133
VSS
138
VSS
139
VSS
144
VSS
145
VSS
151
VSS
150
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
173
VSS
172
VSS
179
VSS
178
VSS
185
VSS
184
VSS
189
VSS
190
VSS
195
VSS
196
RESET#
30
EVENT#
198
VSS
205
VSS
206
VTT1
203
VTT2
204
DM2
DDR3-204P-24-GP
62.10017.K01
DM2
DDR3-204P-24-GP
62.10017.K01
12
C1904
Do Not Stuff
C1904
Do Not Stuff
12
C1916
SC10U6D3V5MX-3GP
C1916
SC10U6D3V5MX-3GP
12
R1902
10KR2J-3-GP
DY
R1902
10KR2J-3-GP
DY
12
C1920
SC10U6D3V5MX-3GP
C1920
SC10U6D3V5MX-3GP
12
C1912
SC2D2U10V3KX-1GP
C1912
SC2D2U10V3KX-1GP
12
R1901
10KR2J-3-GP
R1901
10KR2J-3-GP
12
R1905
0R2J-2-GP
ARD
R1905
0R2J-2-GP
ARD
12
C1910
SCD1U16V2KX-3GP
C1910
SCD1U16V2KX-3GP
12
C1903
Do Not Stuff
C1903
Do Not Stuff
12
C1908
SC1U10V2KX-1GP
C1908
SC1U10V2KX-1GP
12
C1914
SC2D2U10V3KX-1GP
C1914
SC2D2U10V3KX-1GP
12
C1909
SC1U10V2KX-1GP
C1909
SC1U10V2KX-1GP
12
C1905
SC10U6D3V5MX-3GP
C1905
SC10U6D3V5MX-3GP
12
C1907
SCD1U16V2KX-3GP
C1907
SCD1U16V2KX-3GP
12
R1903
10KR2J-3-GP
DY
R1903
10KR2J-3-GP
DY
12
C1976
SCD1U10V2KX-4GP
C1976
SCD1U10V2KX-4GP
12
C1901
Do Not Stuff
C1901
Do Not Stuff
12
C1977
SCD1U10V2KX-4GP
C1977
SCD1U10V2KX-4GP
12
C1911
SC10U6D3V5MX-3GP
C1911
SC10U6D3V5MX-3GP
12
C1902
Do Not Stuff
C1902
Do Not Stuff
12
C1917
SC1U10V2KX-1GP
C1917
SC1U10V2KX-1GP
12
C1978
SCD1U10V2KX-4GP
C1978
SCD1U10V2KX-4GP
12
C1919
SC10U6D3V5MX-3GP
C1919
SC10U6D3V5MX-3GP
12
C1979
SCD1U10V2KX-4GP
C1979
SCD1U10V2KX-4GP
12
C1918
SC1U10V2KX-1GP
C1918
SC1U10V2KX-1GP
12
C1906
SCD1U16V2KX-3GP
C1906
SCD1U16V2KX-3GP
12
C1921
SC2D2U10V3KX-1GP
DY
C1921
SC2D2U10V3KX-1GP
DY
12
TC1903
ST330U2D5VBM-1-GP
TC1903
ST330U2D5VBM-1-GP
12
C1913
SC10U6D3V5MX-3GP
C1913
SC10U6D3V5MX-3GP
12
R1904
10KR2J-3-GP
R1904
10KR2J-3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PANEL_BKEN_PCHR
TP_LVDS_VBG
LIBG
CRT_IREF
LCDVDD_EN_PCH
LCTLB_DATA
MCH_BLUE
MCH_RED
MCH_GREEN
LCTLA_CLK
LCDVDD_EN_PCH
HDMI_DATA0-_C
HDMI_DATA0+_C
HDMI_CLK-_C
HDMI_DATA1-_C
HDMI_CLK+_C
HDMI_DATA1+_C
HDMI_DATA2-_C
HDMI_DATA2+_C
+3.3V_RUN
L_DDC_CLK54
L_DDC_DATA54
LBKLT_CTL_PCH54
LCDVDD_EN_PCH54
PANEL_BKEN_PCH37
MCH_BLUE74
MCH_GREEN74
MCH_RED74
HDMI_HP_DET 21,57,75
MCH_LVDSB_DAT0#74
MCH_LVDSB_DAT2#74
MCH_LVDSB_DAT1#74
MCH_LVDSB_DAT174
MCH_LVDSB_DAT074
MCH_LVDSB_DAT274
MCH_LVDSA_DAT0#74
MCH_LVDSA_DAT2#74
MCH_LVDSA_DAT1#74
MCH_LVDSA_DAT174
MCH_LVDSA_DAT074
MCH_LVDSA_DAT274
MCH_LVDSB_CLK#74
MCH_LVDSB_CLK74
MCH_LVDSA_CLK74
MCH_LVDSA_CLK#74
GMCH_VSYNC74
GMCH_HSYNC74
GMCH_DDCDATA55
GMCH_DDCCLK55
SDVO_CLK 57,75
SDVO_DAT 57,75
HDMI_DATA0+_C 75
HDMI_DATA0-_C 75
HDMI_CLK+_C 75
HDMI_DATA1+_C 75
HDMI_CLK-_C 75
HDMI_DATA1-_C 75
HDMI_DATA2+_C 75
HDMI_DATA2-_C 75
Title
S
ize Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (LVDS/CRT/DDI)
20 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (LVDS/CRT/DDI)
20 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (LVDS/CRT/DDI)
20 90Tuesday, September 08, 2009
UMA
Place near PCH
Place near PCH
37.5 ohm trace to 150R resistor
50 ohm trace to filter
1 2
R2003
100KR2J-1-GP
DY
R2003
100KR2J-1-GP
DY
1 2
R2011
0R2J-2-GP
R2011
0R2J-2-GP
12
R2002
2K37R2F-GP
R2002
2K37R2F-GP
L_BKLTCTL
Y48
L_BKLTEN
T48
L_CTRL_CLK
AB46
L_CTRL_DATA
V48
L_DDC_CLK
AB48
L_DDC_DATA
Y45
L_VDD_EN
T47
LVDSA_CLK#
AV53
LVDSA_CLK
AV51
LVDSA_DATA#0
BB47
LVDSA_DATA#1
BA52
LVDSA_DATA#2
AY48
LVDSA_DATA#3
AV47
LVDSA_DATA0
BB48
LVDSA_DATA1
BA50
LVDSA_DATA2
AY49
LVDSA_DATA3
AV48
LVDSB_CLK#
AP48
LVDSB_CLK
AP47
LVDSB_DATA#0
AY53
LVDSB_DATA#1
AT49
LVDSB_DATA#2
AU52
LVDSB_DATA#3
AT53
LVDSB_DATA0
AY51
DDPB_0N
BD42
DDPB_1N
BJ42
LVD_VREFH
AT43
LVD_VREFL
AT42
DDPD_2N
BF37
DDPD_3N
BE36
DDPB_2N
BB40
DDPB_3N
AW38
DDPC_0N
BE40
DDPC_1N
BF41
DDPC_2N
BD38
DDPC_3N
BB36
DDPD_0N
BJ40
DDPD_1N
BJ38
DDPB_0P
BC42
DDPB_1P
BG42
DDPD_2P
BH37
DDPD_3P
BD36
DDPB_2P
BA40
DDPB_3P
BA38
LVDSB_DATA1
AT48
LVDSB_DATA2
AU50
LVDSB_DATA3
AT51
LVD_IBG
AP39
LVD_VBG
AP41
DDPC_1P
BH41
DDPC_0P
BD40
DDPC_2P
BC38
DDPC_3P
BA36
DDPD_0P
BG40
DDPD_1P
BG38
CRT_BLUE
AA52
CRT_DDC_CLK
V51
CRT_DDC_DATA
V53
CRT_GREEN
AB53
CRT_HSYNC
Y53
CRT_IRTN
AB51
CRT_RED
AD53
CRT_VSYNC
Y51
DAC_IREF
AD48
SDVO_CTRLCLK
T51
SDVO_CTRLDATA
T53
DDPC_CTRLCLK
Y49
DDPC_CTRLDATA
AB49
DDPD_CTRLCLK
U50
DDPD_CTRLDATA
U52
DDPB_AUXN
BG44
DDPC_AUXN
BE44
DDPD_AUXN
BC46
DDPB_AUXP
BJ44
DDPC_AUXP
BD44
DDPD_AUXP
BD46
DDPB_HPD
AU38
DDPC_HPD
AV40
DDPD_HPD
AT38
SDVO_TVCLKINP
BG46
SDVO_TVCLKINN
BJ46
SDVO_STALLP
BG48
SDVO_STALLN
BJ48
SDVO_INTP
BH45
SDVO_INTN
BF45
LVDS
Digital Display Interface
CRT
4 OF 10
U2001D
IBEXPEAK-M-GP-NF
LVDS
Digital Display Interface
CRT
4 OF 10
U2001D
IBEXPEAK-M-GP-NF
1 2
R2007
150R2F-1-GP
R2007
150R2F-1-GP
1 2
R2005
150R2F-1-GP
R2005
150R2F-1-GP
1
TP2001Do Not Stuff TP2001Do Not Stuff
1 2
R2004
1KR2D-1-GP
R2004
1KR2D-1-GP
1 2
R2006
150R2F-1-GP
R2006
150R2F-1-GP
1
2 3
4
RN2001
SRN10KJ-5-GP
RN2001
SRN10KJ-5-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_FB_R
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_SERR#
PCI_PERR#
PCI_TRDY#
PCI_STOP#
PCI_GNT0#
PCI_PLOCK#
PLTRST#_PCH
PCI_REQ0#
PCI_REQ1#
PCI_GNT3#
PCI_REQ3#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQA#
PCH_PME#
USB_OC#2_3
USB_OC#0_1
USB_OC#8_9
USB_OC#10_11
USB_OC#12_13
USB_OC#6_7
USB_RBIAS_PN
USB_OC#6_7
PCI_GNT3#
TP_NV_ALE
TP_NV_CLE
TP_NV_RCOMP
USB_OC#4_5
PCIRST#
PLTRST#_PCH
PCLK_FW H_R
PCLK_KBC_R
PCI_PLOCK#
TP_USB_PN9
TP_USB_PP9
PCLK_TPM_R
PCH_GPIO3
HDMI_HP_DET_R
PCH_GPIO3
PCH_OC7#
DGPU_PW M_SELECT#
DGPU_SEL_BUF_#
PLTRST#_PCH
DGPU_SELECT#
DGPU_SEL_BUF_#
TP_USB_PN5
TP_USB_PP5
TP_USB_PN7
TP_USB_PP7
TP_USB_PN6
TP_USB_PP6
PCI_TRDY#
INT_PIRQD#
INT_PIRQA#
PCI_STOP#
INT_PIRQC#
DGPU_SEL_BUF_#
PCI_FRAME#
PCI_PERR#
PCI_REQ3#
PCI_REQ0#
PCI_REQ1#
PCI_DEVSEL#
INT_PIRQB#
PCI_SERR#
PCI_IRDY#
USB_OC#4_5
PCH_OC7#
USB_OC#2_3
USB_OC#8_9
USB_OC#12_13 USB_OC#0_1
USB_OC#10_11
INT_PIRQE#
PCH_GPIO5
INT_PIRQE#
PCH_GPIO5
HDMI_HP_DET_R
DGPU_PW M_SELECT#_R
DGPU_PW M_SELECT#
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
CLK_PCI_FB23
USB_OC#2_3 63
USB_OC#0_1 76
PLT_RST#9,37,64,70,76,77,80
PCLK_FW H70
PCLK_KBC37
USB_PP0 76
USB_PN0 76
USB_PP4 63
USB_PN4 63
USB_PP11 73
USB_PN11 73
USB_PN2 63
USB_PP2 63
USB_PN10 78
USB_PP10 78
USB_PN3 63
USB_PP3 63
USB_PN8 77
USB_PP8 77
USB_OC#4_5 63
PCLK_TPM76
USB_PN1 76
USB_PP1 76
DGPU_PW M_SELECT#54
DGPU_SELECT#54,74
USB_PN12 77
USB_PP12 77
USB_PN13 64
USB_PP13 64
HDD_FALL_INT140
HDMI_HP_DET20,57,75
Title
S
ize Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (PCI/USB/NVRAM)
21 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (PCI/USB/NVRAM)
21 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (PCI/USB/NVRAM)
21 90Tuesday, September 08, 2009
UMA
01
11
BOOT BIOS Strap
PCI_GNT#1 BOOT BIOS LocationPCI_GNT#0
0 1 Reserved
SPI(Default)
PCI
0 0 LPC
A16 swap override Strap/Top-Block
Swap Override jumper
PCI_GNT#3 Low = A16 swap
override/Top-Block
Swap Override enabled
High = Default
Calpella Platform Design Guide
Revision 1.6
These OC7# pins are not used for USB overcurrent protection and should be configured as GPIOs.
The unused USB ports can be left as no connect.
Table 111. Overcurrent Pin Example Configuration
Page 233
13
USB2 > M/B
New Card
12
USB1 > LAN BOARD
10
0
11
USB for ESATA
Pair
4
USB
5
2
3
1
Device
BlUETOOTH
6
7
8
9
USB3 > M/B
Biometric
CAMERA
WLAN
USB4 > LAN BOARD
Add USB Port for right side board
2009/07/13
RESERVED
(Not available for HM55)
(Not available for HM55)
RESERVED
RESERVED
RESERVED
1
TP2115Do Not Stuff TP2115Do Not Stuff
TP2131TP2131
12
R2113
10KR2J-3-GP
DIS
R2113
10KR2J-3-GP
DIS
1 2
R2109
4K7R2J-2-GP
DY
R2109
4K7R2J-2-GP
DY
B
1
A
2
GND
3
Y
4
VCC
5
U2103
74LVC1G08GW-1-GP
DY
U2103
74LVC1G08GW-1-GP
DY
12
R2107
10KR2J-3-GP
UMA
R2107
10KR2J-3-GP
UMA
TP2132TP2132
1
TP2117Do Not StuffTP2117Do Not Stuff
B
1
A
2
GND
3
Y
4
VCC
5
U2101
74LVC1G08GW-1-GP
U2101
74LVC1G08GW-1-GP
1 2
R2104 0R2J-2-GP
DY
R2104 0R2J-2-GP
DY
1
2
3
4
5 6
7
8
9
10
RP2101
SRN10KJ-L3-GP
RP2101
SRN10KJ-L3-GP
1
TP2119Do Not StuffTP2119Do Not Stuff
1
TP2118Do Not StuffTP2118Do Not Stuff
1
2
3
4 5
6
7
8
RN2103
SRN10KJ-7GP
RN2103
SRN10KJ-7GP
1 2
R2110 22R2J-2-GP
DY
R2110 22R2J-2-GP
DY
1 2
R2116
0R2J-2-GP
DY
R2116
0R2J-2-GP
DY
12
R2117
10KR2J-3-GP
DIS
R2117
10KR2J-3-GP
DIS
12
C2104
SCD1U16V2KX-3GP
DY
C2104
SCD1U16V2KX-3GP
DY
1
2
3
4
5 6
7
8
9
10
RN2102
SRN8K2J-2-GP-U
RN2102
SRN8K2J-2-GP-U
TP2128TP2128
1 2
R2108 22R2J-2-GPR2108 22R2J-2-GP
1 2
R2111 22R2J-2-GPR2111 22R2J-2-GP
1 2
R2121
0R2J-2-GP
R2121
0R2J-2-GP
1 2
R2115 0R2J-2-GP
DY
R2115 0R2J-2-GP
DY
TP2125TP2125
1 2
R2106
22D6R2F-L1-GP
R2106
22D6R2F-L1-GP
1 2
R2112 22R2J-2-GPR2112 22R2J-2-GP
1
TP2116
Do Not Stuff
TP2116
Do Not Stuff
1
TP2108
Do Not Stuff
TP2108
Do Not Stuff
12
C2103
SCD1U16V2KX-3GP
DY
C2103
SCD1U16V2KX-3GP
DY
1
2
3
4
5 6
7
8
9
10
RN2101
SRN8K2J-2-GP-U
RN2101
SRN8K2J-2-GP-U
12
C2113
SC220P50V2KX-3GP
DY
C2113
SC220P50V2KX-3GP
DY
12
R2114
10KR2J-3-GP
UMA
R2114
10KR2J-3-GP
UMA
AD0
H40
AD1
N34
AD2
C44
AD20
C42
AD21
K46
AD22
M51
AD23
J52
AD24
K51
AD25
L34
AD26
F42
AD27
J40
AD28
G46
AD29
F44
AD3
A38
AD30
M47
AD31
H36
AD4
C36
AD5
J34
AD6
A40
AD7
D45
AD8
E36
AD9
H48
C/BE0#
J50
C/BE1#
G42
C/BE2#
H47
C/BE3#
G34
PCIRST#
K6
PERR#
E50
PIRQA#
G38
PIRQB#
H51
PIRQC#
B37
PIRQD#
A44
PLOCK#
D49
PLTRST#
D5
PME#
M7
REQ0#
F51
REQ1#/GPIO50
A46
REQ2#/GPIO52
B45
REQ3#/GPIO54
M53
SERR#
E44
STOP#
D41
TRDY#
C48
NV_ALE
BD3
NV_CE#0
AY9
NV_CE#1
BD1
NV_CE#2
AP15
NV_CE#3
BD8
NV_CLE
AY6
NV_DQS0
AV9
NV_DQS1
BG8
NV_DQ0/NV_IO0
AP7
NV_DQ1/NV_IO1
AP6
NV_DQ10/NV_IO10
BD6
NV_DQ11/NV_IO11
BB7
NV_DQ12/NV_IO12
BC8
NV_DQ13/NV_IO13
BJ8
NV_DQ14/NV_IO14
BJ6
NV_DQ15/NV_IO15
BG6
NV_DQ2/NV_IO2
AT6
NV_DQ3/NV_IO3
AT9
NV_DQ4/NV_IO4
BB1
NV_DQ5/NV_IO5
AV6
NV_DQ6/NV_IO6
BB3
NV_DQ7/NV_IO7
BA4
NV_DQ8/NV_IO8
BE4
NV_DQ9/NV_IO9
BB6
NV_RB#
AV7
NV_RCOMP
AU2
NV_WR#0_RE#
AY8
NV_WR#1_RE#
AY5
NV_WE#_CK0
AV11
NV_WE#_CK1
BF5
USBP0N
H18
USBP0P
J18
USBP10N
A22
USBP10P
C22
USBP11N
G24
USBP11P
H24
USBP12N
L24
USBP12P
M24
USBP13N
A24
USBP13P
C24
USBP1N
A18
USBP1P
C18
USBP2N
N20
USBP2P
P20
USBP3N
J20
USBP3P
L20
USBP4N
F20
USBP4P
G20
USBP5N
A20
USBP5P
C20
USBP6N
M22
USBP7N
B21
USBP7P
D21
USBP8N
H22
USBP8P
J22
USBP9N
E22
USBP9P
F22
USBRBIAS#
B25
USBRBIAS
D25
USBP6P
N22
AD10
E40
AD11
C40
AD12
M48
AD13
M45
AD14
F53
AD15
M40
AD16
M43
AD17
J36
AD18
K48
AD19
F40
DEVSEL#
F46
FRAME#
C46
GNT0#
F48
GNT1#/GPIO51
K45
GNT2#/GPIO53
F36
GNT3#/GPIO55
H53
PIRQE#/GPIO2
B41
PIRQF#/GPIO3
K53
PIRQG#/GPIO4
A36
PIRQH#/GPIO5
A48
IRDY#
A42
PAR
H44
OC0#/GPIO59
N16
OC1#/GPIO40
J16
OC2#/GPIO41
F16
OC3#/GPIO42
L16
OC4#/GPIO43
E14
OC5#/GPIO9
G16
OC6#/GPIO10
F12
OC7#/GPIO14
T15
CLKOUT_PCI0
N52
CLKOUT_PCI1
P53
CLKOUT_PCI2
P46
CLKOUT_PCI3
P51
CLKOUT_PCI4
P48
PCI
NVRAM
USB
5 OF 10
U2001E
IBEXPEAK-M-GP-NF
PCI
NVRAM
USB
5 OF 10
U2001E
IBEXPEAK-M-GP-NF
12
C2102
SCD1U16V2KX-3GP
C2102
SCD1U16V2KX-3GP
TP2127TP2127
TP2130TP2130
12
C2101
SC220P50V2KX-3GP
DY
C2101
SC220P50V2KX-3GP
DY
TP2129TP2129
TP2126TP2126
1 2
R2122
0R2J-2-GP
DY
R2122
0R2J-2-GP
DY
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM_SLP_S3#_R
PM_PWRBTN#_R
PM_RSMRST#_R
SIO_SLP_M#_R
PM_RI#
DMI_IRCOMP_R
PM_SLP_DSW#
PCH_SLP_S5#
PM_CLKRUN#
PM_BATLOW#_R
LAN_RST#1
PCIE_WAKE#
PM_RI#
PM_DRAM_PWRGD
PM_BATLOW#_R
H_PM_SYNC
PM_PWRGD
SUS_PW R_ACK
PM_CLKRUN#
PM_SLP_S4#_R
PM_RSMRST#_R
SUS_PW R_ACK
AC_PRESENT
FDI_TXP1
FDI_TXP0
FDI_TXP3
FDI_TXP2
FDI_TXP5
FDI_TXP4
FDI_TXP7
FDI_TXP6
FDI_LSYNC1
FDI_TXN1
FDI_TXN0
FDI_TXN3
FDI_TXN2
FDI_FSYNC0
FDI_INT
FDI_LSYNC0
FDI_FSYNC1
FDI_TXN5
FDI_TXN4
FDI_TXN7
FDI_TXN6
AC_PRESENT_EC
AC_PRESENT_EC
XDP_DBRESET#
PCH_SUSCLK
TP_SUS_STAT#
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN
+1.05V_PCH
DMI_CTX_PRXP08
DMI_CTX_PRXP18
DMI_CTX_PRXP28
DMI_CTX_PRXP38
PM_PWRBTN#37
RSMRST#_KBC37 PM_SLP_S4# 37,50,77
PM_SLP_S3# 37,42,50,51,52,77,86
DMI_PTX_CRXN08
DMI_PTX_CRXN18
DMI_PTX_CRXN28
DMI_PTX_CRXN38
DMI_PTX_CRXP08
DMI_PTX_CRXP18
DMI_PTX_CRXP28
DMI_PTX_CRXP38
XDP_DBRESET#9
PM_PWROK37
PM_DRAM_PWRGD9
H_PM_SYNC 9
DMI_CTX_PRXN08
DMI_CTX_PRXN18
DMI_CTX_PRXN28
DMI_CTX_PRXN38
PM_CLKRUN# 37
PM_PWRBTN#_R9
PCIE_WAKE# 76,77
FDI_FSYNC1 8
FDI_TXN6 8
FDI_TXP3 8
FDI_TXP4 8
FDI_TXP5 8
FDI_TXN3 8
FDI_LSYNC1 8
FDI_TXN7 8
FDI_TXP6 8
FDI_LSYNC0 8
FDI_TXN4 8
FDI_INT 8
FDI_TXN0 8
FDI_TXP0 8
FDI_TXP7 8
FDI_FSYNC0 8
FDI_TXN5 8
FDI_TXP1 8
FDI_TXP2 8
FDI_TXN1 8
FDI_TXN2 8
AC_PRESENT_EC37
SUS_PW R_DN_ACK37
PCH_SUSCLK_KBC 37
PCH_SUSCLK_2102 39
Title
S
ize Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (DM I/FDI/PM)
22 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (DM I/FDI/PM)
22 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (DM I/FDI/PM)
22 90Tuesday, September 08, 2009
UMA
Option to " Disable " clkrun.
Pulling it down will keep the clks running.
1 2
R2203 10KR2J-3-GPR2203 10KR2J-3-GP
1 2
R2204
49D9R2F-GP
R2204
49D9R2F-GP
1 2
R2210 0R2J-2-GPR2210 0R2J-2-GP
12
R2205
10KR2J-3-GP
R2205
10KR2J-3-GP
1 2
R2219 0R2J-2-GPR2219 0R2J-2-GP
1 2
R2209 10KR2J-3-GPR2209 10KR2J-3-GP
1
TP2203Do Not StuffTP2203Do Not Stuff
1 2
R2220 0R2J-2-GPR2220 0R2J-2-GP
1 2
R2212 0R2J-2-GPR2212 0R2J-2-GP
1 2
R2202 1KR2J-1-GPR2202 1KR2J-1-GP
1 2
R2207 0R2J-2-GPR2207 0R2J-2-GP
12
R2215
10KR2J-3-GP
DY
R2215
10KR2J-3-GP
DY
1 2
R2218 0R2J-2-GPR2218 0R2J-2-GP
1 2
R2201 10KR2J-3-GPR2201 10KR2J-3-GP
DMI0RXN
BC24
DMI1RXN
BJ22
DMI2RXN
AW20
DMI3RXN
BJ20
DMI0RXP
BD24
DMI1RXP
BG22
DMI2RXP
BA20
DMI3RXP
BG20
DMI0TXN
BE22
DMI1TXN
BF21
DMI2TXN
BD20
DMI3TXN
BE18
DMI0TXP
BD22
DMI1TXP
BH21
DMI2TXP
BC20
DMI3TXP
BD18
DMI_ZCOMP
BH25
DMI_IRCOMP
BF25
FDI_RXN0
BA18
FDI_RXN1
BH17
FDI_RXN2
BD16
FDI_RXN3
BJ16
FDI_RXN4
BA16
FDI_RXN5
BE14
FDI_RXN6
BA14
FDI_RXN7
BC12
FDI_RXP0
BB18
FDI_RXP1
BF17
FDI_RXP2
BC16
FDI_RXP3
BG16
FDI_RXP4
AW16
FDI_RXP5
BD14
FDI_RXP6
BB14
FDI_RXP7
BD12
FDI_FSYNC0
BF13
FDI_FSYNC1
BH13
FDI_LSYNC0
BJ12
FDI_LSYNC1
BG14
FDI_INT
BJ14
PMSYNCH
BJ10
TP23
N2
SLP_M#
K8
SLP_S3#
P12
SLP_S4#
H7
SLP_S5#/GPIO63
E4
SYS_RESET#
T6
SYS_PWROK
M6
PWRBTN#
P5
RI#
F14
WAKE#
J12
SUS_STAT#/GPIO61
P8
SUSCLK/GPIO62
F3
ACPRESENT/GPIO31
P7
LAN_RST#
A10
MEPWROK
K5
BATLOW#/GPIO72
A6
PWROK
B17
CLKRUN#/GPIO32
Y1
SUS_PWR_DN_ACK/GPIO30
M1
RSMRST#
C16
DRAMPWROK
D9
SLP_LAN#/GPIO29
F6
DMI
FDI
System Power Management
3 OF 10
U2001C
IBEXPEAK-M-GP-NF
DMI
FDI
System Power Management
3 OF 10
U2001C
IBEXPEAK-M-GP-NF
1
23
4
RN2201
SRN10KJ-5-GP
RN2201
SRN10KJ-5-GP
1
TP2204Do Not StuffTP2204Do Not Stuff
1 2
R2216 0R2J-2-GPR2216 0R2J-2-GP
1 2
R2217 10KR2J-3-GPR2217 10KR2J-3-GP
1 2
R2208
10KR2J-3-GP
R2208
10KR2J-3-GP
1 2
R2214
10KR2J-3-GP
R2214
10KR2J-3-GP
1
TP2205 Do Not StuffTP2205 Do Not Stuff
1 2
R2213 0R2J-2-GPR2213 0R2J-2-GP
1
TP2202Do Not StuffTP2202Do Not Stuff
1 2
R2211 0R2J-2-GPR2211 0R2J-2-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_SMB_DATA
PCH_SMB_CLK
SML0ALERT#
SMBALERT#
SML1ALERT#
SML1CLK
SML1DAT
CLK_EXP_N
CLK_EXP_P
PEG_CLKREQ#
CLK_PCH_14M
CLK_PCI_FB
XCLK_RCOMP
XTAL25_IN
XTAL25_OUT
PCH_SMB_DATA
PCH_SMB_CLK
SML0_CLK
SML0_DATA
TP_CLK_OUTFLEX1
CL_CLK
CL_DATA
CL_RST#
CLK_PCIE_SATA
CLK_PCIE_SATA#
DREFCLK
DREFCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLKIN_DMI#
CLKIN_DMI
PCIE_CLK_RQ5#
PCH_SMB_CLK
PCH_SMB_DATA
SML0_DATA
SML0_CLK
XTAL25_OUT
CLK_PCIE_VGA1#
CLK_PCIE_VGA1
CLK_PCIE_LAN1#
CLK_PCIE_LAN1
CLKREQ#_LAN
CLK_PCIE_MINI1_1#
CLK_PCIE_MINI1_1
MINI1_CLKREQ#
MINI1_CLKREQ#
PEG_B_CLKRQ#
PEG_B_CLKRQ#
CLK_DP_N
CLK_DP_P
NEWCARD_CLKREQ#
NEWCARD_CLKREQ#
PCIE_ITXN5_NRXN5_C
PCIE_ITXP5_NRXP5_C
PCIE_ITXN3_LRXN3_C
PCIE_ITXP3_LRXP3_C
PCIE_ITXN2_MRXN2_C
PCIE_ITXP2_MRXP2_C
PCIE_ITXN1_CRXN1_C
PCIE_ITXP1_CRXP1_C
CLK_PCIE_R5U230_1#
CLK_PCIE_R5U230_1
CLK_PCIE_NEW1#
CLK_PCIE_NEW1
PCIE_CLK_RQ5#
CLKREQ#_LAN
TP_CLK_OUTFLEX0
SML1DAT
SML1CLK
PEG_CLKREQ#
EDID_SELECT_R#
EDID_SELECT#EDID_SELECT_R#
XTAL25_IN
PCIE_CLK_RQ4#
PCIE_CLK_RQ4#
TP_CLK_OUTFLEX3
EDID_SELECT_R#
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW
+1.05V_PCH
+3.3V_RUN
+3.3V_RUN+3.3V_RUN
CLK_EXP_N 9
CLK_EXP_P 9
CLK_PCH_14M 7
CLK_PCI_FB 21
SML0_CLK 9
SML0_DATA 9
CLK_PCIE_SATA 7
CLK_PCIE_SATA# 7
DREFCLK 7
DREFCLK# 7
CLK_CPU_BCLK 7
CLK_CPU_BCLK# 7
CLKIN_DMI 7
CLKIN_DMI# 7
PCH_SMBDATA 7,18,19,40,64
PCH_SMBCLK 7,18,19,40,64
CLK_PCIE_LAN#76
CLK_PCIE_LAN76
CLK_PCIE_MINI1#64
CLK_PCIE_MINI164
MINI1_CLKREQ#64
CLK_DP_N 9
CLK_DP_P 9
SML1CLK 37
SML1DAT 37
PCIE_ITXN3_LRXN376
PCIE_IRXN3_LRTXN376
PCIE_IRXP3_LRTXP376
PCIE_ITXP3_LRXP376
PCIE_ITXN2_MRXN264
PCIE_IRXN2_MTXN264
PCIE_IRXP2_MTXP264
PCIE_ITXP2_MRXP264
PCIE_ITXN5_NRXN577
PCIE_IRXN5_NTXN577
PCIE_IRXP5_NTXP577
PCIE_ITXP5_NRXP577
PCIE_ITXN1_CRXN177
PCIE_ITXP1_CRXP177
CLKREQ#_LAN76
CLK_PCIE_R5U230#77
CLK_PCIE_R5U23077
CLK_PCIE_NEW#77
CLK_PCIE_NEW77
NEWCARD_CLKREQ#77
PCIE_IRXP1_CTXP177
PCIE_IRXN1_CTXN177
PCH_SMB_CLK 77
PCH_SMB_DATA 77
PCIE_CLK_RQ5#77
CLK_PCIE_VGA# 80
CLK_PCIE_VGA 80
DGPU_PW RGD25,86,87
EDID_SELECT#54,55,57
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (PCI-E/SMBUS/CLOCK/CL)
23 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (PCI-E/SMBUS/CLOCK/CL)
23 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (PCI-E/SMBUS/CLOCK/CL)
23 90Tuesday, September 08, 2009
UMA
LAN
WLAN
New
Card
Card
Reader
PCIECLKRQ{0,3,4,5,6,7}# should have a 10K pull-up to +3.3V_ALW.
PCIECLKRQ{1,2} should have a 10K pull-up to +3.3_RUN
2009/07/28
Change 2N7002 ESD pretect from standard to 1KV type
P/N:84.2N702.E31
2009/07/28
Change 2N7002 ESD pretect from standard to 1KV type
P/N:84.2N702.E31
2009/08/10
Modify 25MHz crystal schematic
for Intel design guideline on PCH.
(Not available for HM55)
(Not available for HM55)
1
TP2302Do Not StuffTP2302Do Not Stuff
12
C2303 SCD1U16V2KX-3GPC2303 SCD1U16V2KX-3GP
12
R2309
10KR2J-3-GP
DIS
R2309
10KR2J-3-GP
DIS
G
S D
Q2305
2N7002A-7-GP
Q2305
2N7002A-7-GP
12
X2301
XTAL-25MHZ-67GP
UMA
X2301
XTAL-25MHZ-67GP
UMA
1
2
34
5
6
Q2301
DMN66D0LDW-7-GP
Q2301
DMN66D0LDW-7-GP
B
1
A
2
GND
3
Y
4
VCC
5
U2302
74LVC1G08GW-1-GP
DY
U2302
74LVC1G08GW-1-GP
DY
12
C2309 SCD1U16V2KX-3GPC2309 SCD1U16V2KX-3GP
1
23
4
RN2302
SRN2K2J-1-GP
RN2302
SRN2K2J-1-GP
12
R2301
10KR2J-3-GP
R2301
10KR2J-3-GP
12
C2311
SC18P50V2JN-1-GP
UMA
C2311
SC18P50V2JN-1-GP
UMA
1
TP2301Do Not StuffTP2301Do Not Stuff
1 2
R2311 0R2J-2-GP
DY
R2311 0R2J-2-GP
DY
12
C2304 SCD1U16V2KX-3GPC2304 SCD1U16V2KX-3GP
12
C2310 SCD1U16V2KX-3GPC2310 SCD1U16V2KX-3GP
1
23
4
RN2306
SRN2K2J-1-GP
RN2306
SRN2K2J-1-GP
1
2 3
4
RN2305
SRN0J-6-GP
RN2305
SRN0J-6-GP
1
2 3
4
RN2311
SRN0J-6-GP
RN2311
SRN0J-6-GP
1
TP2303Do Not StuffTP2303Do Not Stuff
1
23
4
RN2313
SRN2K2J-1-GP
RN2313
SRN2K2J-1-GP
12
R2305
1MR2J-1-GP
UMA
R2305
1MR2J-1-GP
UMA
12
R2312
10KR2J-3-GP
DY
R2312
10KR2J-3-GP
DY
1
2 3
4
RN2304
SRN0J-6-GP
RN2304
SRN0J-6-GP
1
2
3
45
6
7
8
RN2307
SRN10KJ-7GP
RN2307
SRN10KJ-7GP
1
TP2306
Do Not Stuff
TP2306
Do Not Stuff
12
C2307
SC18P50V2JN-1-GP
UMA
C2307
SC18P50V2JN-1-GP
UMA
12
C2305 SCD1U16V2KX-3GPC2305 SCD1U16V2KX-3GP
12
C2306 SCD1U16V2KX-3GPC2306 SCD1U16V2KX-3GP
1
TP2305
Do Not Stuff
TP2305
Do Not Stuff
1
2 3
4
RN2303
SRN2K2J-1-GP
RN2303
SRN2K2J-1-GP
1
2 3
4
RN2310
SRN0J-6-GP
RN2310
SRN0J-6-GP
PERN1
BG30
PERP1
BJ30
PERN2
AW30
PERP2
BA30
PERN3
AU30
PERP3
AT30
PERN4
BA32
PERP4
BB32
PERN5
BF33
PERP5
BH33
PERN6
BA34
PERP6
AW34
PERN7
AT34
PERP7
AU34
PERN8
BG34
PERP8
BJ34
PETN1
BF29
PETP1
BH29
PETN2
BC30
PETP2
BD30
PETN3
AU32
PETP3
AV32
PETN4
BD32
PETP4
BE32
PETN5
BG32
PETP5
BJ32
PETN6
BC34
PETP6
BD34
PETN7
AU36
PETP7
AV36
PETN8
BG36
PETP8
BJ36
SMBALERT#/GPIO11
B9
SMBCLK
H14
SMBDATA
C8
SML0CLK
C6
SML0DATA
G8
CLKOUT_PCIE0N
AK48
CLKOUT_PCIE0P
AK47
CLKOUT_PCIE1N
AM43
CLKOUT_PCIE1P
AM45
CLKOUT_PCIE2N
AM47
CLKOUT_PCIE2P
AM48
CLKOUT_PCIE3N
AH42
CLKOUT_PCIE3P
AH41
CLKOUT_PCIE4N
AM51
CLKOUT_PCIE4P
AM53
CLKOUT_PCIE5N
AJ50
CLKOUT_PCIE5P
AJ52
SML0ALERT#/GPIO60
J14
CL_CLK1
T13
CL_DATA1
T11
CL_RST1#
T9
CLKIN_BCLK_N
AP3
CLKIN_BCLK_P
AP1
CLKIN_DMI_N
AW24
CLKIN_DMI_P
BA24
CLKIN_DOT_96N
F18
CLKIN_DOT_96P
E18
CLKIN_SATA_N/CKSSCD_N
AH13
CLKIN_SATA_P/CKSSCD_P
AH12
XTAL25_IN
AH51
XTAL25_OUT
AH53
REFCLK14IN
P41
CLKIN_PCILOOPBACK
J42
CLKOUT_PEG_A_N
AD43
CLKOUT_PEG_A_P
AD45
PEG_A_CLKRQ#/GPIO47
H1
PCIECLKRQ0#/GPIO73
P9
PCIECLKRQ1#/GPIO18
U4
PCIECLKRQ2#/GPIO20
N4
PCIECLKRQ3#/GPIO25
A8
PCIECLKRQ4#/GPIO26
M9
PCIECLKRQ5#/GPIO44
H6
CLKOUTFLEX0/GPIO64
T45
CLKOUTFLEX1/GPIO65
P43
CLKOUTFLEX2/GPIO66
T42
CLKOUTFLEX3/GPIO67
N50
CLKOUT_DMI_N
AN4
CLKOUT_DMI_P
AN2
PEG_B_CLKRQ#/GPIO56
P13
CLKOUT_PEG_B_P
AK51
CLKOUT_PEG_B_N
AK53
SML1ALERT#/GPIO74
M14
SML1CLK/GPIO58
E10
SML1DATA/GPIO75
G12
XCLK_RCOMP
AF38
CLKOUT_DP_P/CLKOUT_BCLK1_P
AT3
CLKOUT_DP_N/CLKOUT_BCLK1_N
AT1
PCI-E*
SMBus
Controller
From CLK BUFFER
PEG
Clock Flex
Link
2 OF 10
U2001B
IBEXPEAK-M-GP-NF
PCI-E*
SMBus
Controller
From CLK BUFFER
PEG
Clock Flex
Link
2 OF 10
U2001B
IBEXPEAK-M-GP-NF
12
R2303
10KR2J-3-GP
R2303
10KR2J-3-GP
1
TP2307
Do Not Stuff
TP2307
Do Not Stuff
1 2
R2308
0R2J-2-GP
DIS
R2308
0R2J-2-GP
DIS
12
C2308 SCD1U16V2KX-3GPC2308 SCD1U16V2KX-3GP
1
2 3
4
RN709
SRN0J-6-GP
DIS
RN709
SRN0J-6-GP
DIS
12
C2318 SCD1U16V2KX-3GPC2318 SCD1U16V2KX-3GP
12
R2304
10KR2J-3-GP
R2304
10KR2J-3-GP
1
2 3
4
RN2308
SRN10KJ-5-GP
RN2308
SRN10KJ-5-GP
12
R2302
10KR2J-3-GP
R2302
10KR2J-3-GP
12
R2307
10KR2J-3-GP
UMA
R2307
10KR2J-3-GP
UMA
12
C2312
SC220P50V2KX-3GP
DY
C2312
SC220P50V2KX-3GP
DY
12
C2301
SCD1U16V2KX-3GP
DY
C2301
SCD1U16V2KX-3GP
DY
1 2
R2306 90D9R2F-1-GPR2306 90D9R2F-1-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_RTCX2
SM_INTRUDER#
PCH_RTCX2
PCH_RTCX1
SRTCRST#
PCH_INTVRMEN
PCH_RTCX1
PCH_RTCRST#
SATAICOMP
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#
SB_SPKR
INT_SERIRQ
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
ACZ_BIT_CLK
ACZ_RST#_R
ACZ_SYNC_R
ACZ_SDATAOUT_R
SPI_MOSI_R
SPI_CLK_R
SPI_CS#0_R
GPIO_DSM
PCH_GPIO19
ME_UNLOCK_R#
ME_UNLOCK_R#
LPC_LAD[0..3]
GPIO_DSM
PCH_GPIO19
+RTC_CELL
+RTC_CELL
+RTC_CELL
+3.3V_RUN
+3.3V_RUN
+1.05V_PCH
INT_SERIRQ 37,76
LPC_LFRAME# 37,70,76
LPC_LAD[0..3] 37,70,76
PCH_AZ_CODEC_RST#30
PCH_SDOUT_CODEC30
PCH_AZ_CODEC_SYNC30
PCH_AZ_CODEC_BITCLK30
PCH_SDIN_CODEC30
SATA_IRXN1_OTXN1_C 59
SATA_IRXP1_OTXP1_C 59
SATA_ITXN1_ORXN1_C 59
SATA_ITXP1_ORXP1_C 59
SATA_IRXN0_HTXN0_C 59
SATA_IRXP0_HTXP0_C 59
SATA_ITXN0_HRXN0_C 59
SATA_ITXP0_HRXP0_C 59
SATA_LED# 66
PCH_SPI_CS0#62
PCH_SPI_DI62
PCH_SPI_DO62
PCH_SPI_CLK62
SB_SPKR30
ME_UNLOCK#37
ESATA_ITX_DRX_N4_C 63
ESATA_ITX_DRX_P4_C 63
ESATA_IRX_DTX_N4_C 63
ESATA_IRX_DTX_P4_C 63
GPIO_DSM 76
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (SPI/RTC/LPC/SATA/IHDA)
24 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (SPI/RTC/LPC/SATA/IHDA)
24 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (SPI/RTC/LPC/SATA/IHDA)
24 90Tuesday, September 08, 2009
UMA
HDD
No Reboot Strap R23
HDA_SPKR
Low = Default
High = No Reboot
NO REBOOT STRAP
ODD
INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable internal VRs
Flash Descriptor Security
Override/ ME Debug Mode
ME_UNLOCK#
This strap should only be asserted low via
external pull down in manufacturing/debug
environments ONLY.
CAP place near connector
CAP place near connector
(Not available for HM55)
(Not available for HM55)
CAP place near connector
ESATA
2009/08/06
R2416 made STUFF ,For Lan chip connecter senser Pin.
1 2
R2414 15R2J-GPR2414 15R2J-GP
1 2
R2410 1KR2J-1-GP
DY
R2410 1KR2J-1-GP
DY
1 2
R2401
10MR2J-L-GP
R2401
10MR2J-L-GP
1
TP2405Do Not Stuff TP2405Do Not Stuff
1 2
R2417 0R2J-2-GPR2417 0R2J-2-GP
1 2
R2404 330KR2F-L-GPR2404 330KR2F-L-GP
1 2
R2418
10KR2J-3-GP
R2418
10KR2J-3-GP
1 2
R2413 15R2J-GPR2413 15R2J-GP
1 2
33R2J-2-GPR2409 33R2J-2-GPR2409
1 2
R2419 1KR2J-1-GP
DY
R2419 1KR2J-1-GP
DY
1 2
33R2J-2-GPR2405 33R2J-2-GPR2405
12
C2402
SC18P50V2JN-1-GP
C2402
SC18P50V2JN-1-GP
12
C2404
SC1U6D3V3KX-2GP
C2404
SC1U6D3V3KX-2GP
1 2
R2411 10KR2J-3-GPR2411 10KR2J-3-GP
1
TP2408Do Not Stuff TP2408Do Not Stuff
1 2
R2415 15R2J-GPR2415 15R2J-GP
1 2
33R2J-2-GPR2408 33R2J-2-GPR2408
1 2
R2416
10KR2J-3-GP
R2416
10KR2J-3-GP
1
TP2406Do Not Stuff TP2406Do Not Stuff
1 2
R2406 1MR2J-1-GPR2406 1MR2J-1-GP
1 2
33R2J-2-GPR2407 33R2J-2-GPR2407
1 2
R2412 37D4R2F-GPR2412 37D4R2F-GP
1
TP2404Do Not Stuff TP2404Do Not Stuff
1
2 3
4
X2401
X-32D768KHZ-38GPU
X2401
X-32D768KHZ-38GPU
RTCX1
B13
RTCX2
D13
INTVRMEN
A14
INTRUDER#
A16
HDA_BCLK
A30
HDA_SYNC
D29
HDA_RST#
C30
HDA_SDIN0
G30
HDA_SDIN1
F30
HDA_SDIN2
E32
HDA_SDO
B29
SATALED#
T3
FWH0/LAD0
D33
FWH1/LAD1
B33
FWH2/LAD2
C32
FWH3/LAD3
A32
LDRQ1#/GPIO23
F34
FWH4/LFRAME#
C34
LDRQ0#
A34
RTCRST#
C14
HDA_SDIN3
F32
HDA_DOCK_EN#/GPIO33
H32
HDA_DOCK_RST#/GPIO13
J30
SRTCRST#
D17
SATA0RXN
AK7
SATA0RXP
AK6
SATA0TXN
AK11
SATA0TXP
AK9
SATA1RXN
AH6
SATA1RXP
AH5
SATA1TXN
AH9
SATA1TXP
AH8
SATA2RXN
AF11
SATA2RXP
AF9
SATA2TXN
AF7
SATA2TXP
AF6
SATA3RXN
AH3
SATA3RXP
AH1
SATA3TXN
AF3
SATA3TXP
AF1
SATA4RXN
AD9
SATA4RXP
AD8
SATA4TXN
AD6
SATA4TXP
AD5
SATA5RXN
AD3
SATA5RXP
AD1
SATA5TXN
AB3
SATA5TXP
AB1
SATAICOMPI
AF15
SPI_CLK
BA2
SPI_CS0#
AV3
SPI_CS1#
AY3
SPI_MOSI
AY1
SPI_MISO
AV1
SATA0GP/GPIO21
Y9
SATA1GP/GPIO19
V1
JTAG_TCK
M3
JTAG_TMS
K3
JTAG_TDI
K1
JTAG_TDO
J2
TRST#
J4
SERIRQ
AB9
SPKR
P1
SATAICOMPO
AF16
RTCIHDA
SATA
LPC
SPI JTAG
1 OF 10
U2001A
IBEXPEAK-M-GP-NF
RTCIHDA
SATA
LPC
SPI JTAG
1 OF 10
U2001A
IBEXPEAK-M-GP-NF
12
C2403
SC18P50V2JN-1-GP
C2403
SC18P50V2JN-1-GP
12
C2401
SC1U6D3V3KX-2GP
C2401
SC1U6D3V3KX-2GP
1 2
R2403
20KR2J-L2-GP
R2403
20KR2J-L2-GP
1
TP2407Do Not Stuff TP2407Do Not Stuff
1 2
R2402
20KR2J-L2-GP
R2402
20KR2J-L2-GP
21
G2401
Do Not Stuff
G2401
Do Not Stuff
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_THERMTRIP_R
PCH_GPIO35
PCH_GPIO28
DGPU_HOLD_RST#
STP_PCI#
ECSCI#
FFS_INT2_R INIT3_3V#
ECSWI#
ECSMI#
PCH_GPIO27
DGPU_PW R_EN#
KB_DET_R#
BIO_DET#
STP_PCI#
PCH_GPIO38
ECSWI#
PCH_NCTF_1
PCH_NCTF_2
PCH_NCTF_3
PCH_NCTF_4
DDR_RST_GATE
PCH_GPIO28
PCH_GPIO15
PCIECLKRQ6#
ECSMI#
PCH_GPIO15
PCH_GPIO38
DGPU_PW R_EN#
DGPU_PRSNT#
PCIECLKRQ6#
DGPU_PRSNT#
PCH_GPIO57
PCH_GPIO57
LCD_CBL_DET_R#
ECSCI#
DGPU_PW RGD_R
PCH_GPIO27
LCD_CBL_DET_R#
DDR_RST_GATE
KB_DET_R#
FFS_INT2_R
DEEPIDLE_WAKE_INT#
Q2515_1
BIO_DET#
TURBO_BOOST_ALERT#
DGPU_PW RGD_R
DGPU_HOLD_RST#
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN
+1.05V_VTT
+3.3V_RUN_GPU +3.3V_RUN
+3.3V_RUN_GPU
+3.3V_RUN
KA20GATE 37
H_PWRGOOD 9,42
KBRCIN# 37
BCLK_CPU_N 9
BCLK_CPU_P 9
H_PECI 9
ECSCI#37
ECSWI#37
H_THRMTRIP# 9,37,42
DGPU_HOLD_RST#80
DGPU_PW R_EN#37
DDR_RST_GATE9,11
LCD_CBL_DET#54
ECSMI#37
KB_DET#68
FFS_INT2_R40
DEEPIDLE_WAKE_INT_R#81
BIO_DET#78
TURBO_BOOST_ALERT#37
DGPU_PW RGD23,86,87
Title
S
ize Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (GPIO/CPU)
25 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (GPIO/CPU)
25 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (GPIO/CPU)
25 90Tuesday, September 08, 2009
UMA
Placed Within 2" from PCH
3
1
2
Q2515
MMBT3904-7-F-GP
Q2515
MMBT3904-7-F-GP
12
R2533
10KR2J-3-GP
R2533
10KR2J-3-GP
1 2
R2548
100R2J-2-GP
R2548
100R2J-2-GP
1
TP2510Do Not Stuff TP2510Do Not Stuff
12
R252210KR2J-3-GP R252210KR2J-3-GP
12
R252910KR2J-3-GP R252910KR2J-3-GP
1
TP2506Do Not StuffTP2506Do Not Stuff
12
R251510KR2J-3-GP R251510KR2J-3-GP
12
R252010KR2J-3-GP
DY
R252010KR2J-3-GP
DY
GPIO27
AB12
GPIO28
V13
GPIO24
H10
GPIO57
F8
LAN_PHY_PWR_CTRL/GPIO12
K9
VSS_NCTF_1
A4
VSS_NCTF_2
A49
VSS_NCTF_3
A5
VSS_NCTF_4
A50
VSS_NCTF_5
A52
VSS_NCTF_6
A53
VSS_NCTF_7
B2
VSS_NCTF_8
B4
VSS_NCTF_9
B52
VSS_NCTF_10
B53
VSS_NCTF_11
BE1
VSS_NCTF_12
BE53
VSS_NCTF_13
BF1
VSS_NCTF_14
BF53
VSS_NCTF_15
BH1
VSS_NCTF_16
BH2
VSS_NCTF_17
BH52
VSS_NCTF_18
BH53
VSS_NCTF_19
BJ1
VSS_NCTF_20
BJ2
VSS_NCTF_21
BJ4
VSS_NCTF_22
BJ49
VSS_NCTF_23
BJ5
VSS_NCTF_24
BJ50
VSS_NCTF_25
BJ52
VSS_NCTF_26
BJ53
VSS_NCTF_27
D1
VSS_NCTF_28
D2
VSS_NCTF_29
D53
VSS_NCTF_30
E1
VSS_NCTF_31
E53
TACH2/GPIO6
D37
TACH0/GPIO17
F38
TACH3/GPIO7
J32
TP9
M18
TP10
N18
TP11
AJ24
TP12
AK41
SATA3GP/GPIO37
AB13
SATA5GP/GPIO49
AA4
SCLOCK/GPIO22
Y7
SLOAD/GPIO38
V3
SDATAOUT0/GPIO39
P3
SDATAOUT1/GPIO48
AB6
A20GATE
U2
PROCPWRGD
BE10
RCIN#
T1
PECI
BG10
THRMTRIP#
BD10
GPIO8
F10
CLKOUT_PCIE6N
AH45
CLKOUT_PCIE6P
AH46
PCIECLKRQ6#/GPIO45
H3
CLKOUT_PCIE7N
AF48
CLKOUT_PCIE7P
AF47
PCIECLKRQ7#/GPIO46
F1
TP5
AY46
TP4
AY45
TP6
AV43
TP7
AV45
BMBUSY#/GPIO0
Y3
TP16
M30
TP17
N30
NC_1
AB45
NC_2
AB38
NC_3
AB42
NC_4
AB41
GPIO15
T7
TACH1/GPIO1
C38
TP13
AK42
TP3
BB22
TP1
BA22
TP2
AW22
TP14
M32
TP15
N32
SATA2GP/GPIO36
AB7
NC_5
T39
INIT3_3V#
P6
STP_PCI#/GPIO34
M11
SATACLKREQ#/GPIO35
V6
SATA4GP/GPIO16
AA2
TP24
C10
TP8
AF13
CLKOUT_BCLK0_N/CLKOUT_PCIE8N
AM3
CLKOUT_BCLK0_P/CLKOUT_PCIE8P
AM1
TP19
AA23
TP18
H12
GPIO
MISC
NCTF
RSVD
CPU
6 OF 10
U2001F
IBEXPEAK-M-GP-NF
GPIO
MISC
NCTF
RSVD
CPU
6 OF 10
U2001F
IBEXPEAK-M-GP-NF
12
R2527
10KR2J-3-GP
DIS
R2527
10KR2J-3-GP
DIS
12
C2501
SC47P50V2JN-3GP
DY
C2501
SC47P50V2JN-3GP
DY
1 2
R2511
56R2J-4-GP
R2511
56R2J-4-GP
1 2
R3749 100R2J-2-GPR3749 100R2J-2-GP
1 2
R2525
10KR2J-3-GP
R2525
10KR2J-3-GP
1
TP2511Do Not Stuff TP2511Do Not Stuff
1
TP2512Do Not Stuff TP2512Do Not Stuff
12
R2528
10KR2J-3-GP
DY
R2528
10KR2J-3-GP
DY
12
R2516
10KR2J-3-GP
DY
R2516
10KR2J-3-GP
DY
12
R25321KR2J-1-GP R25321KR2J-1-GP
12
R251010KR2J-3-GP R251010KR2J-3-GP
12
R251710KR2J-3-GP R251710KR2J-3-GP
12
R252310KR2J-3-GP R252310KR2J-3-GP
12
R250710KR2J-3-GP R250710KR2J-3-GP
1
TP2509Do Not Stuff TP2509Do Not Stuff
12
R2508
10KR2J-3-GP
R2508
10KR2J-3-GP
12
R251210KR2J-3-GP R251210KR2J-3-GP
12
R252410KR2J-3-GP R252410KR2J-3-GP
12
R252610KR2J-3-GP
DY
R252610KR2J-3-GP
DY
1 2
R2506 0R2J-2-GPR2506 0R2J-2-GP
1 2
R2552
10KR2J-3-GP
R2552
10KR2J-3-GP
1 2
R2509
56R2J-4-GP
R2509
56R2J-4-GP
12
R253010KR2J-3-GP R253010KR2J-3-GP
12
R252110KR2J-3-GP R252110KR2J-3-GP
12
R2555
2K2R2J-2-GP
R2555
2K2R2J-2-GP
12
R253110KR2J-3-GP R253110KR2J-3-GP
12
R251810KR2J-3-GP R251810KR2J-3-GP
12
R251910KR2J-3-GP R251910KR2J-3-GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VS_VCCAPLL_EXP
PCH_VCCME3_3
+VCCA_DAC_1_2
+1.8VS_VCCTX_LVDS
+VCC_VRM
+3.3V_RUN
+1.05VS_VCCAPLL_FDI
+1.8V_RUN
+3.3V_RUN
+1.05VS_VCC_DMI
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+1.8V_RUN
+3VS_VCCA_LVD +3.3V_RUN
+5V_RUN+3.3V_CRT_LDO
+3.3V_CRT_LDO
+1.05V_PCH
+1.05V_PCH
+1.05V_PCH
+1.05V_PCH
+1.05V_PCH
+1.05V_PCH
+1.05V_VTT
+VCC_VRM
+VCC_VRM
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (POWER1)
26 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (POWER1)
26 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (POWER1)
26 90Tuesday, September 08, 2009
UMA
1.432A
40mA
3.062A
357mA
85mA
156mA
58mA
357mA
35mA
69mA
<1mA
59mA
1.432A
3.062A
357mA
85mA
156mA
<1mA
59mA
2009/07/29
Change power rail to +1.05V_VTT for CFD.
2009/07/31
Changed +V_NVRAM_VCCQ_PCH power rail from 1.8V to 3.3V,
Removed Braidwood Changed power rail.
1 2
L2601
IND-1UH-2-GP
DY
L2601
IND-1UH-2-GP
DY
1 2
R2602
0R2J-2-GP
R2602
0R2J-2-GP
12
C2603
SC10U6D3V5MX-3GP
C2603
SC10U6D3V5MX-3GP
12
C2601
SC10U10V5ZY-1GP
C2601
SC10U10V5ZY-1GP
1 2
C2623
SCD1U10V2KX-5GP
DY
C2623
SCD1U10V2KX-5GP
DY
12
C2609
SC1U10V3KX-3GP
C2609
SC1U10V3KX-3GP
1 2
L2604 IND-D1UH-17-GPL2604 IND-D1UH-17-GP
12
C2615
SCD1U10V2KX-5GP
C2615
SCD1U10V2KX-5GP
VCCCORE
AB24
VCCCORE
AB26
VCCCORE
AB28
VCCCORE
AD26
VCCCORE
AD28
VCCCORE
AF26
VCCCORE
AF28
VCCCORE
AF30
VCCCORE
AF31
VCCCORE
AH26
VCCCORE
AH28
VCCCORE
AH30
VCCCORE
AH31
VCCCORE
AJ30
VCCCORE
AJ31
VCCPNAND
AK19
VCCPNAND
AK20
VCCIO
AN23
VCCIO
AN24
VCCIO
AN26
VCCIO
AN28
VCCIO
AN30
VCCIO
AN31
VCCIO
AT26
VCCIO
AT28
VCCIO
AU26
VCCIO
AU28
VCCIO
AV26
VCCIO
AV28
VCCIO
AW26
VCCIO
AW28
VCCIO
BA26
VCCIO
BA28
VCCIO
BB26
VCCIO
BB28
VCCIO
BC26
VCCIO
BC28
VCCIO
BD26
VCCIO
BD28
VCCIO
BE26
VCCIO
BE28
VCCIO
BG26
VCCIO
BG28
VCCIO
BH27
VCCIO
BJ26
VCCIO
BJ28
VCCADAC
AE50
VCCADAC
AE52
VCCTX_LVDS
AP43
VCCTX_LVDS
AP45
VCCALVDS
AH38
VCCVRM
AT24
VCCVRM[1]
AT22
VCCAPLLEXP
BJ24
VCCFDIPLL
BJ18
VCCPNAND
AK13
VCCPNAND
AK15
VCCPNAND
AM12
VCCPNAND
AM13
VCCIO
AK24
VCCTX_LVDS
AT45
VCCTX_LVDS
AT46
VSSA_DAC
AF53
VSSA_LVDS
AH39
VSSA_DAC
AF51
VCCIO
AM23
VCC3_3
AB34
VCC3_3
AB35
VCC3_3
AD35
VCC3_3
AN35
VCCME3_3
AM8
VCCME3_3
AM9
VCCME3_3
AP11
VCCME3_3
AP9
VCCPNAND
AK16
VCCPNAND
AM15
VCCPNAND
AM16
VCCDMI
AT16
VCCDMI
AU16
VCCIO
AN20
VCCIO
AN22
POWER
VCC CORE
DMI
PCI E*
CRTLVDS
FDI
NAND / SPI
HVCMOS
7 OF 10
U2001G
IBEXPEAK-M-GP-NF
POWER
VCC CORE
DMI
PCI E*
CRTLVDS
FDI
NAND / SPI
HVCMOS
7 OF 10
U2001G
IBEXPEAK-M-GP-NF
12
C2625
SCD01U16V2KX-3GP
C2625
SCD01U16V2KX-3GP
12
C2616
SC10U6D3V5MX-3GP
DY
C2616
SC10U6D3V5MX-3GP
DY
1 2
L2603
BLM18PG181SN1D-GP
L2603
BLM18PG181SN1D-GP
12
C2602
SC1U10V2KX-1GP
C2602
SC1U10V2KX-1GP
12
C2612
SC1U10V3KX-3GP
C2612
SC1U10V3KX-3GP
IN
1
GND
2
SHDN#
3
NC#4
4
OUT
5
U2601
MAX8511EXK33-T-GP
DY
U2601
MAX8511EXK33-T-GP
DY
12
R2609 0R3J-0-U-GPR2609 0R3J-0-U-GP
12
C2606
SC10U6D3V5MX-3GP
DY
C2606
SC10U6D3V5MX-3GP
DY
12
C2614
SCD1U10V2KX-4GP
C2614
SCD1U10V2KX-4GP
12
C2607
SCD1U10V2KX-5GP
C2607
SCD1U10V2KX-5GP
12
C2613
SC1U10V3KX-3GP
C2613
SC1U10V3KX-3GP
12
C2608
SC10U6D3V5MX-3GP
C2608
SC10U6D3V5MX-3GP
12
C2605
SCD1U10V2KX-5GP
C2605
SCD1U10V2KX-5GP
12
C2624
SCD01U16V2KX-3GP
C2624
SCD01U16V2KX-3GP
1 2
L2602
IND-1UH-2-GP
DY
L2602
IND-1UH-2-GP
DY
12
R2606
0R2J-2-GP
R2606
0R2J-2-GP
12
R2605
0R2J-2-GP
R2605
0R2J-2-GP
1 2
R2601
0R2J-2-GP
R2601
0R2J-2-GP
12
C2611
SC1U10V3KX-3GP
C2611
SC1U10V3KX-3GP
12
C2610
SC1U10V3KX-3GP
C2610
SC1U10V3KX-3GP
12
C2628
SC10U6D3V5MX-3GP
DY
C2628
SC10U6D3V5MX-3GP
DY
12
C2629
SC1U10V3KX-3GP
DY
C2629
SC1U10V3KX-3GP
DY
12
C2604
SCD01U16V2KX-3GP
C2604
SCD01U16V2KX-3GP
12
C2626
SC10U6D3V5MX-3GP
DY
C2626
SC10U6D3V5MX-3GP
DY
12
C2622
SCD1U10V2KX-5GP
C2622
SCD1U10V2KX-5GP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCRTCEXT
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
+1.05VALW_INT_VCCSUS
+VCCSST
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
+5VS_PCH_VCC5REF
+5VALW _PCH_VCC5REFSUS
DCPSUSBYP
PCH_VCC_LAN
+1.05VS_VCCA_CLK
+RTC_CELL
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+5V_RUN
+5V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+1.05VS_VCCAPLL
+3.3V_RUN
+3.3V_ALW
+1.05V_PCH
+1.05V_PCH
+1.05V_PCH
+1.05V_PCH
+1.05V_VTT
+1.05V_PCH
+1.05V_PCH
+1.05V_PCH
+1.05V_PCH
+1.05V_PCH
+VCC_VRM
+VCC_VRM
+3VS_+1.5VS_HDA_IO
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (POWER2)
27 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (POWER2)
27 90Tuesday, September 08, 2009
UMA
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vostro Calpella
SA
PCH (POWER2)
27 90Tuesday, September 08, 2009
UMA
52mA
1.849A
68mA
69mA
163mA
<1mA
2mA
32mA
6mA
<1mA
320mA
52mA
68mA
69mA
<1mA
<1mA
1.849A
2mA
163mA
6mA
196mA
12
C2714
SC1U10V2KX-1GP
C2714
SC1U10V2KX-1GP
12
C2718
SC1U10V2KX-1GP
C2718
SC1U10V2KX-1GP
21
D2701
CH751H-40PT
D2701
CH751H-40PT
12
C2729
SCD1U10V2KX-4GP
C2729
SCD1U10V2KX-4GP
12
C2733
SCD1U10V2KX-4GP
C2733
SCD1U10V2KX-4GP
12
C2735
SC10U6D3V5MX-3GP
DY
C2735
SC10U6D3V5MX-3GP
DY
12
C2709
SCD1U10V2KX-4GP
C2709
SCD1U10V2KX-4GP
DCPSUSBYP
Y20
VCCME
AD38
VCCME
AD39
VCCME
AD41
VCCME
AF41
VCCME
AF42
VCCSUSHDA
L30
VCCSUS3_3
U23
VCCIO
V23
VCCIO
AD19
VCCIO
AF20
VCCIO
AF19
VCCME
V39
VCCME
V41
VCCME
V42
VCCME
Y39
VCCME
Y41
VCCME
Y42
V5REF
K49
VCC3_3
J38
VCC3_3
L38
VCC3_3
M36
VCC3_3
N36
VCC3_3
P36
VCC3_3
U35
VCCRTC
A12
VCCSUS3_3
A26
VCCSUS3_3
A28
VCCSUS3_3
B27
VCCSUS3_3
C26
VCCSUS3_3
C28
VCCSUS3_3
E26
VCCSUS3_3
E28
VCCSUS3_3
F26
VCCSUS3_3
F28
VCCSUS3_3
G26
VCCSUS3_3
G28
VCCSUS3_3
H26
VCCSUS3_3
H28
VCCSUS3_3
J26
VCCSUS3_3
J28
VCCSUS3_3
L26
VCCSUS3_3
L28
VCCSUS3_3
M26
VCCSUS3_3
M28
VCCSUS3_3
N26
VCCSUS3_3
N28
VCCSUS3_3
P26
VCCSUS3_3
P28
VCCSUS3_3
U24
VCCSUS3_3
U26
VCCSUS3_3
U28
VCCSUS3_3
V28
VCCIO
AD20
VCCIO
AD22
VCCIO
AH19
VCCADPLLA
BB53
VCCADPLLB
BD51
VCCIO
AJ35
V5REF_SUS
F24
VCCIO
AH20
VCCIO
AB19
VCCIO
AB20
VCCIO
AB22
VCCIO
AF22
VCC3_3
AD13
VCCIO
AH22
VCCVRM
AT20
DCPSUS
Y22
VCCIO
AF34
VCCIO
AH34
VCCLAN
AF23
VCCLAN
AF24
VCCADPLLA
BB51
VCCADPLLB
BD53
VCCVRM
AU24
VCCACLK
AP51
VCCACLK
AP53
DCPRTC
V9
VCCIO
AF32
VCCME
AF43
VCCIO
AH35
VCCIO
AH23
DCPSST
V12
VCCSATAPLL
AK1
VCCSATAPLL
AK3
VCCME
AA34
VCCME
Y34
VCCME
Y35
VCCME
AA35
VCC3_3
V15
VCC3_3
V16
VCC3_3
Y16
VCCSUS3_3
P18
VCCSUS3_3
U19
VCCSUS3_3
U20
VCCSUS3_3
U22
VCCIO
V24
VCCIO
V26
VCCIO
Y24
VCCIO
Y26
V_CPU_IO
AT18
V_CPU_IO
AU18
POWER
SATA
USB
Clock and Miscellaneous
HDA
CPU
PCI/GPIO/LPC
RTC
PCI/GPIO/LPC
10 OF 10
U2001J
IBEXPEAK-M-GP-NF
POWER
SATA
USB
Clock and Miscellaneous
HDA
CPU
PCI/GPIO/LPC
RTC
PCI/GPIO/LPC
10 OF 10
U2001J
IBEXPEAK-M-GP-NF
12
C2721
SC1U10V2KX-1GP
DY
C2721
SC1U10V2KX-1GP
DY
12
C2730
SCD1U10V2KX-4GP
C2730
SCD1U10V2KX-4GP
12
C2732
SCD1U10V2KX-4GP
C2732
SCD1U10V2KX-4GP
12
C2720
SC1U10V2KX-1GP
C2720
SC1U10V2KX-1GP
12
C2708
SC1U10V2KX-1GP
C2708
SC1U10V2KX-1GP
12
C2723
SCD1U10V2KX-4GP
C2723
SCD1U10V2KX-4GP
12
C2703
SCD1U10V2KX-4GP
C2703
SCD1U10V2KX-4GP
12
C2704
SC10U6D3V5MX-3GP
C2704
SC10U6D3V5MX-3GP
12
C2728
SC4D7U6D3V5KX-3GP
C2728
SC4D7U6D3V5KX-3GP
12
C2725
SC1U10V2KX-1GP
C2725
SC1U10V2KX-1GP
12
C2719
SC1U10V2KX-1GP
C2719
SC1U10V2KX-1GP
12
C2724
SCD1U10V2KX-4GP
C2724
SCD1U10V2KX-4GP
12
C2710
SC1U10V2KX-1GP
DY
C2710
SC1U10V2KX-1GP
DY
12
C2726
SCD1U10V2KX-4GP
C2726
SCD1U10V2KX-4GP
12
C2734
SC10U6D3V5MX-3GP
DY
C2734
SC10U6D3V5MX-3GP
DY
12
C2702
SC1U10V2KX-1GP
DY
C2702
SC1U10V2KX-1GP
DY
12
C2712
SC1U10V2KX-1GP
C2712
SC1U10V2KX-1GP
21
D2702
CH751H-40PT
D2702
CH751H-40PT
12
C2701
SC10U6D3V5MX-3GP
DY
C2701
SC10U6D3V5MX-3GP
DY
12
C2715
SC1U10V2KX-1GP
C2715
SC1U10V2KX-1GP
12
C2705
SC10U6D3V5MX-3GP
C2705
SC10U6D3V5MX-3GP
12
C2727
SCD1U10V2KX-4GP
C2727
SCD1U10V2KX-4GP
1 2
L2704
IND-10UH-30-GP
DY
L2704
IND-10UH-30-GP
DY
12
C2707
SCD1U10V2KX-4GP
C2707
SCD1U10V2KX-4GP
12
C2706
SC1U10V2KX-1GP
C2706
SC1U10V2KX-1GP
12
C2713
SCD1U10V2KX-4GP
C2713
SCD1U10V2KX-4GP
12
C2711
SC1U10V2KX-1GP
C2711
SC1U10V2KX-1GP
1 2
R2707 0R2J-2-GPR2707 0R2J-2-GP
12
C2722
SC1U10V2KX-1GP
DY
C2722
SC1U10V2KX-1GP
DY
1 2
L2703
IND-10UH-81-GP
L2703
IND-10UH-81-GP
12
C2716
SCD1U10V2KX-4GP
C2716
SCD1U10V2KX-4GP
1 2
R2708
0R2J-2-GP
R2708
0R2J-2-GP
1 2
L2701
IND-10UH-30-GP
DY
L2701
IND-10UH-30-GP
DY
1 2
R2701
100R2J-2-GP
R2701
100R2J-2-GP
1 2
L2702
IND-10UH-81-GP
L2702
IND-10UH-81-GP
12
C2731
SC1U10V2KX-1GP
C2731
SC1U10V2KX-1GP
12
C2717
SCD1U10V2KX-4GP
C2717
SCD1U10V2KX-4GP
1 2
R2702
100R2J-2-GP
R2702
100R2J-2-GP
Loading...
+ 63 hidden pages
Privacy Policy Cookie Policy Terms of Use