Datasheet UPC1830GT Datasheet (NEC)

DATA SHEET

BIPOLAR ANALOG INTEGRATED CIRCUIT

µ

PC1830

FILTER-CONTAINING VIDEO CHROMA, SYNCHRONIZING SIGNAL

PROCESSING LSI COMPATIBLE WITH NTSC/PAL SYSTEM

DESCRIPTION

The µPC1830 is a filter-containing video chroma, synchronizing signal processing LSI compatible with the NTSC/
PAL system. A decoder which converts composite video or separate Y/C video signals into a brightness signal and
a color difference signal and outputs the result, and a matrix which comprises independent brightness signal/color
difference signal input pins are integrated on one chip.

Decoder output can be used to drive an A/D converter; it is appropriate for picture-in-picture screen signal
processing and multimedia boards.

FEATURES

• Contains a trap filter, band-pass filter, delay line, and color difference output low-pass filter.

Peripheral parts can be drastically reduced.

• Low power consumption

Appropriate for use with digital boards because of 5-V single power supply operation.

• DC control for user adjustment pins

Centralized control can be performed by a microcontroller.

• One chip compatible with both NTSC and PAL systems

Boards common to NTSC and PAL systems can be easily constructed.

• S pin input

Supports composite and separate Y/C video signal inputs.

• Demodulation ratio/demodulation angle change (matrix)

Demodulation ratio/demodulation angle can be selected in response to the NTSC or PAL system.

• Contains color difference tint control

Fine adjustment of the demodulation axis can be made for both the NTSC and PAL systems.

ORDERING INFORMATION

Part Number Package

µ

PC1830GT 42-pin plastic shrink SOP (375 mil)

The information in this document is subject to change without notice.

Document No. S11146EJ4V0DS00 (4th edition)
Date Published April 1998 N CP(K)
Printed in Japan

The mark shows major revised points.

©

1994

1. SYSTEM BLOCK DIAGRAM

VIDEO CAPTURE SYSTEM BLOCK DIAGRAM

NTSC

PAL

3.58

4.43

µ

PC1830

Composite video
or Y/C separate
signal input

RGB/Color
difference decoder
PC1830

µ

HD

VD BLK

H lock clock
generator

Clamp
pulse

Divider

CLP

910 f

RGB or YUV

H

8-bit A/D

µ

PC659A

8-bit A/D

µ

PC659A

8-bit A/D

µ

PC659A

8

8

8

Digital video (RGB or YUV) signal output

2

2. BLOCK DIAGRAM

V

CC

CVBS

3.58/4.43

NTSC/PAL

42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22

µ

PC1830

Separate/

V

CC

composite

Sub color
control

Contrast

+

control

V

CC

V

CC

+

switch
Separate

chroma

+

+

+

RGB

Clamp

pulse

Mode
switch

32 f

H/V count

H

VCO

Sync.
separate

V filter

H sync.
detect

H

V

AFC wave
detect

Clamp

chroma

Separate/composite switch

V
H

BLK

Separate/composite
switch, A
subcolor control

chroma

trap

Delay

HD, VD, blanking pulse,
killer output buffer

CC

amp.

BPF

Filter f
adjust

C

Contrast
control

Y

3.58 MHz/4.43 MHz

0

VCXO, PAL SW

APC, killer detect,
IDENT detect

Cf

R-Y, B-Y
modulate

Y, R-Y, B-Y
output buffer

R-Y B-Y

LPF

B-YR-YY

SC

Killer

f

SC

Y, R-Y, B-Y
input clamp

RGB output

buffer

RGB

NTSC/PAL
matrix

R-Y

B-Y

Tint control

B-Y

R-Y

Amp. color
control

R-Y B-Y

G-Y

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

50/60

+

Killer

BLK HD VD Y R-Y B-Y

detect

+

V

CC

V

CC

+

R-Y B-YY

Color
control

3

3. PIN CONFIGURATION (Top View)

42-pin plastic shrink SOP (375 mil)

µ

PC1830GT

µ

PC1830

H

VCO filter

32 f

H

VCO filter

32 f

H

VCO filter

32 f

Horizontal AFC filter

GND (synchronous section)

f

V

50/60 switch

Power supply (synchronous section)

Color killer output

Blanking pulse output

HD pulse output

VD pulse output

Y output

R-Y output

B-Y output

142

241

340

4 39

538

637

736

835

934

10 33

11 32

12 31

13 30

14 29

NTSC/PAL switch

SC

switch

f

H sync. detect filter

Sync. separation input

Contrast control

Subcolor control

Composite video signal input

Power supply (chroma section)

Separate chroma input

GND (chroma section)

ACC filter

fo adjustment filter

Chroma APC filter

SC

VCO input (4.43 MHz)

f

GND (video section)

Y input

Power supply (video section)

R-Y input

B-Y input

Color control

Tint control

15 28

16 27

17 26

18 25

19 24

20 23

21 22

f

SC

VCO input (3.58 MHz)

SC

VCO output

f

Color killer filter

B output

G output

R output

Clamp pulse input

4

4. PIN EQUIVALENT CIRCUIT DIAGRAMS

µ

PC1830

Pin No. Pin name Equivalent circuit

1 32 fH VCO filter

V

CC

2

3

2

1

V

CC

2.2 kΩ

3.3 kΩ

V

CC

Function descriptions

Pins for connecting a 32 fH
oscillation filter.
For resonator, use 500 kHz
ceramic resonator in both NTSC
and PAL modes. Bias of pin 1 is
supplied from pin 2 via an external
resistor between pins 1 and 2.

2.2 kΩ

4 Horizontal AFC

filter

5 GND

(synchronous
section)

3

1 mA

Pin for connecting filter of horizon­tal AFC detector.

300 Ω

CC

V

4

30 kΩ

3 kΩ

Synchronous section ground.

5

Pin No. Pin name Equivalent circuit Function descriptions

6fV 50/60

switch

V

CC

20 A

µ

5 kΩ

6

Vertical frequency (fV) switch pin.
When the pin voltage is 2.2 V or
less, the vertical frequency
changes to 50 Hz; when 2.8 V or
more, to 60 Hz.

µ

PC1830

7 Power supply

(synchronous
section)

8 Color killer

output

9 Blanking pulse

output

10 HD pulse

output

11 VD pulse

output

Synchronous section power supply.

Color killer output pin.

CC

V

500 Ω

1 kΩ

8

9
10
11

40 kΩ

500 Ω

Horizontal blanking pulse output
pin.

HD pulse output pin

VD pulse output pin.

12 Y output

13 R-Y output

14 B-Y output

15 GND (video

section)

6

Y signal is output.
DC level is approx. 2.0 V.

CC

V

2 mA

12
13
14

50 Ω

Decoder R-Y and B-Y color
difference signal output pins.
DC level is approx. 2.5 V.

Video section ground.

µ

PC1830

Pin No. Pin name Equivalent circuit Function descriptions

16 Y input

17 Power supply

(video section)

18 R-Y input

19 B-Y input

V

CC

5 kΩ

16

V

CC

18
19

5 kΩ

5 kΩ

40 A

5 kΩ

40 A

µ

µ

Matrix Y signal input pin. This pin
also serves as a clamp pin. Input
the signal with C coupling. DC
level is approx. 2.0 V.

Video section power supply.

Matrix R-Y and B-Y color difference
signal input pins. These pins also
serve as clamp pins.
Input the signals with C coupling.
DC level is approx. 2.5 V.
Output in PAL mode is “pseud
PAL”.

20 Color control

21 Tint control

Pin for color adjustment of matrix

V

CC

10 kΩ

40 kΩ

70 kΩ

20
21

circuit.

Pin for tint adjustment of matrix
circuit.

7

Pin No. Pin name Equivalent circuit Function descriptions

22 Clamp pulse

input

V

CC

20 A

µ

Matrix clamp pulse input pin.
Clamp operation is performed at

2.8 V or more.

µ

PC1830

23 R output

24 G output

25 B output

26 Color killer

filter

22

500 Ω

10 kΩ

Matrix R, G, and B output pins.

V

CC

2 mA

23
24
25

50 Ω

10 kΩ

DC level is approx. 2.0 V.
Sync. signal component, added to
Y-input (16 pin), appears in R, G,
and B output pins.

Filter connection pin of color killer
sync detector.

27 fSC VCO output

V

CC

10 kΩ

26

fSC VCO oscillator output pin.

VCC

125 Ω

125 Ω

3.3 kΩ

27

2.9 mA

Connect this pin to pin 28 via a

3.58 MHz oscillation filter and to
pin 29 via a 4.43 MHz oscillation
filter.

8

µ

PC1830

Pin No. Pin name Equivalent circuit Function descriptions

28 fSC VCO input

(3.58 MHz)

V

CC

fSC VCO input pins. Connect a

3.58 MHz oscillation filter between
pins 27 and 28 and a 4.43 MHz

29 fSC VCO input

(4.43 MHz)

5 kΩ

5 kΩ

28

oscillation filter between pins 27
and 29. Switch of pin 28 input and
pin 29 input is suppressed in
response to pin 41 (fSC switch)
voltage.

10 kΩ

60/0 A

µ

20 kΩ

0/60 A

µ

20 kΩ

V

V

CC

CC

10 kΩ 5 kΩ

30 Chroma APC

filter

29

5 kΩ

80 A

µ

Pin for connecting filter of chroma

V

CC

APC detector.

500 Ω 5 kΩ

V

CC

50 kΩ

30

9

Pin No. Pin name Equivalent circuit Function descriptions

31 fO adjustment

filter

30 kΩ

500 Ω

V

CC

31

Pin for connecting filter of fO
automatic adjustment loop.

µ

PC1830

32 ACC filter

33 GND (chroma

section)

34 Separate

chroma input

VCC

VCC

500 Ω

1 kΩ 5 kΩ

VCC

32

30 kΩ

80 A

µ

Pin for connecting filter of ACC
detector.

Chroma section ground.

Separate chroma signal input pin.
This pin also serves as a separate
and composite switch input pin. If
the pin voltage is set to 3.7 V or
more, composite input mode is
entered.

35 Power supply

(chroma
section)

10

34

5 kΩ

Chroma section power supply.

µ

PC1830

Pin No. Pin name Equivalent circuit Function descriptions

36 Composite

video signal
input

V

CC

5 kΩ

36

5 kΩ

Composite video signal or separate
Y signal input pin. This pin also
serves as a clamp pin.
Input the signal with C coupling.
DC level is approx. 2.3 V.

37 Subcolor

control

38 Contrast

control

39 Sync.

separation
input

Decoder color and contrast

V

CC

10 kΩ

40 kΩ

70 kΩ

37

38

V

CC

5 kΩ

adjustment pins.

Input pin of sync. separation
circuit.

5 kΩ

39

167 Ω

5 kΩ

V

CC

16 kΩ

100 Ω

11

Pin No. Pin name Equivalent circuit Function descriptions

40 H sync. detect

filter

V

CC

Pin for connecting filter of H sync.
detector.

µ

PC1830

41 fSC switch

1 kΩ

10 kΩ

41

10 kΩ

V

CC

40

Pin for controlling fSC VCO input

V

CC

20 A

µ

5 kΩ

(pins 28, 29) switch. When the pin
voltage is 2.8 V or more, the mode
changes to the 3.58 MHz mode;
when 2.2 V or less, to the 4.43
MHz mode.

42 NTSC/PAL

switch

12

Pin for controlling switch of NTSC
and PAL modes of decoder and

V

CC

5 kΩ

42

5 kΩ

20 A

µ

matrix. One of the following three
combinations of decoder and
matrix modes can be selected
depending on the value of the pin
42 voltage V42:

1. When V42 = 0 V
decoder = PAL
matrix = PAL

2. When V42 = 2.5 V
decoder = NTSC
matrix = NTSC

3. When V42 = 5 V
decoder = NTSC
matrix = PAL

µ

PC1830

5. BLOCK OPERATION

5.1 Video Signal Processing Section

(1) Input signal

After coupling by a capacitor (0.22 µF), a 1 Vp-p composite video signal is input to the composite video signal input
pin (pin 36).

(2) Clamp circuit

The clamp circuit controls the pedestal voltage level to be constant to make it a reference voltage for the post-stage
signal processing.

(3) Chroma trap circuit

Eliminates the chroma signal (NTSC system: approximately 3.58 MHz, PAL system: approximately 4.43 MHz) from
a composite video signal and extracts a brightness signal.

(4) Separate/composite switching circuit

Operates as shown in Table 5-1 according to the voltage of the separate chroma input pin (pin 34).

Table 5-1. Operation when Switching Separate/Composite Signals

Separate chroma input Mode Brightness signal ACC amp input

pin (pin 34) voltage processing

Less than 3.7 V Y/C separate input Without chroma trap Input from separate chroma

3.7 V or higher Composite video input With chroma trap Input from chroma BPF

(5) Delay circuit

Compensates for the delay between the brightness signal and chroma signal by delaying the brightness signal.

(6) Contrast adjustment circuit

Adjusts the amplitude of the brightness signal output from the Y output pin (pin 12) according to the voltage of the
contrast control pin (pin 38).
The control characteristic is shown in Figure 5-1.

13

µ

PC1830

Figure 5-1. Contrast Control Characteristic

(a) NTSC mode (b) PAL mode

400 mV

p-p

stair step (composite) input

2

V

CC

= 5 V

2

400 mV

p-p

stair step (composite) input

V

CC

= 5 V

)

p-p

1

Y output voltage (V

0 12345

Contrast control pin voltage (V)

5.2 Chroma Signal Processing Section

(1) Input signal

• Composite video signal input

After coupling by a capacitor (0.22 µF), a 1 Vp-p composite video signal is input to the composite video signal
input pin (pin 36).

• Separate chroma signal input

After coupling by a capacitor (1000 pF), a chroma signal whose burst signal amplitude is 150 mV
to the separate chroma input pin (pin 34).

)

p-p

1

Y output voltage (V

0 12345

Contrast control pin voltage (V)

p-p is input

(2) Chroma BPF circuit

Separates the chroma signal from a composite video signal.

(3) Separate/composite switching circuit

When the potential of the separate chroma input pin (pin 34) is 3.7 V or higher (in composite mode), switches the ACC
amp input from the chroma input pin to the chroma BPF circuit output. Processing of the brightness signal at this time
is switched so that it passes through the chroma trap circuit.
Operation when switching separate/composite signals is shown in Table 5-1.

(4) ACC (Auto Color Control) amplification circuit

Extracts the burst signal, detects its level and smoothes the voltage of the ACC filter pin (pin 32) by an external
capacitor.
This smoothed voltage controls color gain to keep the amplitude of the burst signal constant.

14

µ

PC1830

(5) Subcolor control circuit

According to the voltage of the subcolor control pin (pin 37), controls the amplitude of the chroma signal output from
the ACC amplification circuit after separating the burst signal from it, and adjusts the amplitude of the color difference
signal output from the R-Y output pin (pin 13) and B-Y output pin (pin 14). This controls color density on the screen.
The control characteristic is shown in Figure 5-2.

Figure 5-2. Subcolor Control Characteristic

(a) NTSC mode (b) PAL mode

p-p

Color bar (composite, burst: 300 mV

3

) input

VCC = 5 V

Color bar (composite, burst: 300 mV

3

p-p

CC

= 5 V

V

) input

2

1

B-Y output voltage (V)

0 12345

Subcolor control pin voltage (V)

2

1

B-Y output voltage (V)

0 12345

Subcolor control pin voltage (V)

(6) Chroma APC (Auto Phase Control) circuit

Detects the phase difference between the burst signal extracted from the chroma signal and the signal from f
and smoothes the chroma APC filter pin (pin 30) using a capacitor. This smoothed voltage is used to control the

SCVCXO oscillation frequency.

f

(7) Killer detection circuit

Detects the amplitude of the burst signal and executes a mute on the subcolor control circuit when there is no burst
signal, preventing it from outputting a chroma signal to avoid color noise. In this case, the output of the color killer
output pin (pin 8) is driven high.
The color killer sensitivity is determined by the time constant of a resistor and capacitor connected to the color killer
filter pin (pin 26).

SCVCXO

(8) IDENT detection circuit

Performs IDENT detection. With IDENT detection, if an NTSC signal (PAL signal in NTSC mode) is input in PAL mode,
the color killer turns on and no chroma signal is output.

(9) 3.58 MHz/4.43 MHz VCXO, PAL SW circuit

Switches the f

SCVCO input pin between pin 28 (for 3.58 MHz) and pin 29 (for 4.43 MHz) by controlling the voltage

of the fSC switching pin (pin 41) (2.8 V or higher: 3.58 MHz mode, 2.2 V or below: 4.43 MHz mode) to perform fSC
oscillation at 3.58 MHz or 4.43 MHz. VCXO is controlled by the voltage of the chroma APC filter pin (pin 30) smoothed
by the chroma APC circuit and its phase is synchronized with the input burst signal.
The PAL SW circuit inverts the phase of a signal on the R-Y demodulation axis every 1H by IDENT detection.

(10) R-Y, B-Y demodulation circuit

Performs demodulation using the chroma signal output from the ACC circuit, an R-Y demodulation axis signal and
a B-Y demodulation axis signal output from f

SCVCXO, and multiplies R-Y by 1.4 and B-Y by 2.03.

15

5.3 Matrix Section

(1) Input signal

• Brightness input signal

µ

After coupling by a capacitor (0.22
pin (pin 16).

• Color difference input signal

After coupling by a capacitor (0.22
(pins 18 and 19).

(2) Y, R-Y and B-Y input clamp circuit

Clamps Y, R-Y and B-Y signals when the voltage of the clamp pulse input pin (pin 22) is 2.8 V or higher.
Input a clamp pulse to the clamp pulse input pin (pin 22) in synchronization with the burst section of an input signal
as shown in Figure 5-3.
In the application circuit example, adjust the position of the clamp pulse by DELAY (
resistor: 10 kΩ) and the clamp pulse width by PD (µPD4538B external variable resistor: 10 kΩ).

F), a brightness signal which has 1 Vp-p of video part is input to the Y input

µ

F), 1 Vp-p R-Y and B-Y signals are input to the R-Y and B-Y input pins

µ

PD4538B external variable

µ

PC1830

Figure 5-3. 22-Pin Input Clamp Pulse Waveform

Burst signal

Composite
video input

22-pin input

clamp pulse

(3) Amplification color control circuit

Adjusts the amplitude of a color difference signal input to the R-Y input pin (pin 18) and B-Y input pin (pin 19) according
to the voltage of the color control pin (pin 20). This controls the color density on the screen.
When using a matrix, adjust the color density mainly using this color control and fix the voltage of the subcolor control
pin (pin 37) at 2 V (TYP.).
The control characteristic is shown in Figure 5-4.

Video signal

Clamp operates at 2.8 V or higher.

16

µ

PC1830

Figure 5-4. Color Control Characteristic

(a) NTSC mode (b) PAL mode

400 mV

p-p

p-p

400 mV

Tint control pin voltage: 2 V

1.0

0.9

0.8

)

0.7

p-p

0.6

0.5

stair step B-Y input

V

CC

= 5 V

Tint control pin voltage: 2 V

1.0

0.9

0.8

)

0.7

p-p

0.6

0.5

stair step B-Y input

V

CC

= 5 V

0.4

0.3

B output voltage (V

0.2

0.1

0 12345

Color control pin voltage (V)

0.4

0.3

B output voltage (V

0.2

0.1

0 12345

Color control pin voltage (V)

(4) Tint control circuit

Controls the phase of a color difference signal whose amplitude is adjusted by the color control circuit, in a range of
±45° according to the voltage of the tint control pin (pin 21), and adjusts tint on the screen.
Table 5-2 shows the demodulation angle and demodulation ratio in each mode and Figure 5-5 shows the control
characteristic.

Table 5-2. Demodulation Angle and Demodulation Ratio when

Tint Control Pin (Pin 21) Voltage = 2 V (TYP.)

Mode Demodulation angle (∠R-Y) Demodulation ratio (R-Y/B-Y)
NTSC 105° (TYP.) 0.75 (TYP.)
PAL 90° (TYP.) 0.61 (TYP.)

Figure 5-5. Tint Control Characteristic

(a) NTSC mode (b) PAL mode

400 mV

p-p

stair step R-Y, B-Y input

Tint control pin voltage: MAX.

+90

+45

0

_

45

B demodulation angle (deg)

_

90

012345

Tint control pin voltage (V)

V

CC

= 5 V

400 mV

p-p

stair step R-Y, B-Y input

Tint control pin voltage: MAX.

+90

V

CC

= 5 V

+45

0

_

45

B demodulation angle (deg)

_

90

012345

Tint control pin voltage (V)

17

(5) G-Y demodulation circuit

Demodulates G-Y using (R-Y)’, (B-Y)’ which is color difference signal after tint adjustment and the following
expression.

G-Y demodulation expression: (G-Y) = –0.51 × (R-Y)’ – 0.19 × (B-Y)’

(6) RGB matrix circuit

Adds a brightness signal: Y to each of (R-Y)’, (B-Y)’ and G-Y to create R, G, and B signals.

5.4 Synchronizing Signal Processing Section

(1) Input signal

A composite video signal or brightness signal is input to the synchronizing separate input pin (pin 39) at 1 V

(2) Sync. separation circuit

Separates the sync. signal from a composite video signal. The slice level can be changed using an external resistor:

X (see Figure 5-6, TYP. = 220 Ω).

R
The operation of the µPC1830 sync. separation circuit is explained below.
Figure 5-6 is an equivalent circuit diagram of the µPC1830 sync. separation circuit.

µ

PC1830

P-P.

Figure 5-6.

V

CC

A733

µ

PC1830 Sync. Separate Input Section Equivalent Circuit

V

CC

16 kΩ

100 Ω

167Ω

TR1

1.8 kΩ
+

Co

Approx. 2.5 V

(when V

Isp

Rx

Ix

Ro

CC

= 5 V)

39

5 kΩ

5 kΩ

CC

V

5 kΩ

In Figure 5-6, the slice level of sync. separation is determined as follows:

When a negative sync. video signal is input, charge current ISP flows from the µPC1830 to CO so that the
synchronization peak (minimum potential) becomes approximately 2.5 V. The voltage of the sync. separate
input pin (pin 39) becomes 2.5 V or higher during a period other than the synchronization peak (minimum
potential), thus cutting off transistor TR1 (reducing the collector current of TR1). Consequently, a charge in C
is discharged via RO and RX by current IX during this cut-off period. Figure 5-7 illustrates this situation.

18

O

Figure 5-7. Sync. Separation Waveform

µ

PC1830

Charge by I

V

S

V

S in Figure 5-7 represents the slice voltage and can be expressed in the following expression if it is assumed

SP

Discharge by I

T1 (4.7 s) T2 (58.86 s)

µ

µ

X

that CO is sufficiently large, and both IX and ISP are linear.

S = 2.5 × (RX/RO) × (T2/T1) [V]

V

The µPC1830 amplifies the part lower than this slice voltage (VS) to perform sync. separation.
To determine sync. separation sensitivity, change R

X to set VS. Decreasing VS is advantageous for separation

of the horizontal sync. part, but disadvantageous for separation of the vertical sync. part. On the contrary,
increasing VS may cause a sync. failure (jitter) due to noise (spikes) of the horizontal sync. part. Therefore, it
is necessary to optimize the constant in accordance with a signal input. As capacitance C

O, select a sufficiently

large value compared with the charge/discharge current. However, an excessive value may deteriorate the
excessive response characteristic, failing to catch up with drastic APL variations of the input signal.

The larger R

X, the larger the slice level becomes. However, with large RX if the sync. signal level drops (weak

electric field signal, etc.) a video signal may be confused with a sync. signal and sliced, making synchronization
unstable (abnormal).

Caution Since the measuring circuit uses capacitor coupling for input for ease of measurement, it is

susceptible to APL variations. Therefore, when configuring the actual circuit, use a Sync Tip
clamp circuit in the stage prior to inputting to the emitter follower to stabilize the synchronization
peak potential and this will make the circuit more resistant to APL variations.

(3) Vertical filter circuit

Separates the vertical sync. signal from the sync. signal separated by the sync. separation circuit.

(4) Horizontal sync. detection circuit

Detects the presence of a horizontal sync. signal and changes the AFC time constant.

(5) AFC detection circuit

Performs phase detection on an input sync. signal and f

H and outputs the phase difference in voltage.

Stops phase detection for 9H of the vertical blanking period.

(6) 32f

H VCO

Controls VCO according to the voltage output by the AFC detection circuit and generates 32fH oscillation clocks.

19

(7) Horizontal/vertical counter circuit

• Horizontal counter circuit

Divides a 32f

• 525/625 counter circuit

Performs counting at 4f
Generates VD in 0.75H delay from the falling edge of a vertical sync. signal in an odd field and in 0.75H delay
from the falling edge of a vertical sync. signal in an even field.

H signal to generate horizontal timing signals such as HD and BLK signals.

H and generates a vertical timing signal.

µ

PC1830

20

µ

PC1830

6. ELECTRICAL SPECIFICATIONS

Absolute Maximum Ratings (TA = +25 °C unless otherwise specified)

Parameter Symbol Ratings Unit
Power supply voltage VCC 7.0 V
Video input signal voltage VIY VCC V
Chroma input signal voltage VIC VCC V
Synchronous separation input signal voltage VIS VCC V
Control signal voltage VIcnt VCC V
Permissible package power dissipation PD 500 (on board, TA = +75 °C) mW
Operating ambient temperature TA –20 to +75 °C
Storage temperature Tstg –40 to +125 °C

Caution Even if one of the parameters exceeds its absolute maximum rating even momentarily, the quality

of the product may be degraded. The absolute maximum rating therefore specifies the upper
or lower limit of the value at which the product can be used without physical damages. Be sure
not to exceed or fall below this values when using the product.

Recommended Operating Conditions

Parameter Symbol Conditions MIN. TYP. MAX. Unit
Power supply voltage VCC 4.5 5.0 5.5 V
Composite video input voltage VYC — 1.0 — Vp-p
Separate chroma input signal VC — 150 — mV p-p

voltage
Synchronous separation input VS — 1.0 — Vp-p

signal voltage
Control signal voltage Vcont 0—VCC V
Color difference input voltage VR-Y 1.0 VP-P

VB-Y

21

ELECTRICAL SPECIFICATIONS (TA = +25 ±3 ˚C, VCC = +5 V unless otherwise specified)

VIDEO SIGNAL PROCESSING SECTION

µ

PC1830

Parameter

Power supply
current

Video voltage gain

Contrast variable
range

Video output DC
voltage fluctuation
when contrast is
variable

Video frequency
characteristics

Video input DC
voltage

Video output DC
voltage

Video output DC
power supply
voltage fluctuation

Video output gain
power supply
voltage fluctuation

Trap attenuation
amount

Symbol

ICC

Av(comp)

evc

∆E

OYC

fv1
fv2
fv3
fv4

EYI

EYO

∆EYOV

∆AVV

∆dt

Conditions

With no input signal

Contrast = max.

Max./min. contrast ratio

Output DC fluctuation,
Contrast = max./min.

200 kHz/1.8 MHz gain
difference,
Contrast = max.

200 kHz/5.5 MHz gain
difference,
Contrast = max.

DC voltage of pin 36

Scan period voltage of
pin 12
Contrast = max.

EYO change when VCC
changes from 4.5 to

5.5 V
Contrast = max.

Video voltage gain
change when VCC
changes from 4.5 to 5.5
V,
Contrast = max.

Gain difference of
200 kHz/3.58 MHz and
200 kHz/4.43 MHz
Contrast = max.

Input signal

–

Stair step 1
(400 mVp-p)

Stair step 1
(400 mVp-p)

Sync. signal
(300 mVp-p)
only

Sine wave 1
(400 mVp-p)

Sync. signal
(300 mVp-p)
only

Sync. signal
( 300 m Vp-p)
only

Stair step 1
(400 mVp-p)

Sine wave 1
(400 mVp-p)

Composite
/Separate

Both 3.58/ – 10.0 12.0 14.0 dB

Both 3.58/ – 30 – – dB

Both 3.58/ – – 0 ±400 mV

Composite

Separate

Both 3.58/ – 2.1 2.5 3.0 V

Both 3.58/ – – 0 ±100 mV

Composite

fSC PAL or

(MHz) NTSC

– – – 507090mA

4.43

4.43

4.43

4.43 – –4 –2 0 dB

3.58 – –5 –3 0 dB

4.43 – 0 +2 +4 dB

3.58 – –1 +1 +3 dB

4.43

4.43

– – – –0.5 0.0 +0.5 dB

3.58/ – –20 – – dB

4.43

MIN. TYP. MAX. Unit

– 1.7 2.0 2.4 V

Remark For the input signal, see Measuring Input Signal.

22

µ

PC1830

CHROMA SECTION

Parameter

ACC amplitude
characteristics

Color killer setting
point

Color killer color
remainder

Color killer output,
high

Color killer output,
low

Subcolor control
variable range

Subcolor control
color remainder

APC pull-in range

VCO control
sensitivity

Symbol

ACC1

ACC2

ACC3

ACC4

ACC5

ACC6

ACC7

ACC8

eKPC

eKPS

eOK

ECKH

ECKL

eCC

eOC

fSP

β

S

Conditions

B-Y output level
fluctuation.
With reference to burst
300 mVp-p.

B-Y output level
fluctuation.
With reference to burst
300 mVp-p.

Level at which killer
output goes high with
burst signal 300 mVp-p
set to 0 dB.

Level at which killer
output goes high with
burst signal 150 mVp-p
set to 0 dB.

B-Y output remaining
level when killer output
is high.

Color killer output level
when color killer is ON,
IOH = –200 µA.

Color killer output level
when color killer is
OFF, IOL = +200 µA.

B-Y output level ratio of
max./min. subcolor.

B-Y output remaining
subcolor difference
level, Color = min.

APC pull-in frequency
range when burst
chroma frequency
changes. (fsc =
reference)

Calculate from
oscillation freq. when
APC filter pin voltage is

2.3/2.7 V.

Input signal

Burst

Color

600 mVp-p

bar
2

Burst

30 mVp-p

Burst

600 mVp-p

Burst

30 mVp-p

Burst

300 mVp-p

Burst

15 mVp-p

Burst

300 mVp-p

Burst

15 mVp-p

Color bar 1

Color bar 1

–

–

Color bar 1

Color bar 1

Color bar 1

–

Composite
/Separate

Composite

Separate

Composite

Separate

Composite

Composite

Composite

Separate

f SC PAL or

(MHz) NTSC

4.43 – –2.0 0.0 +2.0 dB

3.58 – –2.0 0.0 +2.0 dB

4.43 – –2.0 0.0 +2.0 dB

3.58 – –2.0 0.0 +2.0 dB

4.43 PAL –48 –40 –32 dB

3.58 NTSC –48 –40 –32 dB

4.43 PAL –48 –40 –32 dB

3.58 NTSC –48 –40 –32 dB

– ––0–50mVp-p

– – – 3.9 4.05 V

– – – 0.5 0.6 V

4.43 – 30 45 – dB

4.43 – 0 – 50 mVp-p

4.43 PAL ±400 ±600 – Hz

3.58 NTSC ±400 ±600 – Hz

4.43 PAL ±400 ±600 – Hz

3.58 NTSC ±400 ±600 – Hz

– 4.43 – 1.0 1.2 1.4 Hz/mV

3.58 – 1.0 1.2 1.4 Hz/mV

MIN. TYP. MAX. Unit

– –7.0 –3.0 +1.0 dB

– –7.0 –3.0 +1.0 dB

– –7.0 –3.0 +1.0 dB

– –7.0 –3.0 +1.0 dB

(1/3)

Remark For the input signal, see Measuring Input Signal.

23

Parameter Conditions

VCO free-running
frequency

PAL mode demodu­lation ratio

NTSC mode
demodulation ratio

PAL mode
demodulation angle

NTSC mode
demodulation angle

Maximum color
difference output

Color difference
output remaining
carrier level

Color difference
output remaining
harmonic level

Color difference
output frequency
characteristics

Blanking stage
difference

Line fluctuation

Color difference
output pin voltage

Color difference
output pin voltage
fluctuation with
power supply
fluctuation

Symbol

fS

R-Y

B-Y DP

R-Y
B-Y DN

∠R-YDP

∠R-YDN

eBYM

eCAR

eHAR

fCP

fCS

eBLK

∆EORY

EORY

EOBY

∆EORYV

∆EOBYV

VCO oscillator freq.

R-Y/B-Y output ratio

R-Y demodulation angle

Subcolor = max.

R-Y, B-Y output
remaining carrier level

Output remaining
harmonic level,
R-Y, B-Y = 1 Vp-p

∆f = 50/500 kHz
R-Y, B-Y output level
ratio

∆f = 50 kHz/1 MHz
R-Y, B-Y output level
ratio

Subcolor = max.
R-Y/B-Y output blank
period/scan period
DC voltage difference

Subcolor = max.
Scan period DC voltage
difference at every
horizontal scanning
period of R-Y output

R-Y output DC voltage,
With no signal

B-Y output DC voltage,
With no signal

EORY change when VCC
changes from 4.5 to 5.5
V

EOBY change when VCC
changes from 4.5 to 5.5
V

Input signal

Sync. signal
(300 mVp-p) only

Rainbow
color bar
(300 mVp-p)

Rainbow
color bar
(300 mVp-p)

Rainbow
color bar
(300 mVp-p)

–

Color bar 1

Since wave

2

(400 mVp-p)

Burst (300
mVp-p) only

Burst (300
mVp-p) only

–

–

Composite
/Separate

Composite

Composite

Composite

Composite

Separate

f SC PAL or

(MHz) NTSC

– 4.43 – ±400 – – Hz

3.58 – ±400 – – Hz

4.43 PAL 0.9 1.0 1.1 Times

3.58 NTSC 0.9 1.0 1.1 Times

4.43 PAL 85 90 95 deg

3.58 NTSC 85 90 95 deg

4.43 – 1.3 1.6 1.9 Vp-p

– 3.58 NTSC 0 – 100 mVp-p

– 3.58 NTSC 0 – 100 mVp-p

4.43 PAL –5 –3 0 dB

3.58 NTSC

4.43 PAL –5 –3 0 dB

3.58 NTSC

– 4.43 PAL – 0 20 mV

– 4.43 PAL – 0 20 mV

– 4.43 PAL 2.2 2.5 3.0 V

– 4.43 PAL 0 ±100 mV

MIN. TYP. MAX. Unit

0 ±100 mV

µ

PC1830

(2/3)

Remark For the input signal, see Measuring Input Signal.

24

Parameter

Separate chroma
input pin voltage

Separate chroma
input resistance

Separate/composite
change threshold
voltage

Symbol

EIC

RIC

EICTH

Conditions

DC voltage of pin 34

Calculate from input
when EIC → EIC + 2 V

Voltage of pin 34 at
which separate/
composite mode is
changed

Input signal

–

–

–

Remark For the input signal, see Measuring Input Signal.

µ

PC1830

Composite
/Separate

Separate

Separate

fSC PAL or
(MHz) NTSC

– – 1.2 1.5 1.8 V

– – 26 35 44 kΩ

– 3.58 NTSC 3.1 3.4 3.7 V

MIN. TYP. MAX. Unit

(3/3)

25

SYNCHRONOUS SECTION

Parameter

Sync. separation
input DC voltage

H sync. pull-in
range

Horizontal VCO
control sensitivity

Horizontal VCO
free-running freq.

Horizontal VCO
free-running freq.
fluctuation with
power supply
voltage fluctuation

HD pulse output,
high

HD pulse output,
low

HD pulse output
width

Blanking pulse
output, high

Blanking pulse
output, low

Blanking pulse
output, width

Vertical free-running
frequency
(in 50-Hz mode)

Symbol

EIS

fHP

β

H

fH

∆fHV

EHDH

EHDL

tWHD

EBLH

EBLL

tWBL

fv1

fv2

fv3

fv4

Sync. separation input
DC voltage at no signal

Frequencies at which
horizontal AFC can be
pulled,
H sync width = 4.8 µs

Calculated from HD
output frequency
change when horizontal
AFC filter pin voltage
changes from 2.9 to 3.4
V,
With no signal

Difference for 15.680
kHz of HD output
frequency,
With no signal

Change of fH when VCC
changes from 4.5 to 5.5
V

IOH = –200 µA

IOL = +200 µA

When HD pulse rising,
falling is 2.5 V

IOH = –200 µA

IOL = +200 µA

When blanking pulse
rising, falling is 2.5 V

H sync. detect filter
pin voltage = 0 V

H sync. detect filter
pin voltage = 5 V

H sync. detect filter
pin voltage = 0 V

H sync. detect filter
pin voltage = 5 V

Conditions

Input signal

–

Sync. signal
(300 mVp-p)
only

_

–

–

Sync. signal
(300 mVp-p) only

Sync. signal
(300 mVp-p) only

Sync. signal
(300 mVp-p) only

Sync. signal
(300 mVp-p) only

Sync. signal
(300 mVp-p) only

Sync. signal
(300 mVp-p) only

Sync. separate
input of 3.5 V

Sync. separate
input of –1 mA

Composite
/Separate

f SC PAL or
(MHz) NTSC

– – – 2.25 2.55 2.85 V

–––±400 – – Hz

– – – 1.2 1.5 1.9 Hz/mV

– – – –200 0 +200 Hz

––– 0±50 Hz

– – – 3.9 4.05 – V

– – – – 0.5 0.6 V

– – – 3.9 4.4 4.9

– – – 3.9 4.05 – V

– – – – 0.5 0.6 V

– – – 9.9 10.4 10.9

– –––fH/368 – Hz

– –––fH/352 – Hz

– –––fH/272 – Hz

– –––fH/288 – Hz

MIN. TYP. MAX. Unit

µ

PC1830

(1/2)

µ

s

µ

s

Remark For the input signal, see Measuring Input Signal.

26

Parameter

Vertical free-running
frequency
(in 60-Hz mode)

VD pulse output,
high

VD pulse output,
low

Even field VD pulse
output width

Odd field VD pulse
output width

Symbol

fv5

fv6

fv7

fv8

EVDH

EVDL

tWVDE

tWVDO

Conditions

H sync. detect filter
pin voltage = 0 V

H sync. detect filter
pin voltage = 5 V

H sync. detect filter
pin voltage = 0 V

H sync. detect filter
pin voltage = 5 V

IOH = –200 µA

IOL = +200 µA

Input signal

Sync. separate
input of 3.5 V

Sync. separate
input of –1 mA

Sync. signal
of 300 mVp-p

Sync. signal
of 300 mVp-p

µ

PC1830

Composite
/Separate

f SC PAL or
(MHz) NTSC

– –––fH/296 – Hz

– –––fH/288 – Hz

– –––fH/232 – Hz

– –––fH/240 – Hz

– – – 3.9 4.05 – V

– – – – 0.5 0.6 V

– –––5.5–H

– –––6.0–H

MIN. TYP. MAX. Unit

(2/2)

Remark For the input signal, see Measuring Input Signal.

27

MODE CONTROL SECTION

µ

PC1830

Parameter

NTSC/PAL mode
switch threshold
voltage

NTSC/PAL mode
switch input pin
current

Subcarrier frequency
switch threshold
voltage

Subcarrier frequency
switch input pin
current

Vertical frequency
switch threshold
voltage

Vertical frequency
switch input pin
current

Symbol

EPN1

EPN2

IIPN

ESC

IISC

EFV

IIFV

Conditions

Voltage of pin 42 at
which both decoder and
matrix changes to
NTSC or PAL mode
simultaneously.

Voltage of pin 42 at
which only matrix
changes to NTSC or
PAL mode and decoder
remains in NTSC mode.

Input current of pin 42.

Voltage of pin 41 at
which fSC 3.58/4.43
mode is changed.

Input current of pin 41.

Voltage of pin 6 at
which fV 50/60 mode is
changed.

Input current of pin 6.

Input signal

–

–

–

–

–

–

–

Composite
/Separate

f SC PAL or
(MHz) NTSC

– – – 1.37 1.67 1.97 V

– – – 3.03 3.33 3.63 V

– – – –0.5 +0.2 +2.0

– – – 2.2 2.5 2.8 V

– – – –2.0 –0.2 +0.5

– – – 2.2 2.5 2.8 V

– – – –2.0 –0.2 +0.5

MIN. TYP. MAX. Unit

µ

A

µ

A

µ

A

NTSC/PAL MODE SETTING

SW setting of pin 42 Voltage of pin 42

Mode 1 Lower than EPN1 PAL PAL
Mode 2 Between EPN1 and EPN2 NTSC NTSC
Mode 3 Higher than EPN2 NTSC PAL

Decoder mode

Matrix mode

VERTICAL FREQUENCY (fV) SWITCHING

Voltage of pin 6 Vertical frequency fv

Lower than EFV 50 Hz
Higher than EFV 60 Hz

SUBCARRIER FREQUENCY (fSC) SWITCHING

Voltage of pin 41 Subcarrier frequency fSC

Lower than ESC 4.43 MHz
Higher than ESC 3.58 MHz

28

MATRIX SECTION

Parameter

Original color output Y
voltage gain

Y voltage gain RGB
output mutual
difference

Y voltage gain
fluctuation with
power supply
voltage fluctuation

Y frequency
characteristics

Symbol

AY

∆AYRGB

∆AYV

fY

Conditions

B output voltage gain.

Mutual difference of R, G,
and B output voltage
gains.

Difference between B
output voltage gain and AY
under the same conditions
as AY except that VCC =

4.5 V, 5.5 V.
200 kHz/6 MHz B output

gain difference.

Input signal

Y:stair step 2
(1 Vp-p)

Y:stair step 2
(1 Vp-p)

Y:stair step 2
(1 Vp-p)

Sine wave 4
(1 Vp-p)

µ

PC1830

Composite
/Separate

f SC PAL or
(MHz) NTSC

– – – –2.0 0.0 +2.0 dB

– – – –1.0 0.0 +1.0 dB

– – – –0.5 0.0 +0.5 dB

– – – 0 –3 –5 dB

MIN. TYP. MAX. Unit

(1/2)

B output color
difference voltage
gain

Color control
variable range

Color control color
remainder

Color difference
voltage gain
fluctuation with
power supply
voltage fluctuation

Color difference
freq. characteristics

Tint control
variable range

AB

B output voltage gain. Tint
control voltage 2.0 V,
Color = max.

eCM

Difference between B output
gain and AB.
Tint control voltage 2.0 V,
Color = min.

eOCM

B output remaining color
difference level.
Tint control voltage 2.0 V,
Color = min.

∆ABV

Difference between each B
output voltage gain and AB
under the same condition
as AB except that VCC is
changed from 4.5 to 5.5 V

fB

B output gain difference
when freq. changes from
200 kHz to 6 MHz.
Tint control voltage 2.0 V,
Color = max.

eTMAX.

See Note.
Color = max.

eTMIN.

B-Y: stair step

1

(400 mVp-p)
B-Y: stair step

1

(400 mVp-p)

B-Y: stair step

1

(400 mVp-p)

B-Y: stair step

1

(400 mVp-p)

B-Y: sine wave

3

(400 mVp-p )

Stair step 1
(400 mV

)

p-p

– – – 4.0 6.0 8.0 dB

–––3545–dB

– ––0550mVp-p

– – – –0.5 0.0 +0.5 dB

– – – 0 –3 –5 dB

– – PAL/ +35 – – deg

NTSC

– – –35 deg

Note B demodulation angle

B demodulation angle

φ

B is obtained from B output signal voltages using the following expressions:

B1

B = tan

–1

2

B

φ

Where, B1: B output signal voltage when signal is input only to R-Y

B

2: B output signal voltage when signal is input only to B-Y,

e

TMAX. and eTMIN. are obtained from the φB values using the following expressions:

TMAX. = φB(4) – φB(2), eTMIN. = φB(2) –

e
Where,

φ

B(0), φB(2), φB(4): φB values when tint control voltage is 0, 2, 4 V, respectively.

φ

B(10)

Remark For the input signal, see Measuring Input Signal.

29

Parameter

PAL mode
demodulation ratio

PAL mode
demodulation angle

NTSC mode
demodulation ratio

NTSC mode
demodulation angle

Clamp pulse input
threshold voltage

R-Y input pin voltage
B-Y input pin voltage
R output pin voltage
G output pin voltage
B output pin voltage
DC difference

voltage between R,
G, B outputs

RGB output DC
fluctuation in color
control mode

RGB output DC
fluctuation in tint
control mode

Y input DC fluctuation in
color control mode

Y input DC fluctuation in
tint control mode

Y input pin voltage

Symbol

R-Y

B-Y P

G-Y

B-Y P

∠R-YMP
∠G-YMP

R-Y
B-Y MN

G-Y
B-Y MN

∠R-YMN

∠G-YMN

ECLP

ERYI
EBYI
ERO
EGO
EBO

∆EX-Y

∆ERGBC

∆ERGBT

∆EYIC

∆EYIT

EYI

Conditions

Tint control = 2 V, Color
= max.
See Note1.

Note 2

Maximum value of difference
voltages between ERO, EGO,
and EBO

Maximum value of ERO,
EGO, EBO fluctuation Color
control = max./min.
Tint control = 2.0 V

Maximum value of ERO, EGO,
EBO fluctuation
Tint control = max./typ./min.
Color control = max.

Color control = max./min.
Tint control = 2.0 V

Tint control = max./typ./min.
Color control = max.

Input signal

Stair step 1
(400 mV

p-p

–

–
–
–
–
–
–

–

–

–

–

–

)

Composite
/Separate

f SC PAL or

(MHz) NTSC

– – PAL 0.50 0.56 0.62 Times

NTSC 0.69 0.75 0.83 Times

– – – 2.1 2.5 2.9 V

– – – 2.1 2.5 2.9 V
– – – 2.1 2.5 2.9 V
– – – 1.6 2.0 2.4 V
– – – 1.6 2.0 2.4 V
– – – 1.6 2.0 2.4 V

– – – 300 mV

– –––0±300 mV

– –––0±300 mV

– –––0±300 mV

– –––0±300 mV

– – – 1.6 2.0 2.4 V

MIN. TYP. MAX. Unit

0.31 0.35 0.39 Times

85 90 95 deg

228 237 246 deg

0.22 0.25 0.28 Times

100 105 110 deg
238 247 256 deg

µ

PC1830

(2/2)

Notes 1. From R, G and B output voltages R1, G1 and B1 when signal is input only to R-Y and R, G, and B output

voltages R2, G2 and B2 when signal is input only to B-Y, R, G, B demodulation ratio and demodulation
angles are obtained by the following expressions:

R – Y
B – Y B12 + B22,B – Y B12 + B2

=

√

R12 + R2

∠R – Y = –tan

∠G – Y = –tan

2

R2

–1

– tan

R

1 B2

√

G1 – 3G2

–1

3G

1 + G2 B2

√

G – Y

–1

–ta

B1

=

√

+ 90°

n–1

G12 + G2

B1

2

2

+ 240°

2. Clamp pulse input voltage which gets 80 µA or more at Y input pin voltage = VCC.

Remark For the input signal, see Measuring Input Signal.

30

Measuring Input Signal

400 mV

p-p

300 mV

p-p

300 mV

p-p

300 mV

p-p

1 V

p-p

• Stair step

µ

PC1830

1 400 mV

p-p 21 Vp-p

• Sync. signal (300 mVp-p) only

• Sine wave

1 400 mVp-p 2 400 mVp-p

Sine Wave Mono Tone

3 400 mV

p-p 4 1 Vp-p

Sine Wave Mono Tone

400 mVp-p

Sine Wave Mono Tone

400 mVp-p

Sine Wave Mono Tone

400 mVp-p

1 Vp-p

31

• Color bar

1 2 Variable burst or chroma signal amplitude

µ

PC1830

• Rainbow color bar (300 mV

• Burst (300 mV

p-p) only

p-p)

1 Vp-p

Rainbow chroma signal

300 mVp-p

300 mV

1 Vp-p

Variable burst or chroma signal amplitude

p-p

32

Timing chart (horizontal period)

Composite

video input

1 s

µ

Burst signal

µ

PC1830

H sync.

output (HD)

Blanking

output (BLK)

4 s

µ

10 s

µ

33

Timing chart (vertical period/standard signal input)

Odd field

Composite
video input

µ

PC1830

H sync. output

(HD)

Blanking output

(BLK)

V sync. output

(VD)

Composite
video input

H sync. output

(HD)

Blanking output

(BLK)

V sync. output

(VD)

6H

0.75H

Even field

5.5H

0.75H

1.25H

Remark H represents horizontal scanning period.

34

BNC
SEP-C-IN

75

Ω

150

Ω

75

Ω

BNC
Y-IN

10
kΩ

100 F

27

75

kΩ

Ω

VCC

VCC

60 Hz

50 Hz

SEP-SW

18
kΩ

0.01 F

µ

22
kΩ

µ

+

Mode 3

Mode 1

20 k

Ω

20 k

Ω

VCC

FV

COMP

VCC

C945

1 k

VCC

C945

1 kΩ

3.58 MHz

4.43 MHz

SEP

VCC

Ω

Mode 2

FSC

Notes 1. Crystal resonator for load of 16 pF.

4.433 619 MHz (PAL) : DAISHINKU CORP. (Type: HC-49/U)

3.579 545 MHz (NTSC) : Toyo Communication Equipment Co., Ltd. (Type: TQC203A-8R)

2. CSB500F23: Murata Mfg. Co.,Ltd.

Vcc

10
kΩ

Vcc

+

22
F

µ

0.1 F

0.22 F

µ

µ

Separate/composite
switch, ACC amp.
subcolor control

trap

Delay

HD, VD, blanking pulse,
killer output buffer

Killer
detect BLK HD VD

0.1 F

µ

+

22 F

µ

VCC

C945

1000 pF

chroma

BPF

Y

4.7 F

µ

680
kΩ

1 F

µ

Filter f0
adjust

C

Contrast control

0.1
F

µ

+

+

15 kΩ

820 Ω

0.01 F

µ

APC, killer detect,
IDENT detect

C

R-Y, B-Y
modulate

R-Y

LPF

Y

Y, R-Y, B-Y
output buffer

Note 1

15 pF 15 pF

4.43

3.58 MHz

MHz

470 Ω 2.4 kΩ

3.58 MHz/4.43 MHz
VCXO, PAL SW

f

SC

f

killer

B-Y

B-YR-Y

0.22 F

VCC

+

22 F

µ

0.22 F

µ

SC

Y

Y, R-Y, B-Y
input clamp

µ

0.1

µ

F

1 kΩ

220
pF

VCC

1.8 kΩ

A733

43 kΩ

+

180
kΩ

220 Ω

+

1 F

µ

2.2
F

µ

0.1
F

µ

Contrast
control

VCC

20
kΩ

Subcolor
control

0.1
F

µ

VCC

20 kΩ

42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22

Mode
switch

32 f

H/V count

H VCO

Sync.
separate

H sync.
detect

V filter

H

V

AFC wave
detect

Clamp

chroma

Separate/composite switch

V
H

BLK

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

330 Ω 4700

270 pF

2.2 kΩ

390 pF

500
kHz

2.7 kΩ

pF

Note 2

4.3 kΩ

+

2.2 F

µ

910
kΩ

RGB output

R

NTSC/PAL
matrix

R-Y

Tint control

Amp. color
control

0.22

µ

F

20 k

buffer

BG

B-Y G-Y

B-YR-Y

B-YR-Y

0.22
F

µ

20 k
Color control

Ω

Tint control

7. APPLICATION CIRCUIT EXAMPLE

Example 1

C945

68 Ω

C945

68 Ω

C945

68 Ω

µ

22 F

180 pF

+

16 1514 13 1211 10 9

0.1 F

µ

0.1

0.1

µ

F

µ

F

Ω

12345678

470 pF

Delay

10 kΩ

PD

10 kΩ

5.1 kΩ

µ

PD4538B

5.1 kΩ

0.22 F

470 F

0.22 F

470 F

0.22 F

470 F

Vcc

µ

BNC

+

B-OUT

µ

Vcc

µ

BNC

+

G-OUT

µ

Vcc

µ

BNC

+

R-OUT

µ

VCC

µ

PC1830

35

36

Example 2 (for NTSC limited use)

Notes 1. Crystal resonator for load of 16 pF.

3.579 545 MHz (NTSC) : Toyo Communication Equipment Co., Ltd. (Type: TQC203A-8R)

2. CSB500F23: Murata Mfg. Co.,Ltd.

BNC
SEP-C-IN

75

Ω

150

Ω

75

Ω

BNC
Y-IN

10
kΩ

100 F

75

Ω

VCC

SEP-SW

0.01 F

µ

+

27
kΩ

18
kΩ

22
kΩ

20 k

20 k

VCC

µ

VCC

Ω

Ω

VCC

SEP

COMP

C945

1 k

C945

1 kΩ

VCC

Vcc

10

0.1

kΩ

F

µ

Vcc

+

0.1 F

0.22 F

µ

Separate/composite
switch, ACC amp.
subcolor control

trap

Delay

HD, VD, blanking pulse,
killer output buffer

22
F

µ

µ

C945

1000 pF

chroma

BPF

Y

4.7 F

µ

680
kΩ

1 F

µ

Filter f0
adjust

C

Contrast control

0.1
F

µ

+

+

15 kΩ

0.01 F

µ

3.58 MHz/4.43 MHz
VCXO, PAL SW

APC, killer detect,
IDENT detect

C

R-Y, B-Y
modulate

R-Y

LPF

Y

R-Y

Y, R-Y, B-Y
output buffer

NC

B-Y

B-Y

fSC

Note 1

15 pF

3.58 MHz

2.4 kΩ

Killer

0.22 F

µ

f

SC

Y

Y, R-Y, B-Y
input clamp

910
kΩ

RGB output

buffer

R

NTSC/PAL
matrix

R-Y B-Y G-Y

Tint control

R-Y B-Y

Amp. color
control

R-Y B-Y

BG

Contrast

2.2

control

F

µ

20
kΩ

AFC wave
detect

Subcolor
control

0.1
F

µ

VCC

VCC

20 kΩ

Clamp

chroma

Separate/composite switch

V
H

BLK

VCC

1.8 kΩ

1 kΩ

A733

220
pF

Ω

43 kΩ

42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22

Mode
switch

+

+

180
kΩ

220 Ω

1 F

µ

Sync.
separate

V filter

V

H sync.
detect

H

H/V count

H VCO

32 f

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

270 pF

2.2 kΩ

390 pF

330 Ω 4700

pF

500
kHz

2.7 kΩ

Note 2

4.3 kΩ

+

2.2 F

0.22

Killer
detect BLK HD VD

0.1 F

µ

+

22 F

µ

µ

VCC

VCC

22 F

0.22 F

+

µ

0.1
F

µ

µ

F

20 k

µ

0.22
F

µ

20 k
Color control

Ω

0.1

µ

F

Ω

Tint control

0.1
F

µ

C945

68 Ω

C945

68 Ω

C945

68 Ω

PD

10 kΩ

µ

22 F

180 pF

+

16 1514 13 1211 10 9

0.1 F

µ

µ

PD4538B

12345678

470 pF

Delay

5.1 kΩ

10 kΩ

5.1 kΩ

0.22 F

µ

+

470 F

0.22 F

µ

+

470 F

0.22 F

µ

+

470 F

BNC
B-OUT

µ

Vcc

BNC
G-OUT

µ

Vcc

BNC
R-OUT

µ

VCC

µ

PC1830

Vcc

Notes 1. Crystal resonator for load of 16 pF.

4.433 619 MHz (PAL) : DAISHINKU CORP. (Type: HC-49/U)

2. CSB500F23: Murata Mfg. Co.,Ltd.

Example 3 (for PAL limited use)

BNC
SEP-C-IN

75

Ω

150

Ω

75

Ω

BNC
Y-IN

10
kΩ

100 F

75

Ω

SEP-SW

0.01 F

µ

+

27
kΩ

18
kΩ

22
kΩ

µ

VCC

SEP

COMP

VCC

C945

1 k

C945

1 kΩ

VCC

Vcc

10

0.1

kΩ

F

µ

Vcc

+

0.1 F

0.22 F

µ

Separate/composite
switch, ACC amp.
subcolor control

trap

Delay

HD, VD, blanking pulse,
killer output buffer

22
F

µ

µ

C945

1000 pF

chroma

BPF

Y

4.7 F
680

kΩ

1 F

µ

C

Contrast control

0.1
F

µ

+

µ

+

0.01 F

µ

Filter f0
adjust

APC, killer detect,
IDENT detect

C

R-Y, B-Y
modulate

Y

Y, R-Y, B-Y

output buffer

15 pF

4.43
MHz

15 kΩ

820 Ω

470 Ω

3.58 MHz/4.43 MHz
VCXO, PAL SW

f

SC

B-Y

R-Y

LPF

B-Y

R-Y

Note 1

NC

Killer

0.22 F

µ

f

SC

Y

Y, R-Y, B-Y
input clamp

910
kΩ

RGB output

R

NTSC/PAL
matrix

R-Y

Tint control

R-Y

Amp. color
control

R-Y

buffer

B

B-Y G-Y

G

B-Y

B-Y

Contrast

2.2

control

F

µ

20
kΩ

AFC wave
detect

Subcolor
control

0.1
F

µ

VCC

VCC

20 kΩ

Clamp

chroma

Separate/composite switch

V

H

BLK

VCC

1.8 kΩ

1 kΩ

A733

220
pF

Ω

43 kΩ

42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22

Mode
switch

+

+

180
kΩ

220 Ω

1 F

µ

Sync.
separate

V filter

V

H sync.
detect

H

H/V count

H

VCO

32 f

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

270 pF

2.2 kΩ

390 pF

330 Ω 4700

pF

500
kHz

2.7 kΩ

Note 2

4.3 kΩ

+

2.2 F

0.22

Killer
detect BLK HD VD

0.1 F

µ

+

22 F

µ

µ

VCC

VCC

22 F

0.22 F

+

µ

0.1
F

µ

µ

F

20 k

µ

Ω

0.22
F

µ

20 k
Color control

0.1

µ

F

Ω

Tint control

0.1
F

µ

C945

68 Ω

C945

68 Ω

C945

68 Ω

PD

10 kΩ

µ

22 F

180 pF

+

16 1514 13 1211 10 9

0.1 F

µ

µ

PD4538B

12345678

470 pF

Delay

5.1 kΩ

10 kΩ

5.1 kΩ

0.22 F

µ

+

470 F

0.22 F

µ

+

470 F

0.22 F

µ

+

470 F

BNC
B-OUT

µ

Vcc

BNC
G-OUT

µ

Vcc

BNC
R-OUT

µ

VCC

µ

PC1830

Vcc

37

38

Example 4 (When RGB matrix section not used)

Notes 1. Crystal resonator for load of 16 pF.

4.433 619 MHz (PAL) : DAISHINKU CORP. (Type: HC-49/U)

3.579 545 MHz (NTSC) : Toyo Communication Equipment Co., Ltd. (Type: TQC203A-8R)

2. CSB500F23: Murata Mfg. Co.,Ltd.

BNC
SEP-C-IN

75

Ω

150

Ω

75

Ω

BNC
Y-IN

10
kΩ

100 F

75

Ω

VCC

VCC

60 Hz

50 Hz

SEP-SW

18
kΩ

0.01 F

22
kΩ

µ

+

27
kΩ

Mode 3

Mode 1

20 k

20 k

FV

VCC

µ

VCC

Ω

Ω

VCC

SEP

COMP

C945

Ω

1 k

C945

1 kΩ

Mode 2

3.58 MHz
FSC

4.43 MHz

VCC

Vcc

10

0.1

kΩ

F

µ

0.22 F

Vcc

µ

+

0.1 F

22
F

µ

µ

C945

1000 pF

1 F

µ

4.7 F
680

kΩ

0.1
F

µ

+

µ

+

15 kΩ

820 Ω

0.01 F

µ

Note 1

15 pF 15 pF

4.43

3.58 MHz

MHz

470 Ω 2.4 kΩ

0.22 F

µ

1 kΩ

220
pF

VCC

1.8 kΩ

A733

43 kΩ

Subcolor
control

0.1
F

µ

Contrast

+

2.2

control

180
kΩ

220 Ω

+

1 F

µ

VCC

F

µ

VCC

20
kΩ

20 kΩ

42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22

Mode
switch

32 f

H/V count

H VCO

Sync.
separate

H sync.
detect

V filter

H

V

AFC wave
detect

V
H

BLK

Separate/composite
switch, ACC amp.
subcolor control

Clamp

chroma

chroma

trap

Separate/composite switch

BPF

Delay

Y

HD, VD, blanking pulse,
killer output buffer

C

Contrast control

Filter f0
adjust

APC, killer detect,
IDENT detect

C

R-Y, B-Y
modulate

Y, R-Y, B-Y
output buffer

3.58 MHz/4.43 MHz
VCXO, PAL SW

fSC

R-Y B-Y

LPF

R-YY B-Y

Killer

fSC

Y, R-Y, B-Y
input clamp

Y

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

330 Ω 4700

270 pF

2.2 kΩ

390 pF

500
kHz

2.7 kΩ

pF

Note 2

4.3 kΩ

+

2.2 F

Killer
detect BLK HD VD

0.1 F

µ

+

22 F

µ

µ

VCC

R-Y

Y

B-Y

VCC

0.1

µ

F

+

22 F

µ

910
kΩ

RGB output

RBG

NTSC/PAL
matrix

R-Y

Tint control

R-Y

Amp. color
control

R-Y

NC

buffer

B-Y

G-Y

B-Y

B-Y

µ

PC1830

8. OPERATING PRECAUTIONS

8.1 µPC1830 External Components

(1) Resistors

Use E24 series resistors (approximately 5% precision) of 1/4 W or higher.

(2) Capacitors

• Ceramic capacitors of 1000 pF or below

Capacitors used for the time constant circuit. Basically use E12 series (10% precision) ones with the center value
= 0 in nominal temperature characteristic.

• Ceramic capacitors of 1000 pF or higher

Equivalent to capacitors for non-critical time constant circuits and for clamp, and bypass capacitors between power
supply and GND. Use E12 series (10% precision) ones. Use a type whose capacitance is not extremely affected
by temperature variations (ie. with an excellent temperature characteristic).

µ

PC1830

• Electrolytic capacitors

Use E6 series (20% precision) ones. Use ones whose capacitance is not extremely affected by temperature
variations (ie. with an excellent temperature characteristic).

(3) Crystal resonators

Use crystal resonators of 16 pF load type as shown below.

• For PAL : 4.433 619 MHz (model name: HC-49/U, manufactured by Kinseki, Ltd.)

• For NTSC : 3.579 545 MHz (model name: TQC203A-8R (HC-49/U-10 type), manufactured by Toyo
Communication Equipment Co., Ltd.)

Note that use of crystal resonators other than the above may deteriorate electrical characteristics.

(4) Ceramic resonators

Use ceramic resonators as shown below.

• CSB500 F23 (manufactured by Murata Mfg. Co., Ltd.)

Note that use of ceramic resonators other than the above may deteriorate mainly electrical characteristics of the sync.
section.

39

8.2 µPC1830 Pattern Wiring

(1) GND line

Solid grounding should be applied to three GNDs: synchronous section GND (pin 5), video section GND (pin 15) and
chroma section GND (pin 33). They should not be connected to other digital GNDs except the one point of origin.
Use thick connection (thick through hole) for each GND pin of the IC.
When an emitter follower circuit, amplifier, etc. is connected to the color difference output stage or RGB output stage,
separate the solid ground of the output stage from that of the IC output stage.

(2) Power supply line

The three analog power supplies, synchronous section power supply (pin 7), video section power supply (pin 17) and
chroma section power supply (pin 35) should be independent of each other and unified at the supply source. Ensure
that there is no unnecessary routing.
Separate the digital section power supply from the analog section power supply and connect them only at one point.

(3) Signal line

In order to avoid signal cross talk, ensure that the color difference signal line (pins 12, 13, and 14) and RGB signal
line (pins 23, 24, and 25) are not placed close to or in parallel with the digital signal line or HD (pin 10), VD (pin 11)
and BLK (pin 9) lines, or cross those lines.

µ

PC1830

(4) Placement of peripheral components of each pin

Place components which are connected with pins 1, 2, 5, 7, 15, 16, 17, 18, 19, 23, 24, 25, 28, 29, 33, 34, and 35 close
to the IC. When the placed components are connected to the power supply line or other lines, route low-impedance
lines and make sure that the thickest possible lines are used for connection with the IC pins.

40

9. PACKAGE DRAWING

42 PIN PLASTIC SHRINK SOP (375 mil)

42 22

detail of lead end

3°

+7°

–

3°

µ

PC1830

121

A

G

F

E

C

D

M

M

N

NOTE

Each lead centerline is located within 0.10
mm (0.004 inch) of its true position (T.P.) at
maximum material condition.

H

I

K

B

L

S42GT-80-375B-1

ITEM MILLIMETERS INCHES

A
B
C
D
E
F

G

H

I
J
K
L

M

N

18.16 MAX.

1.13 MAX.

0.8 (T.P.)

+0.10

0.35

–0.05

0.125±0.075

2.9 MAX.

2.5±0.2

10.3±0.3

7.15±0.2

1.6±0.2

+0.10

0.15

–0.05

0.8±0.2

0.10

0.10 0.004

0.715 MAX.

0.044 MAX.

0.031 (T.P.)

+0.004

0.014

–0.003

0.005±0.003

0.115 MAX.

+0.009

0.098

–0.008
+0.012

0.406

–0.013

+0.009

0.281

–0.008

0.063±0.008

+0.004

0.006

–0.002
+0.009

0.031

–0.008

0.004

J

41

µ

PC1830

10. RECOMMENDED SOLDERING CONDITIONS

When soldering this product, it is highly recommended to observe the conditions as shown below. If other
soldering processes are used, or if the soldering is performed under different conditions, please make sure to
consult with our sales offices.

For more details, refer to our document “SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL”

(C10535E).

Surface Mount Device

µ

PC1830GT: 42-pin plastic shrink SOP (375 mil)

Process Conditions Symbol

Infrared ray reflow Peak temperature: 235 °C or below (Package surface temperature), IR35-00-2

Reflow time: 30 seconds or less (at 210 °C or higher),
Maximum number of reflow processes: 2 times.

Vapor phase soldering Peak temperature: 215 °C or below (Package surface temperature), VP15-00-2

Reflow time: 40 seconds or less (at 200 °C or higher),
Maximum number of reflow processes: 2 times.

Partial heating method Pin temperature: 300 °C or below, —

Heat time: 3 seconds or less (Per each side of the device).

Caution Apply only one kind of soldering condition to a device, except for “partial heating method”, or the

device will be damaged by heat stress.

42

[MEMO]

µ

PC1830

43

µ

PC1830

[MEMO]

The application circuits and their parameters are for reference only and are not intended for use in actual design-ins.

No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.

Standard: Computers, office equipment, communications equipment, test and measurement equipment,

audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots

Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster

systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)

Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life

support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
Anti-radioactive design is not implemented in this product.

M4 96.5