Datasheet TEA6324T Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TEA6324T

Sound control circuit

Preliminary specification
File under Integrated Circuits, IC01

1997 Mar 13

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

FEATURES

• Source selector for two stereo and one mono inputs

• Interface for noise reduction circuits

• Interface for external equalizer

• Volume and balance control

• Bass control with equalizer filters

• Treble control

• Mute control at audio signal zero crossing

• Fast mute control via I2C-bus

• Fast mute control via pin

2

C-bus control for all functions

• I

• Power supply with internal power-on reset.

QUICK REFERENCE DATA

GENERAL DESCRIPTION

The sound control circuit TEA6324T is an I

2

C-bus
controlled stereo preamplifier for car radio hi-fi sound
applications.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

I

CC

V

o(rms)

G

v

G

step(vol)

G

bass

G

treble

G

step(treble)

(S+N)/N signal-plus-noise to noise ratio V

supply voltage 7.5 8.5 9.5 V
supply current VCC= 8.5 V − 26 − mA
maximum output voltage level VCC= 8.5 V; THD ≤ 0.1% − 2000 − mV
voltage gain −86 − +20 dB
step resolution (volume) − 1 − dB
bass control −18 − +18 dB
treble control −12 − +12 dB
step resolution (treble) − 1.5 − dB

= 2.0 V; Gv= 0 dB;

o

− 105 − dB

unweighted

RR

100

ripple rejection V

< 200 mV; f = 100 Hz;

r(rms)

− 75 − dB

Gv=0dB

α

cs

channel separation 250 Hz ≤ f ≤ 10 kHz; Gv=0dB 90 96 − dB

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

TEA6324T SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1

1997 Mar 13 2

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

BLOCK DIAGRAM

SDA

MUTE

3

TEA6324T

m

C

MUTE

FUNCTION

DETECTOR

ZERO CROSS

BALANCE

VOLUME II

0 to −55 dB

OUTPUT LEFT

SCL

24

1

C-BUS

2

I

RECEIVER

22

BALANCE

VOLUME II

0 to −55 dB

OUTPUT RIGHT

MGK105

handbook, full pagewidth

5.6 nF 10 nF

3.4 kΩ

C

270 nF 270 nF

220 nF

KVL

495678

POWER

SUPPLY

16

23

2

ref

V

CC

V

100 µF

15

47 µF

LEFT

±12 dB

TREBLE

LEFT

BASS

±18 dB

LEFT

VOLUME I

+20 to −31 dB

12

5 × 220 nF

5.6 nF

RIGHT

±12 dB

TREBLE

3.4 kΩ

LOGIC

BASS

RIGHT

±18 dB

270 nF

19

270 nF

Fig.1 Block diagram.

RIGHT

VOLUME I

+20 to −31 dB

17 18 20 21

SOURCE

SELECTOR

10

14

11

13

KIN

C

220 nF

KVL

C

left

input

GND

source

1997 Mar 13 3

input

mono

source

input

right

source

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

PINNING

SYMBOL PIN DESCRIPTION

2

2

C-bus)

C-bus)

handbook, halfpage

SDA

1

GND

2

OUTL

3

TL

4

B2L

5

B1L

6

IVL

QSL

MUTE

IMO

IBL
IAL

TEA6324T

7
8

9
10
11
12

MGK104

Fig.2 Pin configuration.

SCL

24

V

23

CC

OUTR

22

TR

21

B2R

20
19

B1R
IVR

18
17

QSR
V

16

ref

CAP

15

IBR

14

IAR

13

SDA 1 serial data input/output (I
GND 2 ground
OUTL 3 output left
TL 4 treble control capacitor left channel

or input from an external equalizer

B2L 5 bass control left channel or output to

an external equalizer
B1L 6 bass control, left channel
IVL 7 input volume I, left control part
QSL 8 output source selector, left channel
MUTE 9 mute control
IMO 10 input mono source
IBL 11 input B left source
IAL 12 input A left source
IAR 13 input A right source
IBR 14 input B right source
CAP 15 electronic filtering for supply
V

ref

16 reference voltage (0.5VCC)
QSR 17 output source selector right channel
IVR 18 input volume I, right control part
B1R 19 bass control right channel
B2R 20 bass control right channel or output

to an external equalizer

TR 21 treble control capacitor right channel

or input from an external equalizer
OUTR 22 output right
V

CC

23 supply voltage

SCL 24 serial clock input (I

1997 Mar 13 4

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

2

FUNCTIONAL DESCRIPTION

The source selector selects one of 2 stereo inputs or the
mono input. The maximum input signal voltage is
V

= 2 V. The outputs of the source selector and the

i(rms)

inputs of the following volume control parts are available at
pins 7 and 8 for the left channel and pins 17 and 18 for the
right channel. This offers the possibility of interfacing a
noise reduction system.

The volume control function is split into two sections:
volume I control block and volume II control block.

The control range of volume I is between +20 dB and

−31 dB in steps of 1 dB. The volume II control range is
between 0 dB and −55 dB in steps of 1 dB.
The recommended control range to be used is 86 dB
(+20 to −66 dB) although in theory, a range of 106 dB
(+20 to −86 dB) can be attained. The gain/attenuation
setting of the volume I control block is common for both
channels.

The volume I control block is followed by the bass control
block. The frequency response of the bass control (see
Fig.3) is provided for each channel by an external filter in
combination with internal resistors. The adjustable range
is between −18 and +18 dB in steps of 1.8 dB at 46 Hz.

The treble control block offers a control range between

−12 and +12 dB in steps of 1.5 dB at 15 kHz. The filter
characteristic is determined by a single capacitor of 5.6 nF
for each channel in combination with internal resistors
(see Fig.4).

The basic step width of treble control is 3 dB.
The intermediate steps are obtained by switching 1.5 dB
boost and 1.5 dB attenuation steps.

The bass and treble control functions can be switched off

2

C-bus. In this event the internal signal flow is

via I
disconnected. The connections B2L and B2R are outputs
and TL and TR are inputs for inserting an external
equalizer.

The last section of the circuit is the volume II block.
The balance function uses the same control block. This is
achieved by 2 independently controllable attenuators, one
for each output. The control range of these attenuators is
55 dB in steps of 1 dB with an additional mute step.

The circuit provides 3 mute modes:

1. Zero crossing mode mute via I2C-bus using
2 independent zero crossing detectors (ZCM,
see Tables 2 and 8 and Fig.15)

2. Fast mute via MUTE pin (see Fig.9)

3. Fast mute via I
see Tables 2 and 8) or volume II block setting
(see Table 4).

The mute function is performed immediately if ZCM is
cleared (ZCM = 0). If the bit is set (ZCM = 1) the mute is
activated after changing the GMU bit. The actual mute
switching is delayed until the next zero crossing of the
audio frequency signal. Two comparators are built-in to
provide independent mute switches to control each of the
audio channels (left and right).

To avoid a large delay of mute switching when very low
frequencies are processed, the maximum delay time is
limited to typically 100 ms by an integrated timing circuit
and an external capacitor (Cm= 10 nF, see Fig.9). This
timing circuit is triggered by reception of a new data word
for the switch function which includes the GMU bit. After a
discharge and charge period of an external capacitor the
muting switch follows the GMU bit, only if no zero crossing
was detected during that time.

The mute function can also be controlled externally (see
Fig.9). If the mute pin is switched to ground all outputs are
muted immediately (hardware mute). This mute request
overwrites all mute controls via the I2C-bus for the time the
pin is held LOW. The hardware mute position is not stored
in the TEA6324T.

Typically, the turn on/off can be used to avoid AF output.
This can be caused by the input signal from preceding
stages, which may produce output during a drop of VCC.
To avoid this, the mute must be set prior to a VCC drop and
can be achieved either by I2C-bus control, or by grounding
the MUTE pin.

In cases where there is no mute in the application before
turn off, a supply voltage drop of more than 1 × VBE will
result in a mute during the voltage drop.

The power supply should include a VCC buffer capacitor,
which provides a discharging time constant. If the input
signal does not disappear after turn off the input will
become audible after a certain time. A 4.7 kΩ resistor
discharges the VCC buffer capacitor, because the internal
current of the IC does not discharge it completely.

The hardware mute function is ideal for use in Radio Data
System (RDS) applications. The zero crossing mute
avoids modulation plops. This feature is an advantage for
mute during changing presets and/or sources (e.g. traffic
announcement during cassette playback).

C-bus either by general mute (GMU,

1997 Mar 13 5

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CC

V

n

T

amb

T

stg

V

es

Note

1. Human body model: C = 100 pF; R = 1.5 kΩ; V ≥ 2 kV. Machine model: C = 200 pF; R = 0 Ω; V ≥ 500 V.

supply voltage 0 10 V
voltage at all pins relative to pin 2 0 V

CC

V
operating ambient temperature −40 +85 °C
storage temperature −65 +150 °C
electrostatic handling note 1 −−

1997 Mar 13 6

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

CHARACTERISTICS

VCC= 8.5 V; RS= 600 Ω; RL=10kΩ; CL= 2.5 nF; AC coupled; f = 1 kHz; T
linear; treble linear; balance in mid position; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

I

CC

V

DC

supply voltage 7.5 8.5 9.5 V
supply current − 26 33 mA
internal DC voltage at inputs and

outputs
V
G
V

ref

o(rms)

v(max)

internal reference voltage at pin 16 − 4.25 − V

maximum voltage gain RS=0Ω; RL= ∞ 19 20 21 dB

output voltage level (RMS value) for

at the power output stage THD ≤ 0.1%; see Fig.10 − 2000 − mV

P

max

start of clipping THD = 1% 2300 −−mV

=2kΩ; CL= 10 nF;

R

L

THD = 1%
V
f

ro

i(rms)

input sensitivity Vo= 2000 mV; Gv=20dB − 200 − mV
roll-off frequency C

= 220 nF;

KIN

C

= 220 nF; Zi=Z

KVL

low frequency (−1 dB) 60 −−Hz
low frequency (−3 dB) 30 −−Hz
high frequency (−1 dB) 20000 −−Hz

= 470 nF;

C

KIN

C

= 100 nF; Zi=Z

KVL

low frequency (−3 dB)

α

cs

channel separation Vi= 2 V; frequency range

250 Hz to 10 kHz
THD total harmonic distortion frequency range

20 Hz to 12.5 kHz

= 100 mV; Gv=20dB − 0.1 − %

V

i

V

= 1 V; Gv=0dB − 0.05 0.15 %

i

= 2 V; Gv=0dB − 0.1 − %

V

i

= 2 V; Gv= −10 dB − 0.1 − %

V

i

RR ripple rejection V

r(rms)

< 200 mV
f = 100 Hz 70 76 − dB
f = 40 Hz to 12.5 kHz − 66 − dB

(S+N)/N signal-plus-noise to noise ratio unweighted;

20 Hz to 20 kHz RMS;

= 2.0 V; see Figs 5 and 6

V

o

CCIR468-2 weighted; quasi
peak; V

= 2.0 V

o

=0dB − 95 − dB

G

v

=12dB − 88 − dB

G

v

=20dB − 81 − dB

G

v

=25°C; gain control Gv= 0 dB; bass

amb

3.83 4.25 4.68 V

2000 −−mV

i(min)

17 −−Hz

i(typ)

90 96 − dB

− 105 − dB

1997 Mar 13 7

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

P

no(rms)

α

ct

Source selector

Z

i

α

S

V

i(rms)

V

offset

Z

o

R

L

C

L

G

v

Control part (source selector disconnected; source resistance 600 Ω)

Z

i

Z

o

R

L

C

L

R

DCL

V

i(rms)

V

n(o)

CR

tot

G

step

∆G

a

∆G

t

α

mute

noise output power (RMS value) only

mute position; note 1 −− 10 nW
contribution of TEA6324T; power
amplifier for 6 W

crosstalk between bus inputs and
signal outputs





20

V

bus p p–()

-------------------------- -log
V

o rms()

note 2 − 110 − dB

input impedance 25 35 45 kΩ
input isolation of one selected source

to any other input

f = 1 kHz − 105 − dB
f = 12.5 kHz − 95 − dB

maximum input voltage (RMS value) THD < 0.5%; VCC= 8.5 V − 2.15 − V

THD < 0.5%; V

DC offset voltage at source selector

= 7.5 V − 1.8 − V

CC

−− 10 mV

output by selection of any inputs
output impedance − 80 120 Ω
output load resistance 10 −−kΩ
output load capacity 0 − 2500 pF
voltage gain, source selector − 0 − dB

input impedance volume input 100 150 200 kΩ
output impedance − 80 120 Ω
output load resistance 2 −−kΩ
output load capacity 0 − 10 nF
DC load resistance at output to ground 4.7 −−kΩ
maximum input voltage (RMS value) THD < 0.5% − 2.15 − V
noise output voltage CCIR468-2 weighted; quasi

peak

=20dB − 110 220 µV

G

v

=0dB − 33 50 µV

G

v

G

= −66 dB − 13 22 µV

v

mute position − 10 −µV
total continuous control range − 106 − dB
recommended control range − 86 − dB
step resolution − 1 − dB
step error between any adjoining step −− 0.5 dB
attenuator set error Gv= +20 to −50 dB −− 2dB

=−51 to −66 dB −− 3dB

G

v

gain tracking error Gv= +20 to −50 dB −− 2dB
mute attenuation see Fig.9 100 110 − dB

1997 Mar 13 8

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

offset

Volume I control

CR

tot(vol)1

G

v

G

step

Bass control

G

bass

G

step

V

offset

Treble control

G

treble

G

step

V

offset

Volume II and balance control

CR

tot(vol)2

G

step

DC step offset between any adjoining
step

DC step offset between any step to

Gv=0to−66 dB − 0.2 10 mV

=20to0dB − 215mV

G

v

=0to−66 dB −− 10 mV

G

v

mute

continuous volume control range − 51 − dB
voltage gain −31 − +20 dB
step resolution − 1 − dB

bass control, maximum boost f = 46 Hz 16 18 19 dB
maximum attenuation f = 46 Hz 16 18 19 dB
step resolution (toggle switching) f = 46 Hz − 1.8 − dB
step error between any adjoining step f = 46 Hz −− 0.5 dB
DC step offset in any bass position −− 25 mV

treble control, maximum boost f = 15 kHz 11 12 13 dB
maximum attenuation f = 15 kHz 11 12 13 dB
maximum boost f > 15 kHz −− 15 dB
step resolution (toggle switching) f = 15 kHz − 1.5 − dB
step error between any adjoining step f = 15 kHz −− 0.5 dB
DC step offset in any treble position −− 10 mV

continuous attenuation of volume

53.5 55 56.5 dB

control range
step resolution − 12dB
attenuation set error −− 1.5 dB

Mute function (see Fig.9)
HARDWARE MUTE

V

sw

mute switch level (2 × VBE) − 1.45 − V

mute active

V

swLOW

I

i

input level −− 1.0 V
input current V

swLOW

mute passive: level internally defined

V

swHIGH

t

d(mute)

saturation voltage −− VCCV
delay until mute passive −− 0.5 ms

ZERO CROSSING MUTE
I

dch

I

ch

V

swDEL

discharge current 0.3 0.6 1.2 µA
charge current −300 −150 −µA
delay switch level (3 × VBE) − 2.2 − V

1997 Mar 13 9

=1V −300 −−µA

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

t

d

V

(w)

Muting at power supply drop

V

CCdrop

Power-on reset when reset is active the GMU-bit (general mute) is set and the I
position

V

CC

Digital part (I

V

IH

V

IL

I

IH

I

IL

V

OL

Notes to the characteristics

1. The indicated values for output power assume a 6 W power amplifier at 4 Ω with 20 dB gain and a fixed attenuator
of 12 dB in front of it. Signal-to-noise ratios exclude noise contribution of the power amplifier.

2. The transmission contains: total initialization with MAD and subaddress for volume and 8 data words, see also
definition of characteristics, clock frequency = 50 kHz, repetition burst rate = 400 Hz, maximum bus signal
amplitude = 5 V (p-p).

3. The AC characteristics are in accordance with the I2C-bus specification. This specification,

use it”

delay time Cm=10nF − 100 − ms
window for audio signal zero crossing

− 30 40 mV

detection

supply drop for mute active − V23− 0.7 − V

2

C-bus receiver is in reset

increasing supply voltage start of reset −− 2.5 V
end of reset 5.2 6.5 7.2 V
decreasing supply voltage start of

4.2 5.5 6.2 V

reset

2

C-bus pins); note 3

HIGH-level input voltage 3 − 9.5 V
LOW-level input voltage −0.3 − +1.5 V
HIGH-level input current −10 − +10 µA
LOW-level input current −10 − +10 µA
LOW-level output voltage IL=3mA −− 0.4 V

“The I2C-bus and how to

, can be ordered using the code 9398 393 40011.

1997 Mar 13 10

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

I2C-BUS PROTOCOL

2

C-bus format

I

(1)

S

SLAVE ADDRESS

Notes

1. S = START condition.

2. SLAVE ADDRESS (MAD) = 0101 0000.

3. A = acknowledge, generated by the slave.

4. SUBADDRESS (SAD), see Table 1.

5. DATA, see Table 1.

6. P = STOP condition.

Table 1 Second byte after MAD

(2)

(3)

A

SUBADDRESS

(4)

(3)

A

DATA

(5)

(3)

A

(6)

P

FUNCTION BIT

765432

(1)

(1)

1

(1)

0

Volume V 00000000
Output right OUTR 00000001
Output left OUTL 00000010
No function − 00000011
No function − 00000100
Bass BA 00000101
Treble TR 00000110
Switch S 00000111

Note

1. Significant subaddress.

MSB LSB

1997 Mar 13 11

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

Table 2 Definition of third byte after MAD and SAD

FUNCTION BIT

MSB LSB

76543210

Volume V ZCM
Output right OUTR X
Output left OUTL X
No function − X
No function − X
Bass BA X
Treble TR X
Switch S GMU

(1)
(3)
(3)
(3)
(3)
(3)
(3)

(8)

1V5

(3)

X

(3)

X

(3)

X

(3)

X

(3)

X

(3)

X

(3)

X

Notes

1. Zero crossing mode.

2. Volume control.

3. Don’t care bits (logic 1 during testing).

4. Output right.

5. Output left.

6. Bass control.

7. Treble control.

8. Mute control for all outputs (general mute).

9. Source selector control.

(2)

OUTR5
OUTL5

(3)

X

(3)

X

(3)

X

(3)

X

(3)

X

(4)

(5)

(2)

V4
OUTR4
OUTL4

(3)

X

(3)

X
BA4
TR4

(3)

X

(6)
(7)

(4)

(5)

(2)

V3

OUTR3

OUTL3

(3)

X

(3)

X
BA3
TR3

(3)

X

(6)
(7)

(4)

(5)

(2)

V2
OUTR2
OUTL2

(3)

X

(3)

X
BA2
TR2

SC2

(6)
(7)
(9)

(4)

(5)

(2)

V1
OUTR1
OUTL1

(3)

X

(3)

X
BA1
TR1
SC1

(6)
(7)
(9)

(4)

(5)

(2)

V0

OUTR0

OUTL0

(3)

X

(3)

X
BA0
TR0
SC0

(4)

(5)

(6)
(7)
(9)

1997 Mar 13 12

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

Table 3 Volume I setting

G

v

(dB)

[phone]
[phone]
[phone]
[phone]
[phone]
[phone]
[phone]
[phone]
[phone]
[phone]
[phone]

+9 110100
+8 110011
+7 110010
+6 110001
+5 110000
+4 101111
+3 101110
+2 101101
+1 101100

0 101011

−1 101010

−2 101001

−3 101000

−4 100111

−5 100110

−6 100101

−7 100100

−8 100011

−9 100010

−10 100001

−11 100000

−12 011111

−13 011110

−14 011101

−15 011100

−16 011011

−17 011010

V5 V4 V3 V2 V1 V0

DATA

1997 Mar 13 13

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

G

v

(dB)

−18 011001

−19 011000

−20 010111

−21 010110

−22 010101

−23 010100

−24 010011

−25 010010

−26 010001

−27 010000

−28 001111

−29 001110

−30 001101

−31 001100

Repetition of steps in a range from −28 dB to −31 dB

−28 001011

−29 001010

−30 001001

−31 001000

−28 000111

−29 000110

−30 000101

−31 000100

−28 000011

−29 000010

−30 000001

−31 000000

V5 V4 V3 V2 V1 V0

DATA

1997 Mar 13 14

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

Table 4 Volume II setting; note 1

DATA

G

v

(dB)

0 111111

−1 111110

−2 111101

−3 111100

−4 111011

−5 111010

−6 111001

−7 111000

−8 110111

−9 110110

−10 110101

−11 110100

−12 110011

−13 110010

−14 110001

−15 110000

−16 101111

−17 101110

−18 101101

−19 101100

−20 101011

−21 101010

−22 101001

−23 101000

−24 100111

−25 100110

−26 100101

−27 100100

−28 100011

−29 100010

−30 100001

−31 100000

−32 011111

−33 011110

−34 011101

−35 011100

−36 011011

OUTL5 OUTL4 OUTL3 OUTL2 OUTL1 OUTL0
OUTR5 OUTR4 OUTR3 OUTR2 OUTR1 OUTR0

1997 Mar 13 15

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

DATA

G

v

(dB)

−37 011010

−38 011001

−39 011000

−40 010111

−41 010110

−42 010101

−43 010100

−44 010011

−45 010010

−46 010001

−47 010000

−48 001111

−49 001110

−50 001101

−51 001100

−52 001011

−53 001010

−54 001001

−55 001000

Mute 0 0 0 1 1 1
Mute 0 0 0 1 1 0
Mute 0 0 0 1 0 1
Mute 0 0 0 1 0 0
Mute 0 0 0 0 1 1
Mute 0 0 0 0 1 0
Mute 0 0 0 0 0 1
Mute 0 0 0 0 0 0

OUTL5 OUTL4 OUTL3 OUTL2 OUTL1 OUTL0
OUTR5 OUTR4 OUTR3 OUTR2 OUTR1 OUTR0

Note

1. For a particular range the data is always the same, only the subaddress changes.

1997 Mar 13 16

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

Table 5 Bass setting

G

bass

(dB)

BA4 BA3 BA2 BA1 BA0

DATA

+18.0 11111
+16.2 11110
+18.0 11101
+16.2 11100
+18.0 11011
+16.2 11010
+14.4 11001
+12.6 11000
+10.8 10111
+9.0 10110
+7.2 10101
+5.4 10100
+3.6 10011
+1.8 10010

(1)

0

(2)

0

10001
10000

−1.8 01111

−3.6 01110

−5.4 01101

−7.2 01100

−9.0 01011

−10.8 01010

−12.6 01001

−14.4 01000

−16.2 00111

−18.0 00110

−16.2 00101

−18.0 00100

Note 3 00011
Note 3 00010
Note 3 00001

Notes 3 and 4 00000

Notes

1. Recommended data word for step 0 dB.

2. Result of 1.8 dB boost and 1.8 dB attenuation.

3. The last four bass control data words mute the bass response.

4. The last bass control and treble control data words (00000) enable the external equalizer connection.

1997 Mar 13 17

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

Table 6 Treble setting

G

(dB)

treble

TR4 TR3 TR2 TR1 TR0

DATA

+12.0 11111
+10.5 11110
+12.0 11101
+10.5 11100
+12.0 11011
+10.5 11010
+12.0 11001
+10.5 11000
+9.0 10111
+7.5 10110
+6.0 10101
+4.5 10100
+3.0 10011
+1.5 10010

(1)

0

(2)

0

10001
10000

−1.5 01111

−3.0 01110

−4.5 01101

−6.0 01100

−7.5 01011

−9.0 01010

−10.5 01001

−12.0 01000

Note 3 00111
Note 3 00110
Note 3 00101
Note 3 00100
Note 3 00011
Note 3 00010
Note 3 00001

Notes 3 and 4 00000

Notes

1. Recommended data word for step 0 dB.

2. Result of 1.5 dB boost and 1.5 dB attenuation.

3. The last eight treble control data words select treble output.

4. The last treble control and bass control data words (00000) enable the external equalizer connection.

1997 Mar 13 18

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

Table 7 Selected input

FUNCTION

SC2 SC1 SC0

Stereo inputs IAL and IAR 1 1 1
Stereo inputs IBL and IBR 1 1 0
No function 1 0 1
No function 1 0 0
Mono input IMO 0 X

Note

1. X = don’t care bits (logic 1 during testing).

DATA

(1)

Table 8 Mute mode

FUNCTION

Direct mute off 0 0
Mute off delayed until the next zero

crossing
Direct mute 1 0

(1)

X

Mute delayed until the next zero
crossing

DATA

GMU ZCM

01

11

1997 Mar 13 19

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

20

handbook, full pagewidth

G

bass

(dB)

10

0

−10

−20

10

MED840

2

10

3

10

f (Hz)

4

10

Fig.3 Bass control.

15

handbook, full pagewidth

G

treble
(dB)

10

5

0

−5

−10

−15

10

32

10

Fig.4 Treble control.

1997 Mar 13 20

MED424

4

10

f (Hz)

5

10

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

100

handbook, full pagewidth

S/N

(dB)



90

80

70

60

50

−4

10

(1) Vi= 2.0V.
(2) Vi= 0.5V.
(3) Vi= 0.2V.

−3

10

−2

10

−1

10

1

Fig.5 Signal-to-noise ratio; noise weighted: CCIR468-2, quasi peak.

MED426

(1)

(2)
(3)

Po (W)

10

110

handbook, full pagewidth

S/N

(dB)



100

90

80

70

60

−4

10

(1) Unweighted RMS.
(2) CCIR468-2 RMS.
(3) CCIR468-2 quasi peak.

−3

10

−2

10

Fig.6 Signal-to-noise ratio; Vi= 2 V; P

MED427

(1)

(2)

(3)

−1

10

=6W.

max

1

Po (W)

10

1997 Mar 13 21

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

200

handbook, full pagewidth

noise

(µV)

150

100

50

0

−70 −50 −30 −10 10

Stereo/mono inputs.

Fig.7 Noise output voltage; CCIR468-2, quasi peak.

gain (dB)

MHA594

30

−60

handbook, full pagewidth

(dB)

−80

−100

−120

−140

MED429

2

10

3

10

2 x 10

3

5 x 10

3

4

10

f (Hz)

2 x 10

45020 500200

Fig.8 Muting.

1997 Mar 13 22

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

handbook, full pagewidth

delay switch

mute switch

level

level

hardware mute switchMUTE (pin 9)

Ich = −150 µA

TEA6324T

U

(V)

V

CC

8.5

(1)



2.2

(2)

1.45



zero crossing

mute start

t

d(mute) = 0.5 ms delay until

100 ms

I

= 0.6 µA

dch

mute passive

end of delay hard muteonhard mute

Cm = 10 nF

off

I

(µA)

0

−150

MHA595

t (ms)

(1) Typically 2.2 V; referenced to 3 × VBE.
(2) Typically 1.5 V; referenced to 2 × VBE.

Fig.9 Mute function diagram.

1997 Mar 13 23

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

In cases where at the maximum volume position the 20 dB gain is not needed, it is recommended that the maximum
boost gain should be used. This coupled with increased attenuation in the last section (volume II), results in a lower noise
and offset voltage.

handbook, halfpage

= 200 mV

i(min)

handbook, halfpage

= 200 mV

i(min)

TEA6324T

TEA6324T

Vo = 2 V for P

a.

Vo = 1 V for P

POWER STAGE

G = 20 dB

P

= 100 W at 4 ΩV

(max)

(max)

POWER STAGE

G = 26 dB

P

= 100 W at 4 ΩV

(max)

(max)

MHA596

MHA597

b.

a. Gain volume I = 20 dB (G
b. Gain volume I = 20 dB (G

); gain volume II = 0 dB; control range = 55 dB.

v(max)

); gain volume II = −6 dB global setting; control range now 49 dB, previously 55 dB.

v(max)

Fig.10 Level diagram.

1997 Mar 13 24

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

V

handbook, full pagewidth

P



V

CC

4.7 kΩ

8.5 V

inputs

5 × 220 nF 2 × 4.7 µF

5 × 600 Ω

470 µF

13
11
14

TEA6324T

10
12

21516

µF

23

3

22

47

100

µF

+8.5 V to

oscilloscope

outputs to
oscilloscope

2 × 10 kΩ

MHA598

10

handbook, full pagewidth

(V)

8

6

4

2

0

01234

(1) VCC.
(2) VO.

Fig.11 Turn-on/off power supply circuit diagram.

(1)

(2)

t (s)

MED433

5

Fig.12 Turn-on/off behaviour.

1997 Mar 13 25

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

3.4 kΩ

handbook, full pagewidth

10 kΩ

V

P

VCC = 8.5 V

1000

µF

0.2 V

(RMS)

600 Ω

100 µF

0.1 µF

47 µF

220 nF

220 nF

8

16

23

2

15

input A and B
left and right
and input mono

17 18 19 20 21

270 nF

76 5

270 nF

TEA6324T

5.6
nF

49

output right

output left

24

1

10
nF

MHA599

4.7 µF

SCL
SDA

V

O

handbook, full pagewidth

5.6 nF

220 nF

270 nF

270 nF

3.4 kΩ

Fig.13 Test circuit for power supply ripple rejection (RR).

3.4 kΩ

270 nF

76 5

270 nF

5.6

TEA6324T

nF

49

output right

output left

24

VCC = 8.5 V

470

µF

V

P

V

i

600 Ω

100 µF

0.1 µF

47 µF

220 nF

220 nF

220 nF

8

16

23

2

15

input A and B
right and left

input A and B
left and right
and input mono

17 18 19 20 21

10
nF

1

4.7 µF

MHA600

SCL
SDA

V

O

220 nF

270 nF

Fig.14 Test circuit for channel separation (αcs).

1997 Mar 13 26

5.6 nF

270 nF

3.4 kΩ

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

Selection of input signals by using the zero crossing mute mode

The zero cross mute mode provides for a selection of input
sources (A and B) for both left and right channels.
The following example (see Fig.15), shows a typical
selection for the left input source signals IAL and IBL.
The initial selection of these channels produces a
modulation click. The click is determined by the difference
of the signal values at the time of switching.

At t

the maximum possible difference between signals is

1

7 V (p-p) (see Fig.15) and gives a large click. Using the
cross detector no modulation click is audible.

With the selection enabled at t1, the microcontroller sets
the zero cross bit (ZCM = 1) and then the mute bit
(GMU = 1) via the I2C-bus. The output signal follows the
input A signal from −4 V, until the next zero crossing
occurs and then activates mute.

handbook, full pagewidth

V

4
3

After a fixed delay time at t

, the microcontroller sends the

2

bits for input switching and mute inactive.
The output signal remains muted until the next signal zero

crossing of input B (IBL) occurs, and then follows that
signal up to 3 V.

With a delay time of 40 ms (t2− t1), the external capacitor
Cm= 3.3 nF. This results with the zero cross function
operating at the lowest frequency of 40 Hz determined by
the Cm capacitor.

MED436

(1)

(1) Input A (IAL).
(2) Output.
(3) Input B (IBL).

2
1
0

−1

−2

−3

−4

t

1

t

(2)

2

(3)

t

Fig.15 Zero cross function; only one channel shown.

1997 Mar 13 27

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

INTERNAL PIN CONFIGURATIONS

Values shown in Figs 16 to 27 are typical DC values; VCC= 8.5 V.

3

+

1

5 V

1.8 kΩ

80 Ω

MBE911

4.25 V

Fig.16 Pin 1: SDA (I2C-bus data).

4

4.25 V

+

2.4 kΩ

MHA601

MBE912

Fig.17 Pins 3 and 22: output signals.

+

5

4.25 V

80 Ω

MHA602

Fig.18 Pins 4 and 21: treble control capacitors.

1997 Mar 13 28

Fig.19 Pins 5 and 20: bass control capacitor

outputs.

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

6

4.25 V

3.52
kΩ

+

MHA603

Fig.20 Pins 6 and 19: bass control capacitor

inputs.

+

8

4.25 V

7

4.25 V

+

150 kΩ

4.25 V

MHA604

Fig.21 Pins 7 and 18: input volume 1, control part.

+

1.3 kΩ

9

8.5 V

80 Ω

MHA605

Fig.22 Pins 8 and 17: output source selector.

1997 Mar 13 29

maximum

200 µA

0.6 µA



constant

4.5 kΩ

Fig.23 Pin 9: mute control.

MHA606

constant

2.2 V

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

+

10

4.25 V

+

35 kΩ

4.25 V

Fig.24 Pins 10 to 14: inputs.

MHA607

4.25 V
16

4.7 kΩ
300 Ω

+

3.4
kΩ

3.4
kΩ

MHA608

15

5 kΩ

8.5 V

Fig.25 Pin 15: filtering for supply; pin 16: reference

voltage.

apply +8.5 V

23

to this pin

MHA609

Fig.26 Pin 23: supply voltage.

1997 Mar 13 30

24

5 V

1.8 kΩ

MHA610

Fig.27 Pin 24: SCL (I2C-bus clock).

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

PACKAGE OUTLINE

SO24: plastic small outline package; 24 leads; body width 7.5 mm

D

c

y

Z

24

pin 1 index

1

e

13

12

w M

b

p

SOT137-1

E

H

E

Q

A

2

A

1

L

p

L

detail X

(A )

A

X

v M

A

A

3

θ

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

OUTLINE

VERSION

SOT137-1

A

max.

2.65

0.10

A1A2A

0.30

2.45

0.10

2.25

0.012

0.096

0.004

0.089

IEC JEDEC EIAJ

075E05 MS-013AD

0.25

0.01

b

3

p

0.49

0.32

0.36

0.23

0.019

0.013

0.014

0.009

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

(1)E(1) (1)

cD

15.6

7.6

7.4

0.30

0.29

1.27

0.050

15.2

0.61

0.60

REFERENCES

1997 Mar 13 31

eHELLpQ

10.65

10.00

0.42

0.39

1.4

0.055

1.1

0.4

0.043

0.016

1.1

1.0

0.043

0.039

PROJECTION

0.25

0.25 0.1

0.01

0.01

EUROPEAN

ywv θ

Z

0.9

0.4

8

0.004

ISSUE DATE

0.035

0.016

92-11-17

95-01-24

0

o
o

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

Reflow soldering

Reflow soldering techniques are suitable for all SO
packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

(order code 9398 652 90011).

Wave soldering

Wave soldering techniques can be used for all SO
packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow.

• The package footprint must incorporate solder thieves at
the downstream end.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

1997 Mar 13 32

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PURCHASE OF PHILIPS I

2

C COMPONENTS

2

Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

C components conveys a license under the Philips’ I2C patent to use the

1997 Mar 13 33

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

NOTES

1997 Mar 13 34

Philips Semiconductors Preliminary specification

Sound control circuit TEA6324T

NOTES

1997 Mar 13 35

Philips Semiconductors – a worldwide company

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Tel. [phone], Fax. [phone]
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220050 MINSK, Tel. [phone], Fax. [phone]

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Tel. [phone], Fax. [phone]
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Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
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106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
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Portugal: see Spain
Romania: see Italy
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Tel. [phone], Fax. [phone]
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Slovenia: see Italy
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252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
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Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1997 SCA53
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

Printed in The Netherlands 547027/1200/01/pp36 Date of release: 1997 Mar 13 Document order number: 9397 750 01599