Datasheet RFV10N50BE Datasheet (Intersil)

SEMICONDUCTOR

August 1995

RFV10N50BE

10A, 500V, Fast Switching N-Channel

Enhancement-Mode Power MOSFETs

Features

• 10A, 500V

DS(ON)

= 0.480Ω

•r

• Very Fast Turn-Off Characteristics

• Nanosecond Switching Speeds

• Electrostatic Discharge Protected

• UIS Rating Curve

• SOA is Power Dissipation Limited

• High Input Impedance

Description

The RFV10N50BE is an N-Channel fast switching MOSFET transis­tor that is designed for switching regulators, inverters and motor driv­ers. The RFV10N50BE is a monolithic structure incorporating a high
voltage, high current MOSFET, a control MOSFET and ESD protec­tion diodes. As indicated in the symbol to the right, the turn-on of the
main MOSFET is controlled by Gate 1 (G
controlled by Gate 2 (G

), is distributed throughout the structure. Gate

2

2 provides a very low impedance and inductive path to rapidly dis­charge the gate of the main MOSFET. Gate 2 affords very fast turn-off
(typically less than 25ns) when desired. A separate return connection,
Source Kelvin (S

), is supplied for the gate drive circuit to avoid volt-

K

age induced transients from the output circuit during switching. The
RFV10N50BE can be operated directly from integrated circuits.

PACKAGE AVAILABILITY

PART NUMBER PACKAGE BRAND

RFV10N50BE TO-247 V10N50BE

NOTE: When ordering use the entire part number.

Formerly developmental type T A9881.

). The control MOSFET,

1

Package

JEDEC STYLE 5 LEAD TO-247

Terminal Diagram

G

1

G

2

S

K

D

S

Absolute Maximum Ratings T

Drain Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Gate Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Control FET Gate Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Electrostatic Discharge Rating, MIL-STD-883, Category B(2) . . . . . . . . . . . . . . . . . . . . . . . . . . ESD 2 KV

Drain Current

RMS Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Single Pulse Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

Control FET Avalanche Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Control FET Single Pulse Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

Power Dissipation

TC = +25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Derate Above +25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.25 W/oC

Control FET Power Dissipation

TC = +25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Derate Above +25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.17 W/oC

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright

© Harris Corporation 1995

= +25oC

C

500 V
+14, -0.3 V
+14, -0.3 V

10 A
25 A

Refer to UIS Curve

1.5 A
50 mJ

156 W

21 W

-55 to +150

STG

DSS

GS
GS

DM

AS
AS
AS

, T

D

D

D

J

File Number 3377.1

1

UNITS

o

C

Specifications RFV10N50BE

Electrical Specifications Case Temperature (T

PARAMETER SYMBOL TEST CONDITIONS

Drain-Source Breakdown Voltage BV
Gate Threshold Voltage V
Zero Gate Voltage Drain Current I

Gate-Source Leakage Current I
On Resistance r
Turn-On Time t
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Turn-Off Time t
Total Gate Charge Q
Gate Source Charge Q
Gate Drain (“Miller”) Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Thermal Resistance R
Thermal Resistance R

DSSID

GS(TH)VGS

DSS

GSS

DS(ON)ID

ON

D(ON)

R

D(OFF)

F

OFF

G10

GS

GD

ISS

OSS

RSS

θJC

θJA

) = +25oC, Unless Otherwise Specified

C

LIMITS

UNITSMIN TYP MAX

= 0.25mA, VGS = 0V 500 - - V

= VDS, ID = 0.25mA 2 - 4 V

VDS = 500V,
VGS = 0V

TC = +25oC--1µA
T

= +125oC - - 250 µA

C

VGS = +12V, VGS = -0.3V - - ±500 nA

= 10A, VGS = 10V - - 0.480 Ω

VDD = 250V, ID = 10A, RL = 25Ω,
V

= V

GS2

= 20Ω

= +10V, R

GS1

R

GS2

GS1

= 6.25Ω,

- - 75 ns

-20-ns

-30-ns

-21-ns

-5-ns

- - 50 ns

VGS = 0V to 10V VDD = 400V,

ID = 10A,
RL = 40Ω

- 145 190 nC

-1722nC

-5774nC

VDS = 25V, VGS = 0V, f = 1MHz - 3800 - pF

- 290 - pF

-75-pF
Junction to Case - - 0.8
Junction to Ambient - - 40

o

C/W

o

C/W

Control FET Specifications

PARAMETER SYMBOL TEST CONDITIONS

Static Drain to Source r

DS(ON)

Drain Source Breakdown Voltage BV
Gate Threshold Voltage V
Total Gate Charge Q

DSS

GS(TH)

G10

VGS = 10V, ID = 1.0A - 1.6 - Ω
ID = 1.0mA, VGS = 0V 14 15 - V
VDS = VGS, ID = 0.25mA 2 - 4 V
ID = 1.0A, VGS = 10V - - 5 nC

Source-Drain Diode Ratings and Specifications

PARAMETER SYMBOL TEST CONDITIONS

Continuous Source Current I
Pulsed Source Current I
Forward Voltage V
Reverse Recovery Time t

SM

SD

RR

S

ISD = 10A, VGS = 0V - - 1.4 V
ISD = 10A, VGS = 0V, dISD/dt = 100A/µs - - 750 ns

LIMITS

UNITSMIN TYP MAX

LIMITS

UNITSMIN TYP MAX

- - 10 A

- - 25 A

2

Typical Performance Curves

CASE TEMPERATURE (TC) = +25oC

30

RFV10N50BE

50.0

100µs

STARTING TJ = +25oC

STARTING T

)

)+1]

10

, DRAIN CURRENT (A)

D

I

1

110

OPERATION IN THIS AREA
MAY BE LIMITED BY r

V

, DRAIN-TO-SOURCE VOLTAGE (V)

DS

DS(ON)

DC

100 1000

100ms

1ms

10ms

I

DM

IF R = 0

= (L)(IAS)/

t

AV

10.0

(1.3 RATED BV
, AVALANCHE CURRENT (A)
I

IF R ≠ 0

AS

5.0

0.01

t

AV

(1.3 RATED BV

= (L/R) In[(IAS x R)/

tAV, TIME IN AVALANCHE (ms)

DSS-VDD

DSS-VDD

0.10 1.00 2.00

FIGURE 1. SAFE OPERATING AREA CURVE FIGURE 2. UNCLAMPED INDUCTIVE-SWITCHING

12

10

8

6

4

, DRAIN CURRENT (A)

D

I

2

0

25 35 45 55 65 75 85 95 105 115 125 135 145

, CASE TEMPERATURE (oC)

T

C

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 125 150

TC, CASE TEMPERATURE (oC)

= +150oC

J

FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs

TEMPERATURE

FIGURE 4. NORMALIZED POWER DISSIPATION vs TEMPER-

TURE DERATING CURVE

VDD = 30V

25

PULSE DURATION = 250µs, TC = +25oC

VGS = 10V

20

V

15

10

, DRAIN CURRENT (A)

D

I

5

0

0 2.5 5.0 7.5 10.0 12.5 15.0

V

, DRAIN-TO-SOURCE VOLTAGE (V)

DS

V

V

GS

V

GS

= 5.5V

GS

GS

= 4.5V

= 6.0V

= 5V

25

PULSE TEST
PULSE DURATION = 250µs
DUTY CYCLE = 0.5% MAX

20

15

10

5

, ON-STATE DRAIN CURRENT (A)

D(ON)

I

0

1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.00
VGS, GATE-TO-SOURCE VOLTAGE (V)

+25

+150oC

o

C

-40

o

C

FIGURE 5. TYPICAL SATURATION CHARACTERISTICS FIGURE 6. TYPICAL TRANSFER CHARACTERISTICS

3

RFV10N50BE

Typical Performance Curves

3.0

PULSE DURATION = 250µs, VGS = 10V, ID = 10A

(Continued)

2.5

2.0

1.5

1.0

, NORMALIZED ON-RESISTANCE

0.5

DS(ON)

r

0

-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)

FIGURE 7. NORMALIZED r

vs JUNCTION TEMPERATURE FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs

DS(ON)

2.0

1.5

1.0

0.5

BREAKDOWN VOLTAGE

, NORMALIZED DRAIN-TO-SOURCE

DSS

0

BV

-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)

ID = 250µA

2.0

VGS = VDS, ID = 250µA

1.5

1.0

, NORMALIZED GATE

0.5

THRESHOLD VOLTAGE

GS(TH)

V

0

-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)

TEMPERATURE

5000

4000

C

3000

2000

C

C, CAPACITANCE (pF)

1000

OSS

C

RSS

0

0 5 10 15 20 25

VDS, DRAIN-TO-SOURCE VOLTAGE (V)

VGS = 0V, FREQUENCY (f) = 1MHz

ISS

FIGURE 9. NORMALIZED DRAIN SOURCE BREAKDOWN

VOLTAGE vs TEMPERATURE

500

400

VDD = BV

DSS

VDD = BV

DSS

300

DSS
DSS
DSS

G(REF)

= 10V

GS

t, TIME (µs)

0.75 BV

0.50 BV

0.25 BV

= 3.25mA

DSS
DSS
DSS

I

G(REF)

80

I

G(ACT)

200 4

0.75 BV

0.50 BV

0.25 BV

I

G(REF)

I

G(ACT)

RL = 50Ω
I
V

100

, DRAIN SOURCE VOLTAGE (V)

DS

V

0

20

FIGURE 11. TYPICAL SWITCHING WAVEFORMS FOR CON-

STANT GATE CURRENT. REFER TO APPLICATION
NOTES AN7254 AND AN7260

FIGURE 10. TYPICAL CAPACITANCE vs VOLTAGE

10

8

6

, GATE SOURCE VOLTAGE (V)

2

GS

V

0

10

1

0.1

-2

10

, NORMALIZED THERMAL RESPONSE

θJC

-3

Z

10

-5

10

-4

10

-3

10

10

t, RECTANGULAR PULSE WIDTH (s)

P

D

DUTY CYCLE, D = t1/t
TJ = PD x Z

-2

0.1 1 10

t

θJC

1

t

2

2

+ T

C

FIGURE 12. MAXIMUM NORMALIZED TRANSIENT THERMAL

IMPEDANCE

4

Test Circuits and Waveforms

RFV10N50BE

+10V

10%

90%

t

(ON)

90%
50%

t

10%

R

0V

R

D

L

+

V

GS1

V

GS2

0

G

1

G

2

V

DD

-

V

GS1

0V

+10V

V

GS2

t

D(ON)

0V

t

t

D(OFF)

0V

0V

R

GS1

V

GS1

V

GS2

R

GS2

S

S

K

V

DS

10%

90%

FIGURE 13. RESISTIVE SWITCHING TEST CIRCUITS FIGURE 14. RESISTIVE SWITCHING WAVEFORMS

V

DS

DUT

R

G

L

+

V

DD

-

<20ns

(OFF)

10%

90%

50%

t

F

BV

DSS

t

P

I

I

L

AS

V

DS

0.01Ω

V

GS

VARY tP TO OBTAIN
REQUIRED PEAK I

AS

0V

t

P

t

AV

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

V

DD

5

Packaging

RFV10N50BE

E

A

ØS

TERM. 6

ØP

TO-247

5 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE

INCHES MILLIMETERS

Q

ØR

D

L

1

L

123

e

1

45

e

b

1

b

2

c

b

J

1

BACK VIEW

12345

SYMBOL

A 0.180 0.190 4.58 4.82 ­b 0.046 0.051 1.17 1.29 2, 3

b

1

b

2

0.060 0.070 1.53 1.77 1, 2

0.095 0.105 2.42 2.66 1, 2

c 0.020 0.026 0.51 0.66 1, 2, 3
D 0.800 0.820 20.32 20.82 ­E 0.605 0.625 15.37 15.87 ­e 0.110 TYP 2.79 TYP 4

e

1

J

1

0.438 BSC 11.12 BSC 4

0.090 0.105 2.29 2.66 5

L 0.620 0.640 15.75 16.25 -

L

1

0.145 0.155 3.69 3.93 1

NOTESMIN MAX MIN MAX

ØP 0.138 0.144 3.51 3.65 -

TERMINAL CONNECTIONS

Lead No. 1 - Gate 1 (G1)
Lead No. 2 - Gate 2 (G2)
Lead No. 3 and

- Drain (D)

Mounting Flange
Lead No. 4 - Source Kelvin (SK)
Lead No. 5 - Source (S)

Q 0.210 0.220 5.34 5.58 -

ØR 0.195 0.205 4.96 5.20 ­ØS 0.260 0.270 6.61 6.85 -

NOTES:

1. Lead dimension and finish uncontrolled in L1.

2. Lead dimension (without solder).

3. Add typically 0.002 inches (0.05mm) for solder coating.

4. Position of lead to be measured 0.250 inches (6.35mm) from bottom
of dimension D.

5. Position of lead to be measured 0.100 inches (2.54mm) from bottom
of dimension D.

6. Controlling dimension: Inch.

7. Revision 1 dated 1-93.

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Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at
any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is
believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other
rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries.

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6

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