The Kawasaki KCUSB3 Controller is a quick single chip solution to interface peripheral devices to the
Universal Serial Bus (USB). The KCUSB3 has been specifically designed to provide a simple and fast
method of designing interfaces for peripheral devices to the USB port. This has been accomplished by its
highly integrated functionality and flexible General Purpose I/O (GPIO) that can be configured to your
system requirements. This device has been configured with a wide range of capabilities for your
immediate use or evaluation. The device can then be reconfigured for your specific application. You can
directly access the embedded processor’s address and data lines to use external programmable logic for
evaluation before configuring the GPIO for your final device. The SIE (Serial Interface Engine) is fully
compatible with the USB specification.
Features
• Advanced 16 Bit processor for USB transaction
processing and control data processing
• USB interface ver 1.0/1.1 compliant
• Transceivers and SIE (Serial Interface Engine)
• Internal Clock Generation
• Utilizes low cost external crystal circuitry
• 1.5K x 16 Internal RAM buffer
• 2 IRQ
• 8 Channel, 10 Bit A/D
Block Diagram (Application Example)
AIN
PWM
Txd
Rxd
CK
DIO
8
4
8 Channel
10 Bit A/D
4 PWM Out
(GPIO)
UART
RAM
(3KB)
I2C
• External Memory Interface for direct
access to the 16-bit processor for using
external logic or memory.
• General purpose I/O
• Watchdog timer
• PWM Output Support
• 8K user programmable gates
• 8K bytes ROM
• I2C Interface
• 100 pin QFP package
Watchdog
16 Bit
Processor
16 Bit Address / Data Bus
Serial
Interface
Engine
Timer
External Memory
Interface
PLL & Clock
Generator
A15-0
D15-0
Cntrl.
X1
X2
2
INT1-0
Kawasaki LSI • 2570 North First Street • Suite 301 • San Jose, CA 95131 • Tel: (408) 570-0555 • Fax: (408) 570-0567 • www.klsi.com
Mask ROM
(8KB)
Data -
Data +
Page 2
K
KCUSB3
USB Controller – Quick Interface
KAWASAKI
LSI
2
Ver. 1.3
Watchdog
Converter
USB Engine
VCO_IN
CP_OUT
PWM 2
nCU
XD_14
OGND
XD_13
XD_12
IGND
XD_11
XD_10
XD_9
XD_8
XD_7
XD_6
XD_5
XD_4
XD_3
XD_2
XD_1
XD_0
XA_13
XA_12
XA_11
100
31323334353637383940414243444546474849
50
KCUSB3 Basic Blocks
Programmable
Logic for
Interface
Timer 0
Timer 1
Pin Diagram
GPIO
and
Configured
GPIO
RAM
Custom Logic
16 Bit Micro
Interface
Timer
Mask ROM
for External
E2 Device
A/D
PLL Clock
Generator
Kawasaki LSI • 2570 North First Street • Suite 301 • San Jose, CA 95131 • Tel: (408) 570-0555 • Fax: (408) 570-0567 • www.klsi.com
71OUTXA_1External Address Pin
72OUTXA_2External Address Pin
73OUTXA_3External Address Pin
74OUTXA_4External Address Pin
75OUTXA_5External Address Pin
76OUTXA_6External Address Pin
77OUTXA_7External Address Pin
78OUTXA_8External Address Pin
79OUTXA_9External Address Pin
80OUTXA_10External Address Pin
81OUTXA_11External Address Pin
82OUTXA_12External Address Pin
83OUTXA_13External Address Pin
84IN/OUTXD_0External Data Pins
85IN/OUTXD_1External Data Pins
86IN/OUTXD_2External Data Pins
87IN/OUTXD_3External Data Pins
88IN/OUTXD_4External Data Pins
89IN/OUTXD_5External Data Pins
90IN/OUTXD_6External Data Pins
91IN/OUTXD_7External Data Pins
92IN/OUTXD_8External Data Pins
93IN/OUTXD_9External Data Pins
I/OPin NameDescriptionProgrammable
I/O Mode *
Test Pin, Disconnect for Normal
Operation
Kawasaki LSI • 2570 North First Street • Suite 301 • San Jose, CA 95131 • Tel: (408) 570-0555 • Fax: (408) 570-0567 • www.klsi.com
Page 5
K
KCUSB3
USB Controller – Quick Interface
KAWASAKI
LSI
5
Ver. 1.3
Pin
Number
94IN/OUTXD_10External Data Pins
95IN/OUTXD_11External Data Pins
96INIGNDGND
97IN/OUTXD_12External Data Pins
98IN/OUTXD_13External Data Pins
99INOGNDGND
100IN/OUTXD_14External Data Pins
* Dedicated GPIO’s are not selected.
I/OPin NameDescriptionProgrammable
Function Description
16 Bit Processor
The integrated 16 bit processor serves as a micro controller for USB peripherals. The processor
can execute approximately five million instructions per second. With this processing power it
allows the design of intelligent peripherals that can process data prior to passing it on to the host
PC, thus improving overall performance of the system. The masked ROM (4K X 16) in the
KCUSB3 or external memory contains a specialized instruction set that has been designed for
highly efficient coding of processing algorithms and USB transaction processing.
The 16-bit processor is designed for efficient data execution by having direct access to the RAM
Buffer, external memory, I/O interfaces, and all the control and status registers. The
divide/multiply feature expands the capability of USB peripherals.
I/O Mode *
The processor contains sixteen general-purpose registers along with several special purpose
registers including a flag register and an interrupt enable register. Eight of these registers can be
used for indirect Addressing, with optional indexed and auto increment modes available. One of
these general-purpose registers is additionally used as a stack pointer. The register set is
mapped into RAM, and can be easily relocated for fast context switching.
The processor supports prioritized vectored hardware interrupts. In addition, as many as 240
software interrupt vectors are available.
The processor provides six addressing modes, supporting memory-to-memory, memory-toregister, register-to-register, immediate-to-register or immediate-to-memory operations. Register,
direct, immediate, indirect, and indirect indexed addressing modes are supported. In addition,
there is an auto-increment mode in which a register, used as an address pointer is automatically
incremented after each use, making repetitive operations more efficient both from a programming
and a performance standpoint.
The processor features a full set of program control, logical, and integer arithmetic instructions.
All instructions are sixteen bits wide, although some instructions require operands, which may
occupy another one or two words. Several special “ short immediate” instructions are available,
so that certain frequently used operations with small constant operand will fit into a 16-bit
instruction.
Kawasaki LSI • 2570 North First Street • Suite 301 • San Jose, CA 95131 • Tel: (408) 570-0555 • Fax: (408) 570-0567 • www.klsi.com
Page 6
K
KCUSB3
USB Controller – Quick Interface
KAWASAKI
LSI
6
Ver. 1.3
The Processor – Divide/Multiply function
The processor’s divide/multiply function contains all the instructions of the base processor that
additionally includes integer divide and multiply instructions. A signed multiply instructions takes
two 16-bit operands and returns a 32-bit result. A signed divide instruction divides a 32-bit
operand by a 16-bit operand.
RAM Buffer
The USB controller contains a 3K byte (1.5K X 16) internal buffer memory. The memory is used
to buffer data and USB packets and accessed by the 16 Bit processor and the SIE. USB
transactions are automatically routed to the memory buffer. The 16-bit processor has the ability
to set up pointers and block sizes in buffer memory for USB transactions. Data is read from the
interface and is processed and packetized by the 16-bit I/O processor.
PLL Clock Generator
The PLL circuitry is provided to generate the internal 48MHz clock requirements. This circuitry is
designed to allow use of a low cost 12 MHz external crystal which is connected to the KCUSB3
pins X1 and X2. If an external 12 MHz clock is available in the application, it may be used in lieu
of the crystal circuit and connected directly to the X1 input pin.
USB Interface
The USB controller meets the Universal Serial Bus (USB) specification ver 1.0. The transceiver
is capable of transmitting and receiving serial data at the USB’s full speed, 12 Mbits/sec data
rate. The driver portion of the transceiver is differential, while the receive section is comprised of
a differential receiver and two single ended receivers. Internally, the transceiver interfaces to the
SIE logic. Externally, the transceiver connects to the physical layer of the USB.
A/D interface
The integrated A/D interface is a ten bit A/D interface with eight Analog Inputs and converts data
at 100K samples per second.
PWM Interface
Four PWM output channels are available with each channel capable of converting 10 bits at a
rate up to 48 KHz.
UART Interface
Supports a transfer rate of 900 to 115.2K baud.
General Purpose I/O
Up to 25 general purpose I/O signals are available. Most of the GPIOs can be configured for
special purpose functions such as PWM, Serial EEPROM interface, Digital Input, etc.
Kawasaki LSI • 2570 North First Street • Suite 301 • San Jose, CA 95131 • Tel: (408) 570-0555 • Fax: (408) 570-0567 • www.klsi.com
Page 7
K
KCUSB3
USB Controller – Quick Interface
KAWASAKI
LSI
7
Ver. 1.3
Serial EEPROM Support
The USB Controller serial interface is used to provide access to external EEPROM’s. The
interface is implemented using General Purpose I/O signals and can support a variety of serial
EEPROM formats.
Custom Logic Interface
The internal 16 bit data and address bus is connected to the Custom Logic block allowing custom
logic to interface to the processor and to access a selection of GPIO pins.
Development Tools
To assist in the development of USB products, an evaluation board is available as well as a set of
software tools and debuggers. Compilers and debuggers are available through third party
suppliers.
Kawasaki LSI • 2570 North First Street • Suite 301 • San Jose, CA 95131 • Tel: (408) 570-0555 • Fax: (408) 570-0567 • www.klsi.com
Page 8
K
KCUSB3
USB Controller – Quick Interface
KAWASAKI
LSI
8
Ver. 1.3
Electrical Characteristics
ABSOLUTE MAXIMUM RATINGS
ParameterSymbolRatingsUnit
V
DD5
V
DD
Input Voltage
VIN (5V Tolerant)-0.3 to 7.3V
DC Output CurrentI
OUT
Storage TemperatureTSTG-55 to 125 **
*24mA buffers
**Plastic Package
-0.6 to 6.0VSupply Voltage
-0.3 to 4.0V
-0.6 to V
DD5
+0.6VVIN (Normal)
-0.3 to VDD+0.3V
±30 *
mA
°C
DC Characteristics and conditions (V
V
DD5
V
IH
V
IL
H
I
IH
I
IL
V
OH
V
OL
I
OZ
Supply Voltage-3.03.33.6V
Input high voltageCMOS2.15--V
Input low voltageCMOS--0.95V
Hysteresis voltage
Input high currentV
Input low currentV
Output high voltageI
Output low voltageI
3-state leakage current
*IDDS is design dependent
@ 3V±.3V)
DD5
ValueSymbolParameterCondition
MinTypMax
TTL Schmitt1.321.75VV+Input high voltage
CMOS Schmitt2.172.65V
TTL Schmitt0.450.86-VV-Input low voltage
CMOS Schmitt0.501.03-V
TTL Schmitt0.25--VV
CMOS Schmitt0.56--V
= V
IN
DD5
= V
IN
ss
= -4mA2.4--V
OH
= 4mA--0.4V
OL
VOL=V
DD5
VIN=V
SS
-10-10
-10-10
-10-10
-12-34-100
Unit
µA
µA
µA
µA
Kawasaki LSI assumes no responsibility or liability for (1) any errors or inaccuracies contained in the information herein and (2) the use of the
information or a portion thereof in any application, including any claim for (a) copyright or patent infringement or (b) direct, indirect, special or
consequential damages. There are no warranties extended or granted by this document. The information herein is subject to change without notice
form Kawasaki LSI
March 1998 • Copyright 1998 • Kawasaki LSI • Printed in U.S.A
Kawasaki LSI • 2570 North First Street • Suite 301 • San Jose, CA 95131 • Tel: (408) 570-0555 • Fax: (408) 570-0567 • www.klsi.com
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