Datasheet IRF 9540NSPbF Datasheet

Page 1
PD - 96030
IRF9540NSPbF
IRF9540NLPbF
HEXFET® Power MOSFET
l Advanced Process Technology l Ultra Low On-Resistance l 150°C Operating Temperature l Fast Switching l Repetitive Avalanche Allowed up to Tjmax l Some Parameters are Different from
G
IRF9540NS/L
l P-Channel l Lead-Free
Description
D
Features of this design are a 150°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These fea­tures combine to make this design an extremely efficient and reliable device for use in a wide variety of other applications.
D2Pak
IRF9540NSPbF
GDS
Gate Drain Source
Absolute Maximum Ratings
Parameter Units
ID @ TC = 25°C
I
@ TC = 100°C
D
I
DM
PD @TA = 25°C
P
@TC = 25°C
D
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt
T
J
T
STG
Continuous Drain Current, V
Continuous Drain Current, VGS @ -10V
Pulsed Drain Current
Maximum Power Dissipation W
Maximum Power Dissipation
Linear Derating Factor W/°C
Gate-to-Source Voltage V
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Operating Junction and °C
Storage Temperature Range
Soldering Temperature, for 10 seconds
c
c
@ -10V A
GS
d
c
e
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
Junction-to-Case –––
Junction-to-Ambient (PCB Mount, steady state)
g
www.irf.com 1
D
S
S
D
G
V
R
DS(on)
DSS
ID = -23A
D
IRF9540NLPbF
Max.
-23
-14
-92
3.1
110
0.9
± 20
84
-14
11
-13
-55 to + 150
300 (1.6mm from case )
1.1
––– 40
= 117m
S
D
G
TO-262
mJ
A
mJ
V/ns
°C/W
09/30/05
Page 2
IRF9540NS/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
V
(BR)DSS
∆ΒV
DSS
R
DS(on)
V
GS(th)
gfs Forward Transconductance 5.6 ––– ––– S
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Drain-to-Source Breakdown Voltage -100 ––– ––– V
/TJ Breakdown Voltage Temp. Coefficient ––– -0.11 ––– V/°C
Static Drain-to-Source On-Resistance ––– ––– 117
Gate Threshold Voltage -2.0 ––– -4.0 V
Drain-to-Source Leakage Current ––– ––– -50 µA
––– ––– -250
Gate-to-Source Forward Leakage ––– ––– 100 nA
Gate-to-Source Reverse Leakage ––– ––– -100
Total Gate Charge ––– 73 110 nC
Gate-to-Source Charge ––– 13 20
Gate-to-Drain ("Miller") Charge ––– 38 57
Turn-On Delay Time ––– 13 ––– ns
Rise Time ––– 64 –––
Turn-Off Delay Time ––– 40 –––
Fall Time ––– 45 –––
VGS = 0V, ID = -250µA
Reference to 25°C, I
m
V
= -10V, ID = -14A
GS
VDS = VGS, ID = -250µA
= -50V, ID = -14A
V
DS
= -100V, VGS = 0V
V
DS
V
= -80V, VGS = 0V, TJ = 125°C
DS
= -20V
V
GS
= 20V
V
GS
= -14A
I
D
= -80V
V
DS
= -10V
V
GS
V
= -50V
DD
= -14A
I
D
= 5.1
R
G
V
= -10V
GS
Internal Drain Inductance ––– 4.5 ––– nH Between lead,
6mm (0.25in.)
Internal Source Inductance ––– 7.5 ––– from package
and center of die contact
Input Capacitance ––– 1450 ––– pF
Output Capacitance ––– 430 –––
Reverse Transfer Capacitance ––– 230 –––
= 0V
V
GS
= -25V
V
DS
ƒ = 1.0MHz, See Fig. 5
Parameter Min. Typ. Max. Units
Continuous Source Current ––– ––– -23
(Body Diode) A
Pulsed Source Current ––– ––– -92
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
c
––– ––– -1.6 V
––– 140 210 ns
Reverse Recovery Charge ––– 890 1340 nC
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
MOSFET symbol
showing the
integral reverse
p-n junction diode. TJ = 25°C, IS = -14A, VGS = 0V
TJ = 25°C, IF = -14A, VDD = -25V
di/dt = -100A/µs
Conditions
= -1mA
D
f
f
f
Conditions
f
f
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11)
Starting T
RG = 25, I
I
SD
= 25°C, L = 0.88mH
J
= -14A. (See Figure 12)
AS
-14A, di/dt -620A/µs, V
DD
V
(BR)DSS
,
Pulse width 300µs; duty cycle 2%.When mounted on 1" square PCB (FR-4or G-10
Material). For recommended footprint and soldering techniques refer to application note #AN-994.
TJ ≤ 150°C.
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IRF9540NS/LPbF
1000
) A
( t n e
r
r u
C e
c
r u o S
­o
t
­n
i a
r D
,
D
I
-
TOP -15V
100
BOTTOM -4.5V
10
1
VGS
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
-4.5V
60µs PULSE WIDTH
Tj = 25°C
0.1
0.1 1 10 100
-VDS, Drain-to-Source Voltage (V)
100
TJ = 25°C
) A
(
t n e
r
r
10
u C e
c
r u o S
­o
t
­n
i
1
a
r D
,
D
I
-
V
TJ = 150°C
= -50V
DS
60µs PULSE WIDTH
0.1 2 4 6 8 10 12 14
-VGS, Gate-to-Source Voltage (V)
1000
) A
( t n e
r
r u
C e
c
r u o S
­o
t
­n
i a
r D
,
D
I
-
TOP -15V
100
BOTTOM -4.5V
10
1
VGS
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
-4.5V
60µs PULSE WIDTH
Tj = 150°C
0.1
0.1 1 10 100
-VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
2.0
e c n a
t s
i s e
R n O e
c
r u o S
­o
t
­n
i a
r D
,
) n o
( S D
R
ID = -14A
V
= -10V
GS
1.5
) d e z
i
l a
m
r o
N
(
1.0
0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
vs. Temperature
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Page 4
IRF9540NS/LPbF
) F p
( e c n a
t
i c a p a
C ,
C
10000
1000
100
V
= 0V, f = 1 MHZ
GS
C
= C
iss
rss
oss
= C
= C
gs
gd
ds
C
C
1 10 100
-VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
100
) A
( t n e
r
r u
C n
i a
r D e
s
r e v e
R ,
D S
I
-
TJ = 150°C
10
TJ = 25°C
1
0.1
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
-VSD, Source-to-Drain Voltage (V)
+ Cgd, C
+ C
gd
C
iss
C
oss
C
rss
SHORTED
ds
V
GS
= 0V
20
ID= -14A
) V
(
16
e g a
t
l o V
e
12
c
r u o S
­o
t
-
8
e
t a
G ,
S G
4
V
-
0
0 20406080100120
QG, Total Gate Charge (nC)
VDS= -80V
VDS= -50V
VDS= -20V
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
1000
) A
( t n
100
e
r
r u
C e
c
r u o
10
S
­o
t
­n
i a
r D
1
,
D
I
-
Tc = 25°C Tj = 150°C Single Pulse
0.1 1 10 100 1000
OPERATION IN THIS AREA LIMITED BY RDS(on)
-V
, Drain-toSource Voltage (V)
DS
100µsec
1msec
10msec
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
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24
C
20
) A
( t
16
n e
r
r u
C
12
n
i a
r D
,
8
D
I
-
4
0
25 50 75 100 125 150
TC , Case Temperature (°C)
IRF9540NS/LPbF
R
D.U.T.
D
t
d(off)tf
-
+
V
DS
V
GS
R
G
-10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
t
d(on)tr
V
GS
10%
90%
V
DS
V
DD
Fig 9. Maximum Drain Current vs.
Fig 10b. Switching Time Waveforms
Case Temperature
10
)
1
C J h
t Z (
e s n o p s e
R l a
m
r e h T
0.001
D = 0.50
0.20
R
R
0.1
0.01
0.10
0.05
0.02
0.01
τ
J
τ
J
τ
1
τ
1
Ci= τi/Ri
1
R
1
SINGLE PULSE ( THERMAL RESPONSE )
1E-006 1E-005 0.0001 0.001 0.01 0.1
R
2
3
R
2
τ
2
τ
2
Ri (°C/W)
R
3
τ
0.1737838 0.0000610
τ
3
τ
0.4335992 0.0019590
3
0.4921007 0.0260060
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
τi (sec)
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Page 6
IRF9540NS/LPbF
(BR)
A
L
D.U.T
I
AS
0.01
p
DRIVER
15V
V
DD
R
V
G
-20V
DS
t
Fig 12a. Unclamped Inductive Test Circuit
I
AS
t
p
V
DSS
350
) J
m
(
300
y g
r e n E
250
e h c n a
200
l a v A
e
150
s
l u P
e
l
100
g n
i S ,
50
S A
E
TOP -6.7A
BOTTOM -14A
0
25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)
Fig 13. Maximum Avalanche Energy
vs. Drain Current
I
D
-9.6A
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
Q
G
-10V
Q
GS
V
G
Q
GD
Charge
Fig 14a. Basic Gate Charge Waveform
12V
V
GS
Fig 14b. Gate Charge Test Circuit
50K
.2µF
.3µF
-3mA
Current Sampling Resistors
­V
+
D.U.T.
I
G
I
D
6 www.irf.com
DS
Page 7
IRF9540NS/LPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
-
R
G
V
GS
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
+
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance Current Transformer
-
-
dv/dt controlled by R
+
G
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P. W .
D =
Period
+
V
DD
-
VGS=10V
[ ] ***
D.U.T. ISDWaveform
Reverse Recovery Current
Re-Applied Voltage
D.U.T. VDSWaveform
Inductor Curent
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple 5%
V
DD
[ ]
I
[ ]
SD
Fig 15. For P-Channel HEXFETS
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Page 8
IRF9540NS/LPbF
2
D
Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
THIS IS AN IRF530S WIT H
LOT CODE 8024 AS S EMBLE D ON WW 02, 2000 IN THE ASSEMBLY LINE "L"
INTER NAT IONAL
RECTIFIER
LOGO
ASSEMBLY LOT CODE
F530S
OR
INTERNAT IONAL
RECTIFIE R
LOGO
ASSEMBLY LOT CODE
F530S
PART NUMBER
DATE CODE P = DE S IGN AT ES L E AD - F R EE
PRODUCT (OPT IONAL) YEAR 0 = 2000 WE E K 0 2 A = ASSEMBLY SITE CODE
8 www.irf.com
PART NUMBER
DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L
Page 9
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
IRF9540NS/LPbF
TO-262 Part Marking Information
EXAMPLE:
T HIS IS AN I RL 3103L LOT CODE 1789 ASS EMBL ED ON WW 19, 1997 IN THE ASSEMBLY LINE "C"
Note: "P" in ass embl y l ine pos i ti on i ndi cates "L ead-F ree"
INTERNATIONAL
RECTIFIE R
LOGO
ASSEMBLY LOT CODE
PART NUMBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
OR
INTE RNAT IONAL
RECTIFIER
LOGO
ASSEMBLY LOT CODE
www.irf.com 9
PART NUMBER
DATE CODE P = DESIGNATE S LEAD-F REE
PRODUCT (OPTIONAL)
YEAR 7 = 1997 WEEK 19
A = ASSEMBLY SITE CODE
Page 10
IRF9540NS/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
4.10 (.161)
3.90 (.153)
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
1.85 (.073)
1.65 (.065)
TRL
10.90 (.429)
10.70 (.421)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
330.00 (14.173) MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
11.60 (.457)
11.40 (.449)
16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
15.42 (.609)
15.22 (.601)
27.40 (1.079)
23.90 (.941)
4
26.40 (1.039)
24.40 (.961)
3
24.30 (.957)
23.90 (.941)
4.72 (.136)
4.52 (.178)
60.00 (2.362) MIN.
30.40 (1.197) MAX.
4
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 09/05
10 www.irf.com
Page 11
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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