Page 1
PD - 95129
Pulsed Drain C
c
Single Pulse Aval
d
Single Pulse Aval
d Value
h
Aval
c
R
g
AUTOMOTIVE MOSFET
IRF3205ZPbF
IRF3205ZSPbF
IRF3205ZLPbF
Features
l Advanced Process Technology
l Ultra Low On-Resistance
l 175°C Operating Temperature
l Fast Switching
l Repetitive Avalanche Allowed up to Tjmax
l Lead-Free
G
Description
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low onresistance per silicon area. Additional features of
this design are a 175°C junction operating temperature, fast switching speed and improved repetitive
avalanche rating . These features combine to make
this design an extremely efficient and reliable device
for use in Automotive applications and a wide variety
of other applications.
TO-220AB
IRF3205ZPbF
Absolute Maximum Ratings
Parameter Units
ID @ TC = 25°C
ID @ TC = 100°C
I
@ TC = 25°C
D
I
DM
PD @TC = 25°C
V
GS
E
AS (Thermally limited)
(Tested )
E
AS
I
AR
E
AR
T
J
T
STG
Continuous Drain Current, V
Continuous Drain Current, V
Continuous Drain Current, V
urrent
Power Dissipation W
Linear Derating Factor W/°C
Gate-to-Source Voltage V
anche Energy
anche Energy Teste
anche Current
epetitive Avalanche Energy
Operating Junction and
Storage Temperature Range °C
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
@ 10V (Silicon Limited)
GS
@ 10V
GS
@ 10V (Package Limited)
GS
i
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
R
θJA
Junction-to-Case
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient
Junction-to-Ambient (PCB Mount)
i
i
j
www.irf.com 1
HEXFET® Power MOSFET
D
V
= 55V
DSS
R
S
D2Pak
IRF3205ZSPbF
Max.
110
78
75
440
170
1.1
± 20
180
250
See Fig.12a, 12b, 15, 16
-55 to + 175
300 (1.6mm from case )
y
in (1.1Nym)
10 lbf
––– 0.90 °C/W
0.50 –––
––– 62
––– 40
= 6.5mΩ
DS(on)
ID = 75A
TO-262
IRF3205ZLPbF
A
mJ
A
mJ
3/18/04
Page 2
IRF3205ZS/LPbF
/
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
gfs Forward Transconductance 71 ––– ––– S
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff.
oss
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Drain-to-Source Breakdown Voltage 55 ––– ––– V
∆T
Breakdown Voltage Temp. Coefficient ––– 0.051 ––– V/°C
J
Static Drain-to-Source On-Resistance ––– 4.9 6.5
mΩ
Gate Threshold Voltage 2.0 ––– 4.0 V
Drain-to-Source Leakage Current ––– ––– 20 µA
––– ––– 250
Gate-to-Source Forward Leakage ––– ––– 200 nA
Gate-to-Source Reverse Leakage ––– ––– -200
Total Gate Charge ––– 76 110
Gate-to-Source Charge ––– 21 ––– nC
Gate-to-Drain ("Miller") Charge ––– 30 –––
Turn-On Delay Time ––– 18 –––
Rise Time ––– 95 –––
Turn-Off Delay Time ––– 45 ––– ns
Fall Time ––– 67 –––
Internal Drain Inductance ––– 4.5 ––– Between lead,
nH 6mm (0.25in.)
Internal Source Inductance ––– 7.5 ––– from package
Input Capacitance ––– 3450 –––
Output Capacitance ––– 550 –––
Reverse Transfer Capacitance ––– 310 ––– pF
Output Capacitance ––– 1940 –––
Output Capacitance ––– 430 –––
Effective Output Capacitance ––– 640 –––
Parameter Min. Typ. Max. Units
Continuous Source Current ––– ––– 75
(Body Diode) A
Pulsed Source Current ––– ––– 440
(Body Diode)
Diode Forward Voltage ––– ––– 1.3 V
Reverse Recovery Time ––– 28 42 ns
Reverse Recovery Charge ––– 25 38 nC
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
c
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, I
V
= 10V, ID = 66A
GS
= 1mA
D
e
VDS = VGS, ID = 250µA
V
= 25V, ID = 66A
DS
= 55V, VGS = 0V
V
DS
V
= 55V, VGS = 0V, TJ = 125°C
DS
V
= 20V
GS
V
= -20V
GS
= 66A
I
D
V
= 44V
DS
VGS = 10V
e
VDD = 28V
I
= 66A
D
R
= 6.8 Ω
G
VGS = 10V
e
and center of die contact
VGS = 0V
V
= 25V
DS
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
V
= 0V, VDS = 44V, ƒ = 1.0MHz
GS
V
= 0V, VDS = 0V to 44V
GS
f
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
= 25°C, IS = 66A, VGS = 0V
T
J
TJ = 25°C, IF = 66A, VDD = 25V
di/dt = 100A/µs
e
e
2 www.irf.com
Page 3
IRF3205ZS/LPbF
1000
V
TOP 15V
)
A
(
t
n
e
r
r
u
C
e
c
r
u
o
S
o
t
n
i
a
r
D
,
I
10V
7.0V
6.0V
5.5V
100
5.0V
BOTTOM 4.5V
10
D
1
0.1 1 10 100
GS
8.0V
4.5V
20µs PULSE WIDTH
Tj = 25°C
VDS, Drain-to-Source Voltage (V)
1000
)
A
(
t
n
e
r
100
r
u
C
e
c
r
u
o
S
o
t
-
10
n
i
a
r
D
,
D
I
1
4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0
TJ = 25°C
V
DS
20µs PULSE WIDTH
= 25V
VGS, Gate-to-Source Voltage (V)
TJ = 175°C
1000
V
TOP 15V
)
A
(
t
n
e
r
r
u
C
e
c
r
u
o
S
o
t
n
i
a
r
D
,
I
10V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
D
10
0.1 1 10 100
GS
8.0V
4.5V
20µs PULSE WIDTH
Tj = 175°C
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
120
)
S
(
100
e
c
n
a
t
c
80
u
d
n
o
c
s
60
n
a
r
T
d
r
a
40
w
r
o
F
,
s
20
f
G
0
0 20406080100
ID, Drain-to-Source Current (A)
TJ = 175°C
TJ = 25°C
V
= 10V
DS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
Vs. Drain Current
www.irf.com 3
Page 4
IRF3205ZS/LPbF
6000
5000
)
F
4000
p
(
e
c
n
a
t
3000
i
c
a
p
a
C
2000
,
C
1000
0
1 10 100
V
= 0V, f = 1 MHZ
GS
C
= C
= C
= C
gs
gd
ds
Ciss
Coss
Crss
+ Cgd, C
+ C
iss
C
rss
C
oss
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.0
)
A
(
t
n
e
r
r
u
C
n
i
a
r
D
e
s
r
e
v
e
R
,
D
S
I
100.0
10.0
TJ = 175°C
TJ = 25°C
1.0
0.1
0.2 0.6 1.0 1.4 1.8 2.2
VSD, Source-toDrain Voltage (V)
20
SHORTED
ds
gd
ID= 66A
)
V
(
16
e
g
a
t
l
o
V
12
e
c
r
u
o
S
o
8
t
e
t
a
G
,
S
4
G
V
0
0 20 40 60 80 100 120
VDS= 44V
VDS= 28V
VDS= 11V
Q
Total Gate Charge (nC)
G
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
V
GS
= 0V
10000
)
A
1000
(
t
n
e
r
r
u
C
100
e
c
r
u
o
S
o
10
t
n
i
a
r
D
,
1
D
I
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1 10 100 1000
V
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
1msec
10msec
, Drain-toSource Voltage (V)
DS
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4 www.irf.com
Page 5
IRF3205ZS/LPbF
120
LIMITED BY PACKAGE
100
)
A
(
80
t
n
e
r
r
u
C
60
n
i
a
r
D
,
40
D
I
20
0
25 50 75 100 125 150 175
TC , Case Temperature (°C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
2.5
e
c
n
a
t
s
i
s
e
R
n
O
)
e
d
c
e
r
z
u
i
l
o
a
S
-
m
r
o
t
o
n
N
i
(
a
r
D
,
)
n
o
(
S
D
R
ID = 66A
V
= 10V
GS
2.0
1.5
1.0
0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
Vs. Temperature
D = 0.50
)
C
J
h
t
0.1
Z
(
e
s
n
o
p
s
e
R
l
a
0.01
m
r
e
h
T
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
www.irf.com 5
Page 6
IRF3205ZS/LPbF
A
15V
DRIVER
+
-
V
DD
R
V
20V
V
DS
G
GS
L
D.U.T
I
AS
0.01
t
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
350
)
J
m
(
300
y
g
r
e
n
250
E
e
h
c
n
200
a
l
a
v
A
150
e
s
l
u
P
e
100
l
g
n
i
S
,
50
S
A
E
0
25 50 75 100 125 150 175
I
TOP 27A
47A
BOTTOM 66A
Starting TJ, Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
4.0
D
)
V
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
L
0
1K
DUT
VCC
(
e
g
a
t
l
o
3.0
V
d
l
o
h
s
e
r
h
t
e
t
a
2.0
G
)
h
t
(
S
G
V
1.0
-75 -50 -25 0 25 50 75 100 125 150 175
ID = 250µA
TJ , Temperature ( °C )
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage Vs. Temperature
6 www.irf.com
Page 7
IRF3205ZS/LPbF
1000
Duty Cycle = Single Pulse
Allowed avalanche Current vs
100
)
A
(
t
n
e
r
r
u
C
10
e
h
c
n
a
l
a
v
A
1
0.1
1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
0.01
0.05
0.10
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
200
TOP Single Pulse
BOTTOM 10% Duty Cycle
)
160
J
m
(
y
g
r
e
n
120
E
e
h
c
n
a
l
80
a
v
A
,
R
A
40
E
ID = 66A
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T
. This is validated for
jmax
every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. P
= Average power dissipation per single
D (ave)
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
= Allowable avalanche current.
av
7. ∆T = Allowable rise in junction temperature, not to exceed
T
(assumed as 25°C in Figure 15, 16).
0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
jmax
t
Average time in avalanche.
av =
D = Duty cycle in avalanche = t
Z
(D, tav) = Transient thermal resistance, see figure 11)
thJC
P
= 1/2 ( 1.3·BV·Iav) = DT/ Z
D (ave)
I
2DT/ [1.3·BV·Zth]
av =
E
AS (AR)
= P
·f
av
D (ave)·tav
thJC
www.irf.com 7
is
Page 8
IRF3205ZS/LPbF
Reverse
Recovery
Current
Driver Gate Drive
D.U.T. ISDWaveform
D.U.T. VDSWaveform
Inductor Curent
* V
GS
D.U.T
+
-
R
G
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
-
• Low Leakage Inductance
Current Transformer
-
• dv/dt controlled by R
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
G
+
V
DD
Re-Applied
Voltage
+
-
Period
P.W.
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
= 5V for Logic Level Devices
D =
P. W .
Period
VGS=10V
V
DD
I
SD
*
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
R
D.U.T.
D
+
V
DD
-
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 18b. Switching Time Waveforms
8 www.irf.com
Page 9
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
IRF3205ZS/LPbF
10.54 (.415)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
1.40 (.055)
3X
1.15 (.045)
2.54 (.1 00)
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14 .5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB .
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASURE MENTS DO NOT INCLUDE BURRS.
2X
10.29 (.405)
4
1 2 3
3.78 (.149)
3.54 (.139)
- A -
6.47 (.255)
6.10 (.240)
1.15 (.045)
MIN
4.06 (.160)
3.55 (.140)
0.93 (.037)
3X
0.69 (.027)
0.36 (.014 ) M B A M
4.69 (.185)
4.20 (.165)
- B -
1.32 (.052)
1.22 (.048)
2.92 (.115)
2.64 (.104)
HEXFET
1- GATE
2- DRAIN
3- SOURCE
4- DRAIN
3X
LEAD ASSIG NMENTS
LEAD ASSIGNMENTS
1 - GATE
2 - DRA IN
3 - SOURC E
4 - DRA IN
0.55 (.022)
0.46 (.018)
TO-220AB Part Marking Information
IGBTs, CoPACK
1- GATE
2- COLLECTO R
3- EMITTER
4- COLLECTO R
EXAMPLE:
T HIS IS AN IRF 1010
LOT CODE 1789
ASS EMBL ED ON WW 19, 1997
IN THE ASS EMBLY LINE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INTERNATIONAL
RE CTIFIER
LOGO
AS S E MB LY
LOT CODE
PART NUMBER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
www.irf.com 9
Page 10
IRF3205ZS/LPbF
2
D
Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information (Lead-Free)
T H IS IS AN IR F 530S WIT H
LOT CODE 8024
ASS EMB LE D ON WW 02, 2000
IN T HE AS S EM B L Y L INE "L "
No te: "P" in as semb ly line
pos ition in dicates "L ead-F ree"
INT ER NAT ION AL
R E CT IFIE R
LOGO
AS SE MB LY
LOT CODE
F 530S
PART NUMBE R
DATE CODE
YEAR 0 = 2000
WEE K 02
LINE L
OR
INT ER N AT ION AL
R E CTIF IE R
LOGO
AS SE MB LY
LOT CODE
F 530S
10 www.irf.com
PART NUMBE R
DATE CODE
P = DE S IGN ATE S L E AD-F R EE
PRODUCT (OPTIONAL)
YEAR 0 = 2000
WEE K 02
A = AS S E MB L Y S IT E CO DE
Page 11
TO-262 Package Outline
IRF3205ZS/LPbF
IGBT
1- GATE
2- COLLECTOR
3- EMITTER
TO-262 Part Marking Information
TH IS IS AN IRL3103L
EXAMPLE:
LOT CODE 1789
ASSE MB LED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
Note: "P" i n as sembly line
position indicates "Lead-Free"
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
PART NUMBER
DATE CODE
YE AR 7 = 1997
WEEK 19
LINE C
OR
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
www.irf.com 11
PART NUMBER
DATE CODE
P = DESIGNATES LEAD-FRE E
PRODU CT (OPT IONAL )
YEAR 7 = 1997
WEEK 19
A = ASSEMBLY SITE CODE
Page 12
IRF3205ZS/LPbF
D2Pak Tape & Reel Infomation
TRR
FEED DI RECTION
TRL
FEED DIRE CTION
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by T
RG = 25Ω, I
, starting TJ = 25°C, L = 0.08mH
Jmax
= 66A, VGS =10V. Part not
AS
recommended for use above this value.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
C
eff. is a fixed capacitance that gives the
oss
same charging time as C
from 0 to 80% V
DSS
.
oss
while V
DS
is rising
This product has been designed and qualified for the Automotive [Q101]market.
330.00
(14.173)
MAX.
1.60 (.063)
1.85 (.073)
1.65 (.065)
10.90 (.429)
10.70 (.421)
13.50 (.532)
12.80 (.504)
4.10 (.161)
3.90 (.153)
1.50 (.059)
Limited by T
11.60 (.457)
11.40 (.449)
16.10 (.634)
15.90 (.626)
1.60 (.063)
1.50 (.059)
1.75 (.069)
1.25 (.049)
Jmax
27.40 (1.079)
23.90 (.941)
26.40 (1.039)
24.40 (.961)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
4
3
24.30 (.957)
23.90 (.941)
4.72 (.136)
4.52 (.178)
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
4
, see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
This is only applied to TO-220AB pakcage.
This is applied to D
4 or G-10 Material). For recommended footprint and soldering
techniques refer to application note #AN-994.
2
Pak, when mounted on 1" square PCB (FR-
Data and specifications subject to change without notice.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 03/04
12 www.irf.com
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