Page 1
查询IRF3007供应商
PD -94424A
AUTOMOTIVE MOSFET
Typical Applications
● 42 Volts Automotive Electrical Systems
Features
● Ultra Low On-Resistance
● 175°C Operating Temperature
● Fast Switching
● Repetitive Avalanche Allowed up to Tjmax
● Automotive [Q101] Qualified
HEXFET® Power MOSFET
D
G
S
IRF3007
V
= 75V
DSS
R
DS(on)
I
D
= 0.0126Ω
= 75A
Description
Specifically designed for Automotive applications, this
design of HEXFET
lastest processing techniques to achieve extremely low
on-resistance per silicon area. Additional features of
this HEXFET power MOSFET are a 175°C junction
operating temperature, fast switching speed and
improved repetitive avalanche rating. These combine
to make this design an extremely efficient and reliable
device for use in Automotive applications and a wide
variety of other applications.
®
Power MOSFETs utilizes the
TO-220AB
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon limited) 80
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (See Fig.9) 56 A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package limited) 75
I
DM
PD @TC = 25°C Power Dissipation 200 W
V
GS
E
AS
E
(6 sigma) Single Pulse Avalanche Energy Tested Value 946
AS
I
AR
E
AR
T
J
T
STG
Pulsed Drain Current 320
Linear Derating Factor 1.3 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 280 mJ
Avalanche Current See Fig.12a, 12b, 15, 16 A
Repetitive Avalanche Energy mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting Torque, 6-32 or M3 screw 1.1 (10) N•m (lbf•in)
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
Junction-to-Case ––– 0.74
Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
Junction-to-Ambient ––– 62
www.irf.com 1
9/16/02
Page 2
IRF3007
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 640 ––– VGS = 0V, VDS = 0V to 60V
oss
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Starting T
RG = 25Ω, I
I
SD
TJ ≤ 175°C
Pulse width ≤ 400µs; duty cycle ≤ 2%.
2 www.irf.com
Drain-to-Source Breakdown Voltage 75 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.084 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– 10.5 12.6 mΩ VGS = 10V, ID = 48A
Gate Threshold Voltage 2.0 –– – 4.0 V VDS = 10V, ID = 250µA
Forward Transconductance 180 ––– ––– S VDS = 25V, ID = 48A
Drain-to-Source Leakage Current
––– ––– 20
––– ––– 250 VDS = 60V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200
VDS = 75V, VGS = 0V
µA
nA
VGS = -20V
Total Gate Charge ––– 8 9 130 ID = 48A
Gate-to-Source Charge – –– 21 32 nC VDS = 60V
Gate-to-Drain ("Miller") Charge ––– 30 45 VGS = 10V
Turn-On Delay Time ––– 12 ––– VDD = 38V
Rise Time ––– 80 ––– ID = 48A
Turn-Off Delay Time ––– 55 ––– RG = 4.6Ω
ns
Fall Time ––– 49 ––– VGS = 10V
4.5
Internal Drain Inductance
Internal Source Inductance ––– –––
––– –––
7.5
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 3270 ––– VGS = 0V
Output Capacitance ––– 520 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 78 ––– ƒ = 1.0MHz, See Fig. 5
Output Capacitance ––– 3500 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Output Capacitance ––– 340 ––– VGS = 0V, VDS = 60V, ƒ = 1.0MHz
Parameter Min. Typ. Max. Units Conditions
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
80
320
showing the
A
p-n junction diode.
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 48A, VGS = 0V
Reverse Recovery Time ––– 85 130 ns TJ = 25°C, IF = 48A, VDD = 38V
Reverse Recovery Charge ––– 280 420 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
C
eff. is a fixed capacitance that gives the same charging time
oss
= 25°C, L = 0.24mH
J
= 48A, VGS=10V (See Figure 12).
AS
≤ 48A, di/dt ≤ 330A/µs, V
DD
≤ V
(BR)DSS
as C
Limited by T
avalanche performance.
,
This value determined from sample failure population. 100%
oss
while V
is rising from 0 to 80% V
DS
, see Fig.12a, 12b, 15, 16 for typical repetitive
Jmax
DSS
tested to this value in production.
G
G
.
D
S
D
S
Page 3
IRF3007
1000
)
A
(
t
n
e
r
r
100
u
C
e
c
r
u
o
S
-
o
t
-
10
n
i
a
r
D
,
D
I
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
B OTT OM 4.5V
4.5V
20µs PULSE WIDTH
1
0.1 1 10 100
Tj = 25°C
VDS, Drain-to-Source Voltage (V)
1000
)
A
(
t
n
e
r
100
r
u
C
e
c
r
u
o
S
-
o
t
-
n
i
a
r
D
,
D
I
TJ = 175°C
10
1
4.0 5.0 6.0 7.0 8.0 9.0
TJ = 25°C
V
= 25V
DS
20µs PULSE WIDTH
VGS, Gate-t o-Source Voltage (V)
1000
)
A
(
t
n
e
r
r
100
u
C
e
c
r
u
o
S
-
o
t
-
10
n
i
a
r
D
,
D
I
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
B OTT OM 4.5V
4.5V
20µs PULSE WIDTH
1
0.1 1 10 100
Tj = 175°C
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
100
)
S
(
80
e
c
n
a
t
c
u
d
60
n
o
c
s
n
a
r
T
40
d
r
a
w
r
o
F
20
,
s
f
G
0
TJ = 175°C
TJ = 25°C
V
= 25V
DS
20µs PULSE WIDTH
0 40 80 120 160
ID, Drain-to-Source Cur rent (A)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
Vs. Drain Current
www.irf.com 3
Page 4
IRF3007
6000
5000
)
F
4000
p
(
e
c
n
a
t
3000
i
c
a
p
a
C
2000
,
C
1000
0
1 10 100
V
= 0V, f = 1 MHZ
GS
C
= C
iss
SHORTED
C
= C
rss
C
= C
oss
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.0
)
A
(
t
100.0
n
e
r
r
u
C
n
i
a
r
D
e
s
r
e
v
e
R
,
D
S
I
TJ = 175°C
10.0
1.0
TJ = 25°C
0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
VSD, Source-toDrain Voltage (V)
gd
ds
+ Cgd, C
gs
+ C
gd
Ciss
Coss
Crss
V
GS
= 0V
ds
20
ID= 48A
)
V
(
16
e
g
a
t
l
o
V
12
e
c
r
u
o
S
-
o
8
t
-
e
t
a
G
,
S
4
G
V
VDS= 60V
VDS= 38V
VDS= 15V
0
0 40 80 120 160
Q
Total Gate Charge (nC)
G
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
10000
)
A
1000
(
t
n
e
r
r
u
C
e
c
r
u
o
S
-
o
t
-
n
i
a
r
D
,
D
I
100
10
1
Tc = 25°C
Tj = 175°C
Single Puls e
0.1
1 10 100 1000
V
OPERATION IN THIS AREA
LIMITED BY RDS(on)
, Drain-toSource Voltage (V)
DS
100µsec
1msec
10msec
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4 www.irf.com
Page 5
IRF3007
80
LIMITED BY PACKAGE
60
40
D
I , Drain Current (A)
20
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
3.0
2.5
2.0
1.5
I =
D
80A
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature ( C )
J
Fig 10. Normalized On-Resistance
Vs. Temperature
V =
GS
°
10V
D = 0.50
thJC
0.20
0.1
0.10
P
1 2
DM
t
1
t
2
0.05
0.02
Thermal Response (Z )
0.01
0.01
0.00001 0.0001 0.001 0.01 0.1
SINGLE PULSE
(THERMAL RESPONSE)
t , Rectangular Pulse Duration (sec)
1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
J DM thJC C
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
www.irf.com 5
Page 6
IRF3007
A
15V
DRIVER
+
V
DD
-
R
20V
V
V
DS
G
GS
L
D.U.T
I
AS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
600
TOP
500
400
300
200
100
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature ( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
4.0
I
D
20A
34A
48A
°
)
V
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
DS
-
I
D
Fig 13b. Gate Charge Test Circuit
(
e
g
a
t
l
o
3.0
V
d
l
o
h
s
e
r
h
t
e
t
a
2.0
G
)
h
t
(
S
G
V
-
1.0
-75 -50 -2 5 0 25 50 75 100 125 150 175
ID = 250µA
TJ , Temperature ( °C )
Fig 14. Threshold Voltage Vs. Temperature
6 www.irf.com
Page 7
IRF3007
1000
Duty Cycle = Single Pulse
Allowed avalanche Current vs
100
)
A
(
t
n
e
r
r
u
C
10
e
h
c
n
a
l
a
v
A
1
0.1
1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
0.01
0.05
0.10
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
300
TOP Single Pulse
BOTTOM 50% Duty Cycle
)
J
m
(
y
g
200
r
e
n
E
e
h
c
n
a
l
a
v
100
A
,
R
A
E
ID = 48A
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T
every part type.
2. Safe operation in Avalanche is allowed as long asT
not exceeded.
. This is validated for
jmax
jmax
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. P
avalanche pulse.
= Average power dissipation per single
D (ave)
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
= Allowable avalanche current.
av
7. ∆T = Allowable rise in junction temperature, not to exceed
T
(assumed as 25°C in Figure 15, 16).
0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
jmax
t
Average time in avalanche.
av =
D = Duty cycle in avalanche = t
Z
(D, tav) = Transient thermal resistance, see figure 11)
thJC
P
= 1/2 ( 1.3·BV·Iav) = DT/ Z
D (ave)
I
2DT/ [1.3·BV·Zth]
av =
E
AS (AR)
= P
·f
av
D (ave)·tav
thJC
www.irf.com 7
is
Page 8
IRF3007
+
-
+
-
Reverse
Recovery
Current
Driver Gate Drive
P.W.
D.U.T. ISDWaveform
D.U.T. VDSWaveform
D.U.T
+
-
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
-
• Low Leakage Inductance
Current Transformer
-
+
V
DD
R
G
• dv/dt controlled by R
• Driver same type as D.U.T.
• I
controlled by Duty Factor "D"
SD
• D.U.T. - Device Under Test
G
Re-Applied
Voltage
Inductor Curent
* V
GS
Period
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
= 5V for Logic Level Devices
D =
P.W.
Period
VGS=10V
V
DD
I
SD
*
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
R
D.U.T.
D
V
DD
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 18b. Switching Time Waveforms
8 www.irf.com
Page 9
TO-220AB Package Outline
E
X
A
M
P
L
E
:
T
H
I
S
I
S
A
N
I
R
F
1
0
1
0
L
O
T
C
O
D
E
1
7
8
9
A
S
S
E
M
B
L
E
D
O
N
W
W
1
9
,
1
9
9
7
I
N
T
H
E
A
S
S
E
M
B
L
Y
L
I
N
E
"
C
"
I
N
T
E
R
N
A
T
I
O
N
A
L
R
E
C
T
I
F
I
E
R
L
O
G
O
A
S
S
E
M
B
L
Y
L
O
T
C
O
D
E
P
A
R
T
N
U
M
B
E
R
D
A
T
E
C
O
D
E
Y
E
A
R
7
=
1
9
9
7
W
E
E
K
1
9
L
I
N
E
C
Dimensions are shown in millimeters (inches)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
10.54 (.415)
10.29 (.405)
1 2 3
4
6.47 (.255)
6.10 (.240)
1.15 (.045)
MIN
4.06 (.160)
3.55 (.140)
3.78 (.149)
3.54 (.139)
- A -
4.69 (.185)
4.20 (.165)
- B -
1.32 (.052)
1.22 (.048)
IRF3007
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
0.93 (.037)
3X
1.40 (.055)
3X
1.15 (.045)
2.54 (.100)
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DI MENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT I NC LUDE BURRS.
2X
0.69 (.027)
0.36 (.014) M B A M
0.55 (.022)
3X
0.46 (.018)
2.92 (.115)
2.64 (.104)
TO-220AB Part Marking Information
TO-220AB package is not recommended for Surface Mount Application
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 9/02
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