Page 1
Integrated
Circuit
Systems, Inc.
General Description Features
ICS9148-60
Block Diagram
Pentium/ProTM System Clock Chip
9148-60 Rev D 10/19/99
Pin Configuration
28 pin SOIC and SSOP
Pentium is a trademark on Intel Corporation.
Generates system clocks for CPU, PCI, IOAPIC ,
14.314 MHz, 48 and 24MHz.
Supports single or dual processor systems
Skew from CPU (earlier) to PCI clock 1 to 4ns
Separate 2.5V and 3.3V supply pins
2.5V outputs: CPU, IOAPIC
3.3V outputs: PCI, REF
No power supply sequence requirements
28 pin SOIC and SSOP
Spread Spectrum operation optional for PLL1
CPU frequencies to 100MHz are supported.
The ICS9148-60 is part of a reduced pin count two-chip clock
solution for designs using an Intel BX style chipset.
Companion SDRAM buffers are ICS9179-11 and 12.
There are two PLLs, with the first PLL capable of spread
spectrum operation. Spread spectrum typically reduces system
EMI by 8-10dB. The second PLL provides support for USB
(48MHz) and 24MHz requirements. CPU frequencies up to
100MHz are supported.
The I
2
C interface allows stop clock programming, frequency
selection, and spread spectrum operation to be programmed.
Clock outputs include two CPU (2.5V or 3.3V), seven PCI
(3.3V), one REF (3.3V), one IOAPIC (2.5V or 3.3V), one 48MHz,
and one selectable 48_24MHz.
Ground Groups
GND = Ground Source Core
GND1 = REF0, X1, X2
GND2 = PCICLK_F, PCICLK (0:5)
GND3=48MHz
GNDL = CPUCLK (0:1)
Power Groups
VDD = Supply for PLL core
VDD1 = REF0, X1, X2
VDD2 = PCICLK_F, PCICLK (0:5)
VDD3 = 48MHz
VDDL = CPUCLK (0:1)
VDDL1=IOAPIC
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
Page 2
2
ICS9148-60
Pin Descriptions
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Page 3
3
ICS9148-60
1. The ICS clock generator is a slave/receiver, I2C component. It can read back the data stored in the latches for verification.
Read-Back will support Intel PIIX4 "Block-Read" protocol.
2. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode)
3. The input is operating at 3.3V logic levels.
4. The data byte format is 8 bit bytes.
5. To simplify the clock generator I2C interface, the protocol is set to use only "Block-Writes" from the controller. The
bytes must be accessed in sequential order from lowest to highest byte with the ability to stop after any complete byte
has been transferred. The Command code and Byte count shown above must be sent, but the data is ignored for those
two bytes. The data is loaded until a Stop sequence is issued.
6. At power-on, all registers are set to a default condition, as shown.
General I2C serial interface information
The information in this section assumes familiarity with I2C programming.
For more information, contact ICS for an I2C programming application note.
How to Write:
Controller (host) sends a start bit.
Controller (host) sends the write address D2
(H)
ICS clock will acknowledge
Controller (host) sends a dummy command code
ICS clock will acknowledge
Controller (host) sends a dummy byte count
ICS clock will acknowledge
Controller (host) starts sending first byte (Byte 0)
through byte 5
ICS clock will acknowledge each byte one at a time.
Controller (host) sends a Stop bit
How to Read:
Controller (host) will send start bit.
Controller (host) sends the read address D3
(H)
ICS clock will acknowledge
ICS clock will send the byte count
Controller (host) acknowledges
ICS clock sends first byte (Byte 0) through byte 6
Controller (host) will need to acknowledge each byte
Controller (host) will send a stop bit
Notes:
Controller (Host) ICS (S lave/Receiver)
Start Bit
Address
D2
(H)
AC
K
Dummy C ommand Co de
AC
K
Dummy Byte Count
AC
K
Byte 0
ACK
Byte 1
AC
K
Byte 2
AC
K
Byte 3
ACK
Byte 4
AC
K
Byte 5
AC
K
Byte 6
ACK
Stop Bit
How to Write:
Controller (Host) ICS (Slave/Receiver)
Start Bit
Address
D3
(H)
AC
K
Byte Coun
t
ACK
Byte
0
ACK
Byte 1
ACK
Byte
2
ACK
Byte
3
ACK
Byte
4
ACK
Byte
5
ACK
Byte
6
ACK
Stop Bit
How to Read:
Page 4
4
ICS9148-60
Note: PWD = Power-Up Default
Byte 3: Functionality & Frequency Select
& Spread Slect Register
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 4:
Notes: 1 = Enabled; 0 = Disabled, outputs held low
tiB#niPemaNniPDWP
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7- - - )devreseR()devreseR(
6- - - )devreseR()devreseR(
5- - - )devreseR()devreseR(
4- - - )devreseR()devreseR(
3- - - )devreseR()devreseR(
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delbasiD
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delbanE
1- - 0 )devreseR()devreseR(
0220KLCUPC1
)delbasiD(
)wol(
delbanE
Byte 5:
Notes: 1 = Enabled; 0 = Disabled, outputs held low
tiB#niPemaNniPDWP
noitpircseD
0=eulaVtiB1=eulaVtiB
74 F_KLCICP1
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38 3KLCICP1
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delbanE
27 2KLCICP1
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delbanE
16 1KLCICP1
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05 0KLCICP1
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Serial Bitmap
Byte 6:
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Notes:
1 = Enabled; 0 = Disabled, outputs held low
For pin 27, there are 2 output stages together for 1 pin. These 2
latches must be both 0 or 1 simultaneously or there will be a short to
ground if one is disabled and the other is running.
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010
110
001
101
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5.86
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Page 5
5
ICS9148-60
Absolute Maximum Ratings
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND 0.5 V to V
DD
+0.5 V
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . 65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
Ele c trical Char a cteristics - I nput/Suppl y/Common Output Par a m e ters
TA = 0 - 70C; Supply V o ltage VDD = V
DDL
= 3.3 V +/-5% (unless otherwise stated)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input High Voltage V
IH
2V
DD
+0.3 V
Input Low Voltage V
IL
VSS-0.3 0.8 V
Input High Current I
IH
VIN = V
DD
0.1 5
µ
A
Input Low Current I
IL1
VIN = 0 V; Inputs w ith no pul l-u p re sistors -5 2.0
µ
A
Input Low Current I
IL2
VIN = 0 V; I nputs wit h pull -up r e sis t ors -200 -100
µ
A
Operating I
DD3.3OP6 6CL
= 0 pF ; Selec t @ 66MHz 60 170 mA
Supply Current I
DD3.3OP100CL
= 0 pF ; Selec t @ 100MH z 66 170 mA
Power Down Supply
Current
I
DD3.3PD
CL = 0 pF ; With input address to V dd or GND 3 650
µ
A
I nput frequency F
i
VDD = 3.3 V; 14.318 MHz
C
IN
Logic Inputs 5 pF
C
INX
X1 & X2 pins 27 36 45 pF
Transition Time
1
T
trans
To 1st crossing of target Freq. 3 ms
Settling Time
1
T
s
From 1s t c rossing to 1% target F req. 5 ms
Clk Stabilization
1
T
STAB
From VDD = 3.3 V to 1% ta rget Fr e q. 3 ms
Skew
1
T
AGP-PCI1VT
= 1.5 V; 1 3.5 4 ns
1
Gua rante e d by design, not 100% te sted in production.
Input Capacitance
1
Electrical Characteri st i cs - I nput/ Supply/Comm on Out put Paramet er s
TA = 0 - 70C; Supply Voltage VDD = 3.3 V +/-5%, V
DDL
= 2.5 V +/-5% (unless otherwise stated)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Operating I
DD2.5OP66
CL = 0 pF; Select @ 66.8 MHz 16 72 mA
Supply Curr ent I
DD2.5OP100CL
= 0 pF; Select @ 100 MHz 23 100 mA
Power Down
Su
pply
Current
I
DD2.5PD
CL = 0 pF; With input addre ss t o Vdd or G ND 10 100
µ
A
t
CPU-AGP
00.51ns
t
CPU-PCI2
VT = 1.5 V; VTL = 1.25 V 1 2.6 4 ns
1
Gua rante ed by design, not 100% teste d in production.
Skew
1
Page 6
6
ICS9148-60
Electri cal Characteri st i cs - CPUCLK
TA = 0 - 70C; VDD = 3.3 V +/ -5%, V
DDL
= 2.5 V +/-5%; CL = 20 pF ( unl e ss oth erwise state d)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
O utp ut High Voltage V
OH2B
IOH = -12. 0 mA 2 2.3 V
Output Low Voltage V
OL2B
IOL = 12 mA 0.2 0.4 V
O utpu t High Curr ent I
OH2B
VOH = 1 .7 V -41 -19 m A
Ou tput Low C urrent I
OL2B
VOL = 0.7 V 19 37 mA
Rise Time
t
r2B
1
VOL = 0.4 V, VOH = 2 .0 V 1.25 1.6 ns
Fall T im e
t
f2B
1
VOH = 2.0 V, VOL = 0 .4 V 1 1.6 ns
Duty Cycle
d
t2B
1
VT = 1.25 V 454855%
Skew
t
sk2B
1
VT = 1.25 V 30 175 ps
Jitter, Cycle -to-c ycle
t
jcy
c-cyc2B
1
VT = 1.25 V 150 250 ps
Jitter, One Sigma
t
j
1s2B
1
VT = 1.25 V 40 150 ps
Jitter, Absolute t
jabs2B
1
VT = 1.25 V -250 140 + 250 ps
1
G ua rante e d by d e sign, not 100% tes ted in pr odu c ti on.
Electrical Characteristics - PCICLK
TA = 0 - 70C; VDD = V
DDL
= 3.3 V +/-5%; CL = 30 pF
PARA METER SYMBOL CONDITI O N S MIN TYP MAX UNITS
Output High Voltage V
OH1
IOH = - 11 mA 2.4 3.1 V
Output Low Voltage V
OL1
IOL = 9. 4 mA 0.1 0.4 V
O utput H igh C ur r e nt I
OH1
VOH = 2 . 0 V -62 - 22 mA
O utput L ow C ur rent I
OL1
VOL = 0. 8 V 16 57 mA
Rise Tim e
1
t
r1
VOL = 0. 4 V, VOH = 2.4 V 1.5 2 ns
Fa ll Tim e
1
t
f1
VOH = 2.4 V, VOL = 0.4 V 1.1 2 ns
Duty Cycle
1
d
t1
VT = 1.5 V 455055%
Skew
1
t
sk1
VT = 1. 5 V 140 500 ps
Jitter, One S ig ma
1
t
j
1s1
VT = 1. 5 V 17 150 ps
Jitter, Abs o lute
1
t
jabs1
VT = 1. 5 V -500 70 500 ps
1
G uarantee d by de s ign, not 100% tes ted in production.
Page 7
7
ICS9148-60
Electri cal Characteri sti cs - I O A PI C
TA = 0 - 70C; VDD = 3.3 V +/-5%, V
DDL
= 2.5 V +/-5%; CL = 20 pF
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Output High Voltage V
OH4BIOH
= -18 m A 2 2.2 V
Output Low Voltage V
OL4BIOL
= 18 m A 0.33 0.4 V
Ou tput Hi gh Curr ent I
OH4B
VOH = 1.7 V -41 -28 mA
O ut put Low Current I
OL4B
VOL = 0.7 V 29 37 mA
Rise Time
1
T
r4B
VOL = 0.4 V, VOH = 2.0 V 1.3 1.6 ns
Fall Time
1
T
f4B
VOH = 2.0 V, VOL = 0.4 V 1.1 1.6 ns
Duty Cycle
1
D
t4B
VT = 1.25 V 45 54 55 %
Skew
1
t
sk4B
1
VT = 1.25 V 60 250 ps
Jitter, One Sigm a
1
T
j1s4B
VT = 1.25 V 1 3 %
Jitter, Absolute
1
T
jabs4B
VT = 1.25 V -5 5 %
1
Guara nte e d by de sign, not 100% tested i n production.
Electri cal Characteri st i cs - REF
TA = 0 - 70C; VDD = V
DDL
= 3.3 V +/-5%; CL = 20 pF ( unless otherwise stated)
PARAMETER SYMBOL CONDITIONS MIN TY P MAX UNITS
O utput High Voltage V
OH5
IOH = -12 mA 2.6 3.1 V
Output Low Voltage V
OL5
IOL = 9 mA 0.17 0.4 V
Ou tput High Current I
OH5
VOH = 2.0 V -44 -22 m A
Output Low Current I
OL5
VOL = 0.8 V 29 42 mA
Rise Time
1
t
r5
VOL = 0.4 V, VOH = 2.4 V 1.4 2 ns
Fall Time
1
t
f5
VOH = 2.4 V , VOL = 0.4 V 1.1 2 ns
Duty Cycle
1
d
t5
VT = 1.5 V 47 54 57 %
Jitter, One Sigm a
1
t
j1s5
VT = 1.5 V 1 3 %
Jitter, Absol ute
1
t
jabs5
VT = 1.5 V
35%
1
Guar ant eed by design, not 10 0% tested in production.
Page 8
8
ICS9148-60
Electri cal Characteri sti cs - 48, 24 M Hz
TA = 0 - 70C; VDD = V
DDL
= 3.3 V +/-5%; CL = 20 pF ( unless otherwise stated)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
O utput High Vol t age V
OH5
IOH = -12 mA 2.6 3 V
Output Low Voltage V
OL5
IOL = 9 mA 0.14 0.4 V
Ou tput High Current I
OH5
VOH = 2.0 V -44 -22 m A
Output Low Current I
OL5
VOL = 0.8 V 16 42 mA
Rise Tim e
1
t
r5
VOL = 0.4 V, VOH = 2.4 V 1.2 4 ns
Fall Time
1
t
f5
VOH = 2.4 V , VOL = 0.4 V 1.2 4 ns
Duty Cycle
1
d
t5
VT = 1.5 V 45 52 55 %
Jitter, One Si gma
1
t
j1s5
VT = 1.5 V 1 3 %
Jitter, Absolute
1
t
jabs5
VT = 1.5 V 3 5 %
1
Guar anteed by design, not 1 00% tested in pr oduc tion.
Page 9
9
ICS9148-60
SOIC Package
TNUOCDAELL82
LNOISNEMID407.0
Ordering Information
ICS9148yM-60
Pattern Number (2 or 3 digit number for parts with ROM code patterns)
Package Type
M = SOIC
Revision Designator (will not correlate with datasheet revision)
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS, AV = Standard Device
Example:
ICS XXXX y M - PPP
Page 10
10
ICS9148-60
SSOP Package
Dimensions in inches
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
LOBMYS
NOMMOC
SNOISNEMID
SNOITAIRAV
D
.NIM.MON.XAMN .NIM.MON.XAM
A860.0370.0870.041932.0442.0942.0
1A200.0500.0800.061932.0442.0942.0
2A660.0860.0070.002872.0482.0982.0
b010.0210.0510.042813.0323.0823.0
c400.0600.0800.082793.0204.0704.0
DsnoitairaVeeS03793.0204.0704.0
E502.0902.0212.0
eCSB6520.0
H103.0703.0113.0
L520.0030.0730.0
NsnoitairaVeeS
µ
°0°4 °8
Ordering Information
ICS9148yF-60
Pattern Number (2 or 3 digit number for parts with ROM code patterns)
Package Type
F=SSOP
Revision Designator (will not correlate with datasheet revision)
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS, AV = Standard Device
Example:
ICS XXXX y F - PPP
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