Datasheet HUF75333P3 Datasheet (intersil)

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HUF75333G3, HUF75333P3, HUF75333S3S

Data Sheet June 1999 File Number

66A, 55V, 0.016 Ohm. N-Channel UltraFET
Power MOSFETs

These N-Channel powerMOSFETs
are manufactured using the
innovative UltraFET™ process.

This advanced process technology
achieves the lowest possible on-resistance per silicon area,
resulting in outstanding performance. This device is capable
of withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching convertors, motor drivers, relay drivers, low­voltage bus switches, and power management in portable
and battery-operated products.

Formerly developmental type TA75333.

Ordering Information

PART NUMBER PACKAGE BRAND

HUF75333G3 TO-247 75333G
HUF75333P3 TO-220AB 75333P
HUF75333S3S TO-263AB 75333S

NOTE: Whenordering, use the entire part number. Add the suffix T to
obtain the TO-263AB variant in tape and reel, e.g., HUF75333S3ST.

Features

• 66A, 55V

• Simulation Models

®

- Temper ature Compensated PSPICE

and SABER

Models

- SPICE and SABER Thermal Impedance Models
Available on the WEB at:
www.Intersil.com/families/models.htm

• Peak Current vs Pulse Width Curve

• UIS Rating Curve

• Related Literature

- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”

Symbol

D

G

S

4362.5

©

Packaging

DRAIN
(TAB)

JEDEC STYLE TO-247 JEDEC TO-220AB

SOURCE

DRAIN

GATE

GATE
SOURCE

JEDEC TO-263AB

(FLANGE)

DRAIN

(FLANGE)

DRAIN

SOURCE

DRAIN

GATE

103

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

UltraFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.

SABER is a Copyright of Analogy, Inc. http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

HUF75333G3, HUF75333P3, HUF75333S3S

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DSS

DGR

GS

55 V
55 V

±20 V

Drain Current

Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

D

DM

AS

D

Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

66

Figure 4

Figures 6, 14, 15

150

1

-55 to 175

300
260

A

W

W/oC

o

C

o

C

o

C

NOTE:

1. TJ = 25oC to 150oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

OFF STATE SPECIFICATIONS

Drain to Source Breakdown Voltage BV
Zero Gate Voltage Drain Current I

DSSID

DSS

= 250µA, VGS = 0V (Figure 11) 55 - - V
VDS = 50V, VGS = 0V - - 1 µA
VDS = 45V, VGS = 0V, TC = 150oC - - 250 µA

Gate to Source Leakage Current I

GSS

VGS = ±20V - - ±100 nA

ON STATE SPECIFICATIONS

Gate to Source Threshold Voltage V
Drain to Source On Resistance r

GS(TH)VGS

DS(ON)ID

= VDS, ID = 250µA (Figure 10) 2 - 4 V

= 66A, VGS = 10V (Figure 9) - 0.013 0.016 Ω

THERMAL SPECIFICATIONS

Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R

θJC
θJA

(Figure 3) - - 1
TO-247 - - 30
TO-220, TO-263 - - 62

o

C/W

o

C/W

o

C/W
SWITCHING SPECIFICATIONS (VGS = 10V)
Turn-On Time t
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Turn-Off Time t

ON

OFF

VDD = 30V, ID≅ 66A,
RL = 0.455Ω, VGS= 10V,
RGS = 6.8Ω

r

f

- - 100 ns

-12- ns

-55- ns

-11- ns

-25- ns

- - 55 ns

GATE CHARGE SPECIFICATIONS

Total Gate Charge Q
Gate Charge at 10V Q
Threshold Gate Charge Q
Gate to Source Gate Charge Q
Reverse Transfer Capacitance Q

g(TOT)VGS

g(10)

g(TH)

gs
gd

= 0V to 20V VDD = 30V,
VGS = 0V to 10V - 40 50 nC
VGS = 0V to 2V - 2.5 3.0 nC

ID≅ 66A,
RL = 0.455Ω
I

= 1.0mA

g(REF)

(Figure 13)

-7085nC

- 6.2 - nC

-16-nC

104

HUF75333G3, HUF75333P3, HUF75333S3S

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

CAPACITANCE SPECIFICATIONS

Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage V
Reverse Recovery Time t
Reverse Recovered Charge Q

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 150

TC, CASE TEMPERATURE (oC)

125 175

ISS

OSS

RSS

SD

rr

RR

VDS = 25V, VGS = 0V,
f = 1MHz
(Figure 12)

- 1300 - pF

- 480 - pF

- 115 - pF

ISD = 66A - - 1.25 V
ISD = 66A, dISD/dt = 100A/µs--75ns
ISD = 66A, dISD/dt = 100A/µs - - 140 nC

70

60

50

40

30

20

, DRAIN CURRENT (A)

D

I

10

0

50 75 100 125 150 17525

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

2

DUTY CYCLE - DESCENDING ORDER

0.5

1

0.2

0.1

0.05

0.02

0.01

0.1

, NORMALIZED

θJC

Z

THERMAL IMPEDANCE

0.01

-5

10

SINGLE PULSE

-4

10

-3

10

t, RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

105

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

P

DM

t

1

NOTES:
DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-2

10

-1

10

1/t2

x R

θJC

θJC

0

10

t

+ T

2

C

1

10

HUF75333G3, HUF75333P3, HUF75333S3S

Typical Performance Curves

1000

VGS = 10V

, PEAK CURRENT (A)

100

I

DM

TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION

50

-5

10

500

100

-4

10

(Continued)

-3

10

t, PULSE WIDTH (s)

-2

10

FIGURE 4. PEAK CURRENT CAPABILITY

TJ = MAX RATED

T

= 25oC

C

TC = 25oC

-1

10

500

If R = 0
tAV = (L)(IAS)/(1.3*RATED BV

If R ≠ 0

= (L/R)ln[(IAS*R)/(1.3*RATED BV

t

AV

FOR TEMPERATURES
ABOVE 25
CURRENT AS FOLLOWS:

I = I

o

C DERATE PEAK

25

0

10

- VDD)

DSS

175 - T

150

- VDD) +1]

DSS

C

1

10

100µs

10

, DRAIN CURRENT (A)

D

I

OPERATION IN THIS
AREA MAY BE
LIMITED BY r

V

DSS(MAX)

1

1

V

DS

DS(ON)

= 55V

10 100

, DRAIN TO SOURCE VOLTAGE (V)

1ms

10ms

FIGURE 5. FORWARD BIAS SAFE OPERATING AREA

150

120

90

60

, DRAIN CURRENT (A)

D

I

30

0

1.5 3.0 4.5 6.0 7.50
VDS, DRAIN TO SOURCE VOLTAGE (V)

V

= 20V

GS

VGS = 10V

VGS = 7V
VGS = 6V

VGS = 5V

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T

= 25oC

C

200

100

, AVALANCHE CURRENT (A)

AS

I

10

0.001

STARTING TJ = 150oC

0.01 0.1 1 10
tAV, TIME IN AVALANCHE (ms)

STARTING TJ = 25oC

NOTE: Refer to Intersil Application Notes AN9321 and AN9322.

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY

150

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

= 15V

V

DD

120

90

60

, DRAIN CURRENT (A)

D

I

30

0

1.5 3.0 4.5 6.0 7.50
V

, GATE TO SOURCE VOLTAGE (V)

GS

-55oC

25oC

175oC

FIGURE 7. SATURATION CHARACTERISTICS FIGURE 8. TRANSFER CHARACTERISTICS

106

HUF75333G3, HUF75333P3, HUF75333S3S

Typical Performance Curves

2.5

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = 10V, ID = 66A

2.0

1.5

ON RESISTANCE

1.0

NORMALIZED DRAIN TO SOURCE

0.5

-40 0 40 80 120 160 200

-80
TJ, JUNCTION TEMPERATURE (oC)

(Continued)

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

1.2
ID = 250µA

1.1

1.0

1.2
VGS = VDS, ID = 250µA

1.0

0.8

NORMALIZED GATE

0.6

THRESHOLD VOLTAGE

0.4

-80 -40 0 40 80 120 160 200
T

, JUNCTION TEMPERATURE (oC)

J

FIGURE 10. NORMALIZED GATETHRESHOLD VOLTAGEvs

JUNCTION TEMPERATURE

2000

1500

1000

C

ISS

VGS= 0V, f = 1MHz

= CGS + C

C
C
C

ISS
RSS
OSS

= C

≈ C

GD

DS

GD

+ C

GD

0.9

BREAKDOWN VOLTAGE

NORMALIZED DRAIN TO SOURCE

0.8

-40 0 40 80 120 160 200

-80
TJ, JUNCTION TEMPERATURE (oC)

FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

10

, GATE TO SOURCE VOLTAGE (V)

GS

V

= 30V

V

DD

8

6

4

2

0

0

10 20 30 40

Q

NOTE: Refer to Intersil Application Notes AN7254 and AN7260.

FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT

C, CAPACITANCE (pF)

FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

WAVEFORMS IN
DESCENDING ORDER:

, GATE CHARGE (nC)

g

500

0

0

ID = 66A
I

= 50A

D

I

= 33A

D

= 16A

I

D

C

OSS

C

RSS

10 20 30 40 50 60

VDS, DRAIN TO SOURCE VOLTAGE (V)

107

HUF75333G3, HUF75333P3, HUF75333S3S

Test Circuits and Waveforms

V

DS

BV

DSS

L

VARY t

TO OBTAIN

P

REQUIRED PEAK I

V

GS

AS

R

G

+

V

DD

-

DUT

0V

P

I

AS

0.01Ω

0

t

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

V

I

G(REF)

DS

R

L

V

GS

+

V

DD

-

DUT

V

DD

VGS= 2V

0

I

g(REF)

0

V

GS

Q

g(TH)

Q

gs

t

P

I

AS

t

AV

Q

g(TOT)

V

DS

Q

g(10)

VGS = 10V

Q

gd

V

DS

V

DD

VGS= 20V

FIGURE 16. GATE CHARGE TEST CIRCUIT FIGURE 17. GATE CHARGE WAVEFORM

V

DS

R

L

V

GS

+

V

DD

-

V

DS

0

DUT

R

GS

V

GS

V

GS

10%

0

t

d(ON)

90%

t

ON

50%

t

10%

r

PULSE WIDTH

FIGURE 18. SWITCHING TIME TEST CIRCUIT FIGURE 19. RESISTIVE SWITCHING WAVEFORMS

108

t

d(OFF)

90%

t

OFF

50%

t

f

90%

10%

HUF75333G3, HUF75333P3, HUF75333S3S

PSPICE Electrical Model

.SUBCKT HUF75333 2 1 3 ; rev 02/24/99

CA 12 8 1.8e-9
CB 15 14 1.73e-9
CIN 6 8 1.19e-9

DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD

EBREAK 11 7 17 18 58.85
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1

ESG

EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1

GATE

IT 8 17 1
LDRAIN 2 5 1e-9

LGATE

1

RLGATE

9

RGATE

EVTEMP
+

18
22

20

LGATE 1 9 1e-9
LSOURCE 3 7 1e-9
K1 LSOURCE LGATE 0.0085

MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD

RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 4.50e-3
RGATE 9 20 1

CA

S1A

12

13

S1B

RLDRAIN 2 5 10
RLGATE 3 7 10
RLSOURCE 3 7 11

EGS EDS

RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 5.95e-3
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1

S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD

VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*180),4))}
.MODEL DBODYMOD D (IS = 1.3e-12 RS =0.003 TRS1 = 2.7e-3 TRS2 = 7e-7 CJO = 1.7e-9 TT = 40e-8 M = 0.45 IKF= 20 XTI= 6)

.MODEL DBREAKMOD D (RS = 0.1e-1 TRS1 = -4e-4 TRS2 = 1.55e-5 IKF= 1e-5)
.MODEL DPLCAPMOD D (CJO = 1.8e-9 IS = 1e-30 N = 1 M = 0.9 vj= 1.45)
.MODEL MMEDMOD NMOS (VTO = 3.183 KP = 2 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 1)
.MODEL MSTROMOD NMOS (VTO = 3.66 KP = 51.5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 2.703 KP = 0.008 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 10 )
.MODEL RBREAKMOD RES (TC1 = 1.05e-3 TC2 = 4.5e-7)
.MODEL RDRAINMOD RES (TC1 = 1.16e-2 TC2 = 1.7e-5)
.MODEL RSLCMOD RES (TC1 = 3.96e-3 TC2 = 2.7e-6)
.MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-5)
.MODEL RVTHRESMOD RES (TC = -2.8e-3 TC2 = -1.0e-6)
.MODEL RVTEMPMOD RES (TC1 = -2.75e-3 TC2 = 0.5e-6)

.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -8 VOFF= -3)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3 VOFF= -8)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0 VOFF= 0.5)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.5 VOFF= 0)

.ENDS

DPLCAP

10

RSLC2

-

6
8

EVTHRES

+

+

6

-

S2A

14

8

13

S2B

13

+

+

6
8

-

-

5

RSLC1

51

+

5

ESLC

51

-

50
RDRAIN

16

21

-

19

8

MMED

MSTRO

CIN

15

CB

+

8

14

5
8

-

DBREAK

EBREAK

MWEAK

RSOURCE

RBREAK

17 18

IT

8

RVTHRES

11

+

17
18

-

7

RVTEMP
19

-

+

22

LDRAIN

RLDRAIN

DBODY

LSOURCE

RLSOURCE

VBAT

DRAIN

2

SOURCE

3

NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.

109

HUF75333G3, HUF75333P3, HUF75333S3S

SABER Electrical Model

REV August 1997
template huf75333 n2, n1, n3

electrical n2, n1, n3
{
var i iscl
d..model dbodymod = (is = 1.3e-12, xti = 6, cjo = 1.7e-9, tt = 40e-8, n = 1, m = 0.45, vj=0.75)
d..model dbreakmod = ()
d..model dplcapmod = (cjo = 1.8e-9, is = 1e-30, n = 1, m = 0.9, vj = 1.45, fc=0.5)
m..model mmedmod = (type=_n, vto = 3.183, kp = 2, is = 1e-30, tox = 1)
m..model mstrongmod = (type=_n, vto = 3.66, kp = 51.5, is = 1e-30, tox = 1)
m..model mweakmod = (type=_n, vto = 2.703, kp = 8e-3, is = 1e-30, tox = 1)
sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -8, voff = -3)
sw_vcsp..model s1bmod = (ron = 1e-5, roff = 0.1, von = -3, voff = -8)
sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = 0, voff = .5)
sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = .5, voff = 0)

c.ca n12 n8 = 1.8e-9
c.cb n15 n14 = 1.73e-9
c.cin n6 n8 = 1.19e-9

d.dbody n7 n71 = model=dbodymod

ESG

d.dbreak n72 n11 = model=dbreakmod
d.dplcap n10 n5 = model=dplcapmod

GATE

i.it n8 n17 = 1
l.ldrain n2 n5 = 1e-9

LGATE

1

RLGATE

RGATE

9

EVTEMP
+

18
22

20

l.lgate n1 n9 = 1e-9
l.lsource n3 n7 = 1e-9

m.mmed n16 n6 n8 n8 = model=mmedmod, l = 1u, w = 1u
m.mstrong n16 n6 n8 n8 = model=mstrongmod, l = 1u, w = 1u
m.mweak n16 n21 n8 n8 = model=mweakmod, l = 1u, w = 1u

res.rbreak n17 n18 = 1, tc1 = 1.07e-3, tc2 = 4.5e-7
res.rdbody n71 n5 = 3e-3, tc1 = 2.7e-3, tc2 = 7e-7
res.rdbreak n72 n5 = 1.1e-1, tc1 = -4e-4, tc2 = -1.55e-5
res.rdrain n50 n16 = 4.5e-3, tc1 = 1.16e-2, tc2 = 1.7e-5
res.rgate n9 n20 = 1
res.rldrain n2 n5 = 10

CA

S1A

12

13

S1B

EGS EDS

res.rlgate n1 n9 = 10
res.rlsource n3 n7 = 10
res.rslc1 n5 n51 = 1e-6, tc1 = 3.96e-3, tc2 = 2.7e-6
res.rslc2 n5 n50 = 1e3
res.rsource n8 n7 = 5.95e-3, tc1 = 1e-3, tc2 = 1e-5
res.rvtemp n18 n19 = 1, tc1 = -2.75e-3, tc2 = 0.5e-6
res.rvthres n22 n8 = 1, tc1 = -2.8e-3, tc2 = -1e-6

spe.ebreak n11 n7 n17 n18 = 58.85
spe.eds n14 n8 n5 n8 = 1
spe.egs n13 n8 n6 n8 = 1
spe.esg n6 n10 n6 n8 = 1
spe.evtemp n20 n6 n18 n22 = 1
spe.evthres n6 n21 n19 n8 = 1

sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod
sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod
sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod
sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod

v.vbat n22 n19 = dc = 1
equations {

i (n51->n50) + = iscl
iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/180))** 4))
}
}

DPLCAP

10

RSLC2

-

6
8

EVTHRES

+

+

19

8

6

-

S2A

14

8

13

S2B

13

+

+

6
8

-

-

CIN

15

CB

-

+

5
8

-

5

RSLC1

51

50
RDRAIN

21

MSTRO

14

ISCL

16

8

RDBREAK

MMED

8

72

DBREAK

11

MWEAK

EBREAK

+

17
18

-

RSOURCE

RBREAK

17 18

IT

RVTHRES

71

7

RLSOURCE

RVTEMP
19

-

+

22

LDRAIN

RLDRAIN

RDBODY

DBODY

LSOURCE

VBAT

DRAIN

2

SOURCE

3

110

SPICE Thermal Model

REV January 1999

HUF75333

CTHERM1 th 6 4.9e-4
CTHERM2 6 5 4.5e-3
CTHERM3 5 4 6.0e-3
CTHERM4 4 3 8.5e-3
CTHERM5 3 2 1.0e-2
CTHERM6 2 tl 5.0e-2

RTHERM1 th 6 6.0e-4
RTHERM2 6 5 6.8e-3
RTHERM3 5 4 3.3e-2
RTHERM4 4 3 9.7e-2
RTHERM5 3 2 3.3e-1
RTHERM6 2 tl 3.6e-1

HUF75333G3, HUF75333P3, HUF75333S3S

JUNCTION

th

RTHERM1

6

RTHERM2

5

CTHERM1

CTHERM2

SABER Thermal Model

SABER thermal model HUF75333
template thermal_model th tl

thermal_c th, tl
{
ctherm.ctherm1 th 6 = 4.9e-4
ctherm.ctherm2 6 5 = 4.5e-3
ctherm.ctherm3 5 4 = 6.0e-3
ctherm.ctherm4 4 3 = 8.5e-3
ctherm.ctherm5 3 2 = 1.0e-2
ctherm.ctherm6 2 tl = 5.0e-2

rtherm.rtherm1 th 6 = 6.0e-4
rtherm.rtherm2 6 5 = 6.8e-3
rtherm.rtherm3 5 4 = 3.3e-2
rtherm.rtherm4 4 3 = 9.7e-2
rtherm.rtherm5 3 2 = 3.3e-1
rtherm.rtherm6 2 tl = 3.6e-1
}

RTHERM3

RTHERM4

RTHERM5

RTHERM6

CTHERM3

4

CTHERM4

3

CTHERM5

2

CTHERM6

CASE

tl

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