Datasheet HCTS138MS Datasheet (Intersil Corporation)

August 1995

HCTS138MS

Radiation Hardened Inverting

3-to-8 Line Decoder/Demultiplexer

Features

• 3 Micron Radiation Hardened SOS CMOS

• Total Dose 200K RAD (Si)

2

• SEP Effective LET No Upsets: >100 MEV-cm

• Single Event Upset (SEU) Immunity < 2 x 10

/mg

-9

Errors/

Bit-Day (Typ)

• Dose Rate Survivability: >1 x 10

10

• Dose Rate Upset >10

RAD (Si)/s 20ns Pulse

12

RAD (Si)/s

• Latch-Up Free Under Any Conditions

• Fanout (Over Temperature Range)

- Bus Driver Outputs - 15 LSTTL Loads

• Military Temperature Range: -55

o

C to +125oC

• Significant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

• LSTTL Input Compatibility

- VIL = 0.8V Max

- VIH = VCC/2 Min

• Input Current Levels Ii ≤ 5µA at VOL, VOH

Description

The Intersil HCTS138MS is a Radiation Hardened 3-to-8 line
Decoder/Demultiplexer. The outputs are active in the low
state. Two active low and one active high enables (
E3) are provided. If the device is enabled, the binary inputs
(A0, A1, A2) determine which one of the eight normally high
outputs will go to a low logic level.

The HCTS138MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.

The HCTS138MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).

E1, E2,

Pinouts

A0
A1
A2
E1
E2
E3
Y7

GND

16 LEAD CERAMIC DUAL-IN-LINE

METAL SEAL PACKAGE (SBDIP)

MIL-STD-1835 CDIP2-T16

TOP VIEW

VCC

1

A0

2

A1

3

A2

4

E1

5

E2

6

E3

7

Y7

8

GND

16 LEAD CERAMIC METAL SEAL

FLATPACK PACKAGE (FLATPACK)

MIL-STD-1835 CDFP4-F16

TOP VIEW

116
2
3
4
5
6
7
8

16
15

Y0

14

Y1

13

Y2

12

Y3

11

Y4

10

Y5

9

Y6

15
14
13
12
11
10

9

VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6

Ordering Information

PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE

HCTS138DMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead SBDIP

HCTS138KMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead Ceramic Flatpack

HCTS138D/Sample +25oC Sample 16 Lead SBDIP

HCTS138K/Sample +25oC Sample 16 Lead Ceramic Flatpack

HCTS138HMSR +25oC Die Die

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

510

Spec Number

File Number 2462.2

DB NA

518605

Functional Diagram

A0

A1

A2

E1

E2

E3

INPUTS

HCTS138MS

1

2

3

4

5

6

TRUTH TABLE

15

Y0

14

Y1

13

Y2

12

Y3

11

Y4

10

Y5

9

Y6

7

Y7

OUTPUTSENABLE

E3 E2 E1 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7

XXHXXXHHHHHHHH

LXXXXXHHHHHHHH

XHXXXXHHHHHHHH

HLLLLLLHHHHHHH

HLLLLHHLHHHHHH

HLLLHLHHLHHHHH

HLLLHHHHHLHHHH

HLLHLLHHHHLHHH

HLLHLHHHHHHLHH

HL LHHLHHHHHHLH

HLLHHHHHHHHHHL

H = High Level, L = Low Level, X = Don’t Care

511

Spec Number 518605

Specifications HCTS138MS

Absolute Maximum Ratings Reliability Information

Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7.0V

Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V

DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA

DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA

(All Voltage Reference to the VSS Terminal)

Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC

Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC

Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1

CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..

Operating Conditions

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V

Input Rise and Fall Times at VCC = 4.5V (TR, TF) . . . . .500ns Max

Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

Thermal Resistance θ

SBDIP Package. . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W

Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W

Maximum Package Power Dissipation at +125oC Ambient

SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.68W

Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W

If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:

SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.7mW/oC

Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .8.8mW/oC

Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V

Input High Voltage (VIH). . . . . . . . . . . . . . . . . . . . . . VCC/2 to VCC

JA

θ

JC

(NOTE 1)

PARAMETER SYMBOL

Quiescent Current ICC VCC = 5.5V,

Output Current
(Sink)

Output Current
(Source)

Output Voltage Low VOL VCC = 4.5V, VIH = 2.25V,

Output Voltage High VOH VCC = 4.5V, VIH = 2.25V,

Input Leakage
Current

IOL VCC = 4.5V, VIH = 4.5V,

IOH VCC = 4.5V, VIH = 4.5V,

IIN VCC = 5.5V, VIN = VCC or

CONDITIONS

VIN = VCC or GND

VOUT = 0.4V, VIL = 0V

VOUT = VCC -0.4V,
VIL = 0V

IOL = 50µA, VIL = 0.8V

VCC = 5.5V, VIH = 2.75V,
IOL = 50µA, VIL = 0.8V

IOH = -50µA, VIL = 0.8V

VCC = 5.5V, VIH = 2.75V,
IOH = -50µA, VIL = 0.8V

GND

GROUP

A SUB-

GROUPS TEMPERATURE

1 +25oC-40µA

2, 3 +125oC, -55oC - 750 µA

1 +25oC 7.2 - mA

2, 3 +125oC, -55oC 6.0 - mA

1 +25oC -7.2 - mA

2, 3 +125oC, -55oC -6.0 - mA

1, 2, 3 +25oC, +125oC, -55oC - 0.1 V

1, 2, 3 +25oC, +125oC, -55oC - 0.1 V

1, 2, 3 +25oC, +125oC, -55oC VCC

1, 2, 3 +25oC, +125oC, -55oC VCC

1 +25oC-±0.5 µA

2, 3 +125oC, -55oC-±5.0 µA

LIMITS

-V

-0.1

-V

-0.1

UNITSMIN MAX

Noise Immunity
Functional Test

NOTES:

1. All voltages reference to device GND.

2. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.

FN VCC = 4.5V, VIH = 2.25V,

VIL = 0.8V, (Note 2)

7, 8A, 8B +25oC, +125oC, -55oC---

512

Spec Number 518605

Specifications HCTS138MS

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS

GROUP

(NOTES 1, 2)

PARAMETER SYMBOL

Address to Output TPLH VCC = 4.5V 9 +25oC 2 25 ns

TPHL VCC = 4.5V 9 +25oC 2 28 ns

Enable to Output TPLH VCC = 4.5V 9 +25oC 2 26 ns

TPHL VCC = 4.5V 9 +25oC 2 26 ns

NOTES:

1. All voltages referenced to device GND.

2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS

CONDITIONS

A SUB-

GROUPS TEMPERATURE

10, 11 +125oC, -55oC 2 30 ns

10, 11 +125oC, -55oC 2 39 ns

10, 11 +125oC, -55oC 2 31 ns

10, 11 +125oC, -55oC 2 34 ns

LIMITS

LIMITS

UNITSMIN MAX

PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE

Capacitance Power
Dissipation

Input Capacitance CIN VCC = 5.0V, f = 1MHz 1 +25oC - 10 pF

Output Transition
Time

NOTE:

1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.

PARAMETER SYMBOL

Quiescent Current ICC VCC = 5.5V, VIN = VCC or GND +25oC - 0.75 mA

Output Current (Sink) IOL VCC = 4.5V, VIN = VCC or GND,

CPD VCC = 5.0V, f = 1MHz 1 +25oC - 89 pF

1 +125oC, -55oC - 102 pF

1 +125oC, -55oC - 10 pF

TTHL
TTLH

TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS

VCC = 4.5V 1 +25oC - 15 ns

1 +125oC, -55oC - 22 ns

200K RAD

LIMITS

(NOTES 1, 2)

CONDITIONS TEMPERATURE

+25oC 6.0 - mA

VOUT = 0.4V

UNITSMIN MAX

UNITSMIN MAX

Output Current
(Source)

IOH VCC = 4.5V, VIN = VCC or GND,

VOUT = VCC -0.4V

513

+25oC -6.0 - mA

Spec Number 518605

TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

PARAMETER SYMBOL

Specifications HCTS138MS

(NOTES 1, 2)

CONDITIONS TEMPERATURE

200K RAD

LIMITS

UNITSMIN MAX

Output Voltage Low VOL VCC = 4.5V and 5.5V, VIH = VCC/2,

VIL = 0.8V at 200K RAD, IOL = 50µA

Output Voltage High VOH VCC = 4.5V and 5.5V, VIH = VCC/2,

VIL = 0.8V at 200K RAD, IOH = -50µA

Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND +25oC-±5 µA

Noise Immunity
Functional Test

Address to Output TPLH VCC = 4.5V +25oC 2 30 ns

Enable to Output TPLH VCC = 4.5V +25oC 2 31 ns

NOTES:

1. All voltages referenced to device GND.

2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.

3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.

FN VCC = 4.5V, VIH = 2.25V,

VIL = 0.8V, (Note 3)

TPHL VCC = 4.5V +25oC 2 39 ns

TPHL VCC = 4.5V +25oC 2 34 ns

TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)

GROUP B

PARAMETER

SUBGROUP DELTA LIMIT

+25oC - 0.1 V

+25oC VCC

-0.1

+25oC ---

-V

ICC 5 12µA

IOL/IOH 5 -15% of 0 Hour

TABLE 6. APPLICABLE SUBGROUPS

CONFORMANCE GROUPS METHOD GROUP A SUBGROUPS READ AND RECORD

Initial Test (Preburn-In) 100%/5004 1, 7, 9 ICC, IOL/H
Interim Test I (Postburn-In) 100%/5004 1, 7, 9 ICC, IOL/H
Interim Test II (Postburn-In) 100%/5004 1, 7, 9 ICC, IOL/H
PDA 100%/5004 1, 7, 9, Deltas
Interim Test III (Postburn-In) 100%/5004 1, 7, 9 ICC, IOL/H
PDA 100%/5004 1, 7, 9, Deltas
Final Test 100%/5004 2, 3, 8A, 8B, 10, 11
Group A (Note 1) Sample/5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B Subgroup B-5 Sample/5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11

Subgroup B-6 Sample/5005 1, 7, 9

Group D Sample/5005 1, 7, 9

NOTE:

1. Alternate group A inspection in accordance with method 5005 of MIL-STD-883 may be exercised.

514

Spec Number 518605

Specifications HCTS138MS

TABLE 7. TOTAL DOSE IRRADIATION

TEST READ AND RECORD

CONFORMANCE

GROUPS METHOD

Group E Subgroup 2 5005 1, 7, 9 Table 4 1, 9 Table 4 (Note 1)

NOTE:

1. Except FN test which will be performed 100% Go/No-Go.

TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS

PRE RAD POST RAD PRE RAD POST RAD

OSCILLATOR

OPEN GROUND 1/2 VCC = 3V ± 0.5V VCC = 6V ± 0.5V

STATIC BURN-IN I TEST CONNECTIONS (Note 1)

7, 9 - 15 1 - 6, 8 16

STATIC BURN-IN II TEST CONNECTIONS (Note 1)

7, 9 - 15 8 - 1 - 6, 16 - -

DYNAMIC BURN-IN TEST CONNECTIONS (Note 2)

- 4, 5, 8 7, 9 - 15 3, 6, 16 2 1

NOTES:

1. Each pin except VCC and GND will have a resistor of 10KΩ± 5% for static burn-in

2. Each pin except VCC and GND will have a resistor of 680Ω± 5% for dynamic burn-in

TABLE 9. IRRADIATION TEST CONNECTIONS

OPEN GROUND VCC = 5V ± 0.5V

7, 9 - 15 8 1 - 6, 16

NOTE: Each pin except VCC and GND will have a resistor of 47KΩ± 5% for irradiation testing.

Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.

50kHz 25kHz

515

Spec Number 518605

HCTS138MS

Intersil Space Level Product Flow - ‘MS’

Wafer Lot Acceptance (All Lots) Method 5007

(Includes SEM)

GAMMA Radiation Verification (Each Wafer) Method 1019,

4 Samples/Wafer, 0 Rejects
100% Nondestructive Bond Pull, Method 2023
Sample - Wire Bond Pull Monitor, Method 2011
Sample - Die Shear Monitor, Method 2019 or 2027
100% Internal Visual Inspection, Method 2010, Condition A
100% Temperature Cycle, Method 1010, Condition C,

10 Cycles
100% Constant Acceleration, Method 2001, Condition per

Method 5004
100% PIND, Method 2020, Condition A
100% External Visual
100% Serialization
100% Initial Electrical Test (T0)
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,

NOTES:

1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.

2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the

3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.

4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.

5. Data Package Contents:

o

C min., Method 1015

+125

failures from subgroup 7.

• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number,
Quantity).

• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.

• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.

• X-Ray report and film. Includes penetrometer measurements.

• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).

• Lot Serial Number Sheet (Good units serial number and lot number).

• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.

• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.

100% Interim Electrical Test 1 (T1)
100% Delta Calculation (T0-T1)
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,

o

C min., Method 1015

+125
100% Interim Electrical Test 2 (T2)
100% Delta Calculation (T0-T2)
100% PDA 1, Method 5004 (Notes 1and 2)
100% Dynamic Burn-In, Condition D, 240 hrs., +125

o

Equivalent, Method 1015
100% Interim Electrical Test 3 (T3)
100% Delta Calculation (T0-T3)
100% PDA 2, Method 5004 (Note 2)
100% Final Electrical Test
100% Fine/Gross Leak, Method 1014
100% Radiographic, Method 2012 (Note 3)
100% External Visual, Method 2009
Sample - Group A, Method 5005 (Note 4)
100% Data Package Generation (Note 5)

C or

516

Spec Number 518605

HCTS138MS

AC Timing Diagrams

VIH

VS

VIL

VOH

VOL

VOH

VOL

PARAMETER HCTS UNITS

VCC 4.50 V

VIH 3.00 V

VS 1.30 V

VIL 0 V

INPUT

TPLH

VS

TTLH

20%

OUTPUT

80%

OUTPUT

AC VOLTAGE LEVELS

TPHL

80%

20%

TTHL

AC Load Circuit

DUT TEST

CL

CL = 50pF
RL = 500Ω

POINT

RL

GND 0 V

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

Sales Office Headquarters

NORTH AMERICA

Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: [phone]
FAX: [phone]

EUROPE

Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: [phone]
FAX: [phone]

ASIA

Intersil (Taiwan) Ltd.
Taiwan Limited
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: [phone]
FAX: [phone]

517

Spec Number 518605

Die Characteristics

DIE DIMENSIONS:

85 x 101 mils

METALLIZATION:

Type: SiAl
Metal Thickness: 11k

Å ± 1kÅ

GLASSIVATION:

Type: SiO

2

Thickness: 13kÅ ± 2.6kÅ

WORST CASE CURRENT DENSITY:

<2.0 x 10

5

A/cm

2

BOND PAD SIZE:

100µm x 100µm
4 x 4 mils

Metallization Mask Layout

HCTS138MS

HCTS138MS

A1 A0 VCC
(2) (1) (16)

Y0

(15)

A2 (3)

NC

E1 (4)

E2 (5)

E3 (6)

NC

Y1

(14)

NC

(13) Y2

(12)

Y3

(11)

Y4

NC

(7)
Y7

NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location.

The mask series for the HCTS138 is TA14461A.

(8) (9) (10)

GND

Y6 Y5

Spec Number 518605

518