Datasheet FQB8N25 Datasheet (Fairchild Semiconductor)

FQB8N25 / FQI8N25

250V N-Channel MOSFET

May 2000

QFET

QFETQFET

TM

General Description

FQB8N25 / FQI8N25

These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switching DC/DC converters, switch mode power supply.

D

G

S

D2-PAK

FQB Series

Absolute Maximum Ratings T

Symbol Parameter FQB8N25 / FQI8N25 Units

V

DSS

I

D

I

DM

V

GSS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt P

D

, T

T

J

STG

T

L

Drain-Source Voltage 250 V Drain Current

Drain Current - Pulsed Gate-Source Voltage ± 30 V Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy

Power Dissipation (TA = 25°C) * Power Dissipation (T

Operating and Storage Temperature Range -55 to +150 °C Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds

G

D

S

= 25°C unless otherwise noted

C

- Continuous (T

= 25°C)

C

- Derate above 25°C 0.69 W/°C

= 25°C)

C

= 100°C)

C

Features

• 8.0A, 250V, R

• Low gate charge ( typical 12 nC)

• Low Crss ( typical 11 pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

I2-PAK

FQI Series

(Note 1)

(Note 2) (Note 1) (Note 1) (Note 3)

= 0.55Ω @VGS = 10 V

DS(on)

G

8.0 A

5.0 A 32 A

120 mJ

8.0 A

8.7 mJ

5.5 V/ns

3.13 W 87 W

300 °C

!

D

!

"

" "

"

!

S

Thermal Characteristics

Symbol Parameter Typ Max Units

R

θJC

R

θJA

R

θJA

* When mounted on the minimum pad size recommended (PCB Mount)

Thermal Resistance, Junction-to-Case -- 1.44 °C/W Thermal Resistance, Junction-to-Ambient * -- 40 °C/W Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W

Rev. A, May 2000

FQB8N25 / FQI8N25

Electrical Characteristics T

= 25°C unless otherwise noted

C

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

DSS

∆BV

DSS

/ ∆T I

DSS

I

GSSF

I

GSSR

Drain-Source Breakdown Voltage Breakdown Voltage Temperature

Coefficient

J

Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

= 0 V, ID = 250 µA

V

GS

I

= 250 µA, Referenced to 25°C

D

V

= 250 V, VGS = 0 V

DS

V

= 200 V, TC = 125°C

DS

V

= 30 V, VDS = 0 V

GS

= -30 V, VDS = 0 V

V

GS

250 -- -- V

-- 0.24 -- V/°C

-- -- 1 µA

-- -- 10 µA

-- -- 100 nA

-- -- -100 nA

On Characteristics

V R

g

FS

GS(th)

DS(on)

Gate Threshold Voltage Static Drain-Source

On-Resistance Forward Transconductance

V

= VGS, ID = 250 µA

DS

= 10 V, ID = 4.0 A

V

GS

= 50 V, ID = 4.0 A

V

DS

(Note 4)

3.0 -- 5.0 V

-- 0.42 0.55 Ω

-- 6.6 -- S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance Output Capacitance -- 85 110 pF Reverse Transfer Capacitance -- 11 15 pF

= 25 V, VGS = 0 V,

V

DS

f = 1.0 MHz

-- 410 530 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q Q Q

g gs gd

Turn-On Delay Time Turn-On Rise Time -- 95 200 ns Turn-Off Delay Time -- 11 35 ns Turn-Off Fall Time -- 42 95 ns Total Gate Charge Gate-Source Charge -- 2.7 -- nC Gate-Drain Charge -- 5.9 -- nC

= 125 V, ID = 8.0 A,

V

DD

= 25 Ω

R

G

V

= 200 V, ID = 8.0 A,

DS

V

GS

= 10 V

(Note 4, 5)

-- 10 30 ns

-- 12 15 nC

Drain-Source Diode Characteristics and Maximum Ratings

I

S

I

SM

V

SD

t

rr

Q

rr

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 3.0mH, IAS = 8.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C

3. ISD ≤ 8.0A, di/dt ≤ 300A/µs, VDD ≤ BV

4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%

5. Essentially independent of operating temperature

Maximum Continuous Drain-Source Diode Forward Current -- -- 8.0 A Maximum Pulsed Drain-Source Diode Forward Current -- -- 32 A

= 0 V, IS = 8.0 A

Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- 0.67 -- µC

Starting TJ = 25°C

DSS,

V

GS

= 0 V, IS = 8.0 A,

V

GS

/ dt = 100 A/µs

dI

F

-- -- 1.5 V

-- 135 -- ns

(Note 4)

Rev. A, May 2000

Typical Characteristics

V

GS

Top : 15.0 V

10.0 V

8.0 V

1

10

7.0 V

6.5 V

6.0 V Bottom : 5.5 V

FQB8N25 / FQI8N25

0

10

, Drain Current [A]

D

I

-1

10

-1

10

0

10

※

Notes :

1. 250μs Pulse Test

℃

2. TC = 25

1

10

VDS, Drain-Source Voltage [V]

1

10

0

10

, Drain Current [A]

D

I

-1

10

246810

25

VGS , Gate -Source Voltage [V ]

℃

150

℃

-55

※

Note s :

1. V

= 50V

DS

2. 250μs Pulse Test

Figure 2. Transfer CharacteristicsFigure 1. On-Region Char act er i stic s

2.0

1.6

1.2

],

Ω

[

0.8

DS(ON)

R

0.4

VGS = 10V

VGS = 20V

Drain-Source On-Resistance

0.0 0 5 10 15 20 25

ID, Drain Current [A]

※

Note : T

1

10

℃

= 25

J

0

10

, Reverse Drain Current [A]

DR

I

-1

10

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

℃

150

VSD , Source-Dr a in Voltage [V]

℃

25

※

Notes :

1. V

= 0V

GS

2. 250μs Pulse Test

Figure 3. On-Resistance Variati on vs.

Drain Current and Gate Voltage

800

600

400

Capacitance [pF]

200

0

-1

10

Figure 5. Capacitance C haracteristics Figure 6. Gate Charge Characteristics

C C C

C

iss

C

oss

C

rss

0

10

VDS, Drain-Source Voltage [V]

= Cgs + Cgd (Cds = shorted)

iss

= Cds + C

oss

gd

= C

rss

gd

※

Notes :

= 0 V

1. V

GS

2. f = 1 MHz

1

10

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current

and Temperature

12

10

8

6

4

, Gate-Source Voltage [V]

2

GS

V

0

036912

QG, Tota l Gate Charge [n C]

VDS = 50V

VDS = 125V

VDS = 200V

※

Note : I

= 8.0 A

D

Rev. A, May 2000

Typical Characteristics (Continued)

FQB8N25 / FQI8N25

1.2

1.1

1.0

, (Normalized)

DSS

BV

0.9

Drain-Source Breakdown Voltage

0.8

-100 -50 0 50 100 150 200

※

1. V

2. I

Notes :

TJ, Junction Temperature [oC]

Figure 7. Breakdown Voltage Variation

vs. Temperature

2

10

1

10

0

10

, Drain Current [A]

D

I

-1

10

0

10

Operation in This Area is Limited by R

DS(on)

10 ms

DC

※

Notes :

1. T

= 25 oC

C

= 150 oC

2. T

J

3. Single Pulse

1

10

VDS, Drain-Source Voltage [V]

1 ms

2

10

GS

= 250

D

100 µs

= 0 V

3.0

2.5

2.0

μ

A

1.5

, (Normalized)

1.0

DS(ON)

R

Drain-Source On-Resistance

0.5

0.0

-100 -50 0 50 100 150 200

※

Notes :

1. V

= 10 V

GS

2. I

= 4.0 A

D

TJ, Junction Temperature [oC]

Figure 8. On-Resistance Variation

vs. Temperature

8

6

4

, Drain Current [A]

D

I

2

0

25 50 75 100 125 150

TC, Case Temperature [℃]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

vs. Case Temperature

0

10

D=0.5

0.2

0.1

-1

10

0.05

0.02

(t), Therm al Response

JC

0.01

θ

Z

-2

10

-5

10

single pulse

-4

10

-3

10

-2

10

※

N o te s :

(t) = 1.44 ℃/W M a x .

1. Z

θ

JC

2. D u ty F a c to r , D = t

3. TJM - TC = PDM * Z

P

DM

t

1

t

2

-1

10

1/t2

(t)

θ

JC

0

1

10

t1, S q u a re W av e P u ls e D u ra tio n [se c ]

Figure 11. Transient Thermal Response Cur ve

Rev. A, May 2000

Gate Charge Test Circuit & Waveform

V

GS

DS

GS

10V

Q

g

Q

gs

Q

gd

Charge

Same Type

50KΩ

200nF

12V

200nF

300nF

FQB8N25 / FQI8N25

V

GS

3mA

Same Type

as DUT

DUT

V

Resistive Switching Test Circuit & Waveforms

R

L

10V

DUT

L

V

DD

V

DS

V

GS

R

G

V

DS

90%

10%

V

GS

t

d(on)tr

t

on

t

d(off)

t

f

t

off

R

G

10V

t

p

Unclamped Inductive Switching Test Circuit & Waveforms

L

LL

V

DS

BV

DSS

V

DSS

I

AS

DD

I

IDI

D

V

DD

DUT

1

----

E

=LI

E

=LI

AS

2

AS

ID (t)

t

2

p

BV

DSS

--------------------

-------------------BV

BV

DSS-VDD

Time

V

(t)

V

(t)

DS

Rev. A, May 2000

Peak Diode Recovery dv /d t Test Circuit & Waveforms

+

DUT

I

SD

Driver

R

G

V

GS

+

V

DS

_

L

LL

Same Type

as DUT

• dv/dt controlled by R

•ISDcontroll ed by pulse peri od

G

FQB8N25 / FQI8N25

V

DD

V

GS

( Driver )

I

SD

( DUT )

V

DS

( DUT )

Gate Pulse Width

--------------------------

D =

Gate Pulse Period

IFM, Body Diode Forward Current

I

RM

Body Diode Reverse Current

Body Diode Recoverydv/dt

V

SD

Body Diode

Forward Voltage Drop

di/dt

10V

V

DD

Rev. A, May 2000

Package Dimensions

D2PAK

4.50 ±0.20

1.30

+0.10 –0.05

(0.40)

9.90

±0.20

FQB8N25 / FQI8N25

1.20 ±0.20

0.10 ±0.15

2.40 ±0.20

0°~3°

+0.10

0.50

–0.05

2.54 ±0.30

1.40 ±0.20

1.27

±0.10

0.80 ±0.10

2.54 TYP 2.54 TYP

9.20 ±0.20

2.00 ±0.10

15.30 ±0.30

4.90 ±0.20

(0.75)

10.00 ±0.20 (8.00) (4.40)

10.00 ±0.20

15.30 ±0.30

(1.75)

(2XR0.45)

(7.20)

9.20 ±0.20

4.90 ±0.20

0.80 ±0.10

Rev. A, May 2000

FQB8N25 / FQI8N25

Package Dimensions

(0.40)

(1.46)

(Continued)

9.90 ±0.20

(45°)

I2PAK

1.20 ±0.20

9.20 ±0.20

4.50 ±0.20

1.30

+0.10 –0.05

(0.94)

1.27 ±0.10 1.47 ±0.10

13.08 ±0.20

10.00 ±0.20

0.80 ±0.10

2.54 TYP2.54 TYP

MAX 3.00

10.08 ±0.20 MAX13.40

0.50

+0.10 –0.05

2.40 ±0.20

Rev. A, May 2000

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ E2CMOS EnSigna

TM

FACT™ FACT Quiet Series™

®

FAST

FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ POP™ PowerTrench

®

QFET™ QS™ QT Optoelectronics™

Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™

VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

Formative or In Design

First Production

Full Production

Not In Production

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. F1