Datasheet 74F38SJX, 74F38SJ, 74F38SCX, 74F38SC, 74F38PC Datasheet (Fairchild Semiconductor)

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April 1988 Revised November 1999

74F38 Quad Two-Input NAND Buffer (Open Collector)

General Description

This device contains four independent gates, each of which performs the logic NA ND functio n. The open -collector outputs require external pull-up resistors for proper logical operation.

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.

Logic Symbol

IEEE/IEC

Connection Diagram

Unit Loading/Fan Out

Note 1: OC = Open Collector

Function Table

H = HIGH Voltage Level L = LOW Voltage Level

Order Number Package Number Package Description

74F38SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 74F38SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F38PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Pin Names Description

U.L. Input I

IH/IIL

HIGH/LOW Output IOH/I

An, B

Inputs 1.0/2.0 20 µA/−1.2 mA

Outputs OC (Note 1) /106.6 OC (Note 1) /64 mA

Inputs Output

AB O

LL H LH H HL H HH L

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74F38

Absolute Maximum Ratings(Note 2) Recommended Operating

Conditions

Note 2: Absolute maximum ratings are values beyond which the device

may be damaged or have its useful life impaired. Functional operation under these conditi ons is not implied.

Note 3: Either voltage lim it or c urrent limit is sufficient to protect inputs.

DC Electrical Characteristics

AC Electrical Characteristics

Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C V

Pin Potential to Ground Pin −0.5V to +7.0V Input Voltage (Note 3) −0.5V to +7.0V Input Current (Note 3) −30 mA to +5.0 mA Voltage Applied to Output

in HIGH State (with V

= 0V)

Standard Output −0.5V to V

3-STATE Output −0.5V to +5.5V

Current Applied to Output

in LOW State (Max) twice the r ated I

(mA)

Free Air Ambient Temperature 0°C to +70°C Supply Voltage +4.5V to +5.5V

Symbol Parameter Min Typ Max Units

Conditions

Input HIGH Voltage 2.0 V Recognized as a HIGH Signal

Input LOW Voltage 0.8 V Recognized as a LOW Signal

Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA

Output LOW 10% V

0.55 V Min IOL = 64 mA

Voltage

Input HIGH

5.0 µAMaxVIN = 2.7V

Current

BVI

Input HIGH Current

7.0 µAMaxVIN = 7.0V

Breakdown Test

Input Leakage

4.75 V 0.0

IID = 1.9 µA

Test All Other Pins Grounded

Output Leakage

3.75 µA0.0

IOD

= 150 mV

Circuit Current All Other Pins Grounded

Input LOW Current −1.2 mA Max VIN = 0.5V

OHC

Open Collector, Output

250 µAMinV

OUT

= V

OFF Leakage Test

CCH

Power Supply Current 2.1 7.0 mA Max VO = HIGH

CCL

Power Supply Current 26.0 30.0 mA Max VO = LOW

Symbol Parameter

TA = +25°CT

= 0°C to +70°C

Units

VCC = +5.0V VCC = +5.0V

CL = 50 pF CL = 50 pF

Min Typ Max Min Max

PLH

Propagation Delay 6.5 9.7 12.5 6.5 13.0

PHL

An, Bn to O

1.5 2.1 5.0 1.5 5.5

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74F38

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

Package Number M14A

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74F38

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M14D

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74F38 Quad Two-Input NAND Buffer (Open Collector)

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N14A

Fairchild does not assume any responsibility for use of any circuitry described , no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are dev ic es or syste ms which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provide d in the labe l ing, can be re asonably expected to result in a significant injury to the user.

2. A critical compo nent in any com ponen t of a life s upp ort device or system whose failure to perform can be reasonably expected to cause the failure of the l ife support device or system, or to affect its safety or effectiveness.

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