dallas semiconductor DS1007 service manual

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dallas semiconductor DS1007 service manual

DS1007

DS1007

7-1 Silicon Delay Line

www.dalsemi.com

FEATURES

All-silicon time delay

7 independent buffered delays

Delay tolerance ±2 ns

Four delays can be custom set between 3 ns and 10 ns

Three delays can be custom set between 9 ns and 40 ns

Delays are stable and precise

Economical

Auto-insertable, low profile

Surface mount 16-pin SOIC

Low-power CMOS

TTL/CMOS-compatible

Vapor phase, IR and wave solderable

Custom specifications available

Quick turn prototypes

PIN ASSIGNMENT

IN1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

16

 

 

IN3

 

 

 

 

 

 

 

 

 

OUT1

 

 

 

2

15

 

 

OUT3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IN2

 

 

 

3

14

 

 

IN4

IN1

 

 

 

 

 

 

IN3

 

 

 

 

 

 

 

 

 

 

 

OUT2

 

 

 

4

13

 

 

OUT4

 

 

1

 

16

 

 

 

 

 

 

OUT1

 

 

2

 

15

 

OUT3

VCC

 

 

 

5

12

 

 

GND

IN2

 

 

3

 

14

 

IN4

IN5

 

 

 

6

11

 

 

OUT7

OUT2

 

 

4

 

13

 

OUT4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

 

 

5

 

12

 

GND

OUT5

 

 

 

7

10

 

 

IN7

IN5

 

 

6

 

11

 

OUT7

 

 

 

 

 

 

9

 

 

 

OUT5

 

 

7

 

10

 

IN7

IN6

 

 

 

8

 

 

OUT6

IN6

 

 

 

8

 

9

 

OUT6

 

 

 

 

 

DS1007

 

 

16-Pin DIP

(300-mil)

DS1007S 16-Pin

SOIC

See Mech. Drawings Section

 

 

 

 

(300-mil)

 

 

 

 

 

 

 

 

 

 

 

 

 

See Mech. Drawings Section

PIN DESCRIPTION

IN1 - IN7

- Inputs

Out1 – Out7

- Outputs

GND

- Ground

VCC

- +5 Volts

DESCRIPTION

The DS1007 7-in-1 Silicon Delay Line provides seven independent delay times which are set by Dallas Semiconductor to the customer’s specification. The delay times can be set from 3 ns to 40 ns with an accuracy of ± 2 ns at room temperature. The device is offered in both a 16-pin DIP and a 16-pin SOIC. Since the DS1007 is an all-silicon solution, better economy and reliability are achieved when compared to older methods using hybrid technology. The DS1007 reproduces the input logic state at the output after the fixed delay. Dallas Semiconductor can customize standard products to meet special needs. For special requests and rapid delivery, call (972) 371–4348.

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111799

DS1007

LOGIC DIAGRAM Figure 1

PART NUMBER DELAY TABLE (tPLH) Table 1

PART #

OUT1

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

DS1007-1

3ns

4ns

5ns

6ns

9ns

13ns

18ns

DS1007-2

4

6

8

10

12

14

16

DS1007-3

3

3

3

3

10

10

10

DS1007-4

4

4

4

4

12

12

12

DS1007-5

5

5

5

5

15

15

15

DS1007-6

6

6

6

6

20

20

20

DS1007-7

7

7

7

7

25

25

25

DS1007-8

8

8

8

8

30

30

30

DS1007-9

9

9

9

9

35

35

35

DS1007-10

10

10

10

10

40

40

40

DS1007-11

3

4

6

8

10

12

14

DS1007-12

3

4

6

8

10

15

20

DS1007-13

3

4

6

8

12

15

20

DS1007-14

7

7

7

7

9

9

9

Custom delays available. Out 1 through Out 4 can be custom set from 3 to 10 ns (leading edge only accuracy). Out 5 through Out 7 can be set from 9 to 40 ns (both leading and trailing edge accuracy).

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