DADD PDU1016H-0.5, PDU1016H-0.5C4, PDU1016H-10M, PDU1016H-10MC4, PDU1016H-15, PDU1016H-15C4, PDU1016H-15M, PDU1016H-15MC4, PDU1016H-1M, PDU1016H-1MC4, PDU1016H-2, PDU1016H-20, PDU1016H-0.5M, PDU1016H-0.5MC4, PDU1016H-1, PDU1016H-10, PDU1016H-100, PDU1016H-100C4, PDU1016H-100M, PDU1016H-100MC4, PDU1016H-10C4, PDU1016H-50MC4, PDU1016H-5C4, PDU1016H-5M, PDU1016H-5MC4, PDU1016H-6, PDU1016H-60, PDU1016H-60C4, PDU1016H-60M, PDU1016H-60MC4, PDU1016H-6C4, PDU1016H-20C4, PDU1016H-20M, PDU1016H-20MC4, PDU1016H-25, PDU1016H-25C4, PDU1016H-25M, PDU1016H-25MC4, PDU1016H-2C4, PDU1016H-2M, PDU1016H-2MC4, PDU1016H-6M, PDU1016H-6MC4, PDU1016H-8, PDU1016H-80, PDU1016H-80C4, PDU1016H-80M, PDU1016H-80MC4, PDU1016H-8C4, PDU1016H-8M, PDU1016H-8MC4, PDU1016H-40C4, PDU1016H-40M, PDU1016H-40MC4, PDU1016H-4C4, PDU1016H-4M, PDU1016H-4MC4, PDU1016H-5, PDU1016H-50, PDU1016H-50C4, PDU1016H-50M, PDU1016H-3, PDU1016H-30, PDU1016H-30C4, PDU1016H-30M, PDU1016H-30MC4, PDU1016H-3C4, PDU1016H-3M, PDU1016H-3MC4, PDU1016H-4 Datasheet

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DADD PDU1016H-0.5, PDU1016H-0.5C4, PDU1016H-10M, PDU1016H-10MC4, PDU1016H-15, PDU1016H-15C4, PDU1016H-15M, PDU1016H-15MC4, PDU1016H-1M, PDU1016H-1MC4, PDU1016H-2, PDU1016H-20, PDU1016H-0.5M, PDU1016H-0.5MC4, PDU1016H-1, PDU1016H-10, PDU1016H-100, PDU1016H-100C4, PDU1016H-100M, PDU1016H-100MC4, PDU1016H-10C4, PDU1016H-50MC4, PDU1016H-5C4, PDU1016H-5M, PDU1016H-5MC4, PDU1016H-6, PDU1016H-60, PDU1016H-60C4, PDU1016H-60M, PDU1016H-60MC4, PDU1016H-6C4, PDU1016H-20C4, PDU1016H-20M, PDU1016H-20MC4, PDU1016H-25, PDU1016H-25C4, PDU1016H-25M, PDU1016H-25MC4, PDU1016H-2C4, PDU1016H-2M, PDU1016H-2MC4, PDU1016H-6M, PDU1016H-6MC4, PDU1016H-8, PDU1016H-80, PDU1016H-80C4, PDU1016H-80M, PDU1016H-80MC4, PDU1016H-8C4, PDU1016H-8M, PDU1016H-8MC4, PDU1016H-40C4, PDU1016H-40M, PDU1016H-40MC4, PDU1016H-4C4, PDU1016H-4M, PDU1016H-4MC4, PDU1016H-5, PDU1016H-50, PDU1016H-50C4, PDU1016H-50M, PDU1016H-3, PDU1016H-30, PDU1016H-30C4, PDU1016H-30M, PDU1016H-30MC4, PDU1016H-3C4, PDU1016H-3M, PDU1016H-3MC4, PDU1016H-4 Datasheet

PDU1016H

4-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU1016H)

data 3 ® delay

devices, inc.

FEATURES

Digitally programmable in 16 delay steps

Monotonic delay-versus-address variation

Precise and stable delays

Input & outputs fully 10KH-ECL interfaced & buffered

Fits 32-pin DIP socket

PACKAGES

GND

 

 

 

1

32

 

GND

 

 

 

 

N/C

 

 

 

 

N/C

 

1

24

ENB

 

2

31

 

OUT

N/C

 

2

23

A2

 

 

 

 

 

 

 

 

OUT

 

3

22

A1

 

 

 

 

 

 

 

 

GND

 

4

21

VEE

 

 

 

 

 

 

 

 

ENB

 

5

20

A0

 

 

 

 

 

 

 

 

N/C

 

6

19

N/C

 

 

 

 

 

 

 

 

N/C

 

7

18

N/C

A0

 

 

7

26

 

A1

N/C

 

8

17

N/C

 

 

 

GND

 

9

16

VEE

VEE

 

 

 

 

 

 

A2

 

 

8

25

 

ENB

 

10

15

A3

 

 

 

 

GND

 

 

9

24

 

GND

N/C

 

11

14

N/C

 

 

 

 

 

 

 

 

IN

 

12

13

N/C

IN

 

11

 

 

 

PDU1016H-xxC4

 

SMD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PDU1016H-xxMC4 Mil SMD

A3

 

15

 

 

PDU1016H-xx

DIP

 

 

VEE

 

 

16

 

 

PDU1016H-xxM Mil DIP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FUNCTIONAL DESCRIPTION

PIN DESCRIPTIONS

The PDU1016H-series device is a 4-bit digitally programmable delay line. The delay, TDA, from the input pin (IN) to the output pin (OUT) depends on the address code (A3-A0) according to the following formula:

TDA = TD0 + TINC * A

IN

Signal Input

OUT

Signal Output

A0-A3

Address Bits

ENB

Output Enable

VEE

-5 Volts

GND

Ground

where A is the address code, TINC is the incremental delay of the device,

and TD0 is the inherent delay of the device. The incremental delay is specified by the dash number of the device and can range from 0.5ns through 100ns, inclusively. The enable pin (ENB) is held LOW during normal operation. When this signal is brought HIGH, OUT is forced into a LOW state. The address is not latched and must remain asserted during normal operation.

SERIES SPECIFICATIONS

Total programmed delay tolerance: 5% or 1ns,

whichever is greater

Inherent delay (TD0): 5.5ns typical for dash numbers

up to 5, greater for larger #’s

Setup time and propagation delay:

Address to input setup (TAIS): 3.6ns Disable to output delay (TDISO): 1.7ns typical

Operating temperature: 0° to 70° C

Temperature coefficient: 100PPM/°C (excludes TD0)

Supply voltage VEE: -5VDC ± 5%

Power Dissipation: 615mw typical (no load)

Minimum pulse width: 20% of total delay

NOTE: Any dash number between .5 and 100 not shown is also available.

©2001 Data Delay Devices

DASH NUMBER SPECIFICATIONS

Part

Incremental Delay

Total

Number

Per Step (ns)

Delay (ns)

PDU1016H-.5

0.5

± 0.3

7.5 ± 1.0

 

PDU1016H-1

1.0

± 0.5

15

± 1.0

 

PDU1016H-2

2.0

± 0.5

30

± 1.5

 

PDU1016H-3

3.0

± 1.0

45

± 2.2

 

PDU1016H-4

4.0

± 1.0

60

± 3.0

 

PDU1016H-5

5.0

± 1.0

75

± 3.7

 

PDU1016H-6

6.0

± 1.0

90

± 4.5

 

PDU1016H-8

8.0

± 1.0

120 ± 6.0

 

PDU1016H-10

10.0

± 1.5

150 ± 7.5

 

PDU1016H-15

15.0

± 1.5

225

± 11.2

 

PDU1016H-20

20.0

± 2.0

300

± 15.0

 

PDU1016H-25

25.0

± 2.5

375

± 18.8

 

PDU1016H-30

30.0

± 3.0

450

± 22.5

 

PDU1016H-40

40.0

± 4.0

600

± 30.0

 

PDU1016H-50

50.0

± 5.0

750

± 37.5

 

PDU1016H-60

60.0

± 6.0

900

± 45.0

 

PDU1016H-80

80.0

± 8.0

1200 ± 60.0

 

PDU1016H-100

100.0

± 10.0

1500 ± 75.0

Doc #97044

DATA DELAY DEVICES, INC.

1

11/1/01

3 Mt. Prospect Ave. Clifton, NJ 07013

PDU1016H

APPLICATION NOTES

ADDRESS UPDATE

The PDU1016H is a memory device. As such, special precautions must be taken when changing the delay address in order to prevent spurious output signals. The timing restrictions are shown in Figure 1.

After the last signal edge to be delayed has appeared on the OUT pin, a minimum time, TOAX, is required before the address lines can change. This time is given by the following relation:

TOAX = max { (Ai - A i-1) * TINC , 0 }

where A i-1 and Ai are the old and new address codes, respectively. Violation of this constraint may, depending on the history of the input signal, cause spurious signals to appear on the OUT pin. The possibility of spurious signals persists until the required TOAX has elapsed.

A similar situation occurs when using the ENB signal to disable the output while IN is active. In this case, the unit must be held in the disabled state until the device is able to “clear” itself. This is achieved by holding the ENB signal high and the IN signal low for a time given by:

TDISH = Ai * TINC

Violation of this constraint may, depending on the history of the input signal, cause spurious signals to appear on the OUT pin. The possibility of

spurious signals persists until the required TDISH has elapsed.

INPUT RESTRICTIONS

There are three types of restrictions on input pulse width and period listed in the AC Characteristics table. The recommended conditions are those for which the delay tolerance specifications and monotonicity are guaranteed. The suggested conditions are those for which signals will propagate through the unit without significant distortion. The absolute conditions are those for which the unit will produce some type of output for a given input.

When operating the unit between the recommended and absolute conditions, the delays may deviate from their values at low frequency. However, these deviations will remain constant from pulse to pulse if the input pulse width and period remain fixed. In other words, the delay of the unit exhibits frequency and pulse width dependence when operated beyond the recommended conditions. Please consult the technical staff at Data Delay Devices if your application has specific high-frequency requirements.

Please note that the increment tolerances listed represent a design goal. Although most delay increments will fall within tolerance, they are not guaranteed throughout the address range of the unit. Monotonicity is, however, guaranteed over all addresses.

A3-A0

A i-1

 

Ai

TAENS

 

TOAX

TAIS

ENB

 

 

 

TENIS

PWIN

 

TDISH

IN

 

 

 

TDA

PWOUT

 

TDISO

OUT

Figure 1: Timing Diagram

Doc #97044

DATA DELAY DEVICES, INC.

2

11/1/01

Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com

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