DADD DLO32F-5.5A2, DLO32F-5.5, DLO32F-5, DLO32F-4MD4, DLO32F-4MD1 Datasheet

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DADD DLO32F-5.5A2, DLO32F-5.5, DLO32F-5, DLO32F-4MD4, DLO32F-4MD1 Datasheet

TTL-INTERFACED, GATED DELAY LINE OSCILLATOR (SERIES DLO32F)

DLO32F

data 3 ® delay

devices, inc.

FEATURES

Continuous or keyable wave train

Synchronizes with arbitrary gating signal

Fits standard 14-pin DIP socket

Low profile

Auto-insertable

Input & outputs fully TTL interfaced & buffered

Available in frequencies from 2MHz to 40MHz

PACKAGES

C1

 

1

14

 

VCC

 

 

 

 

 

 

 

C1

1

14

 

VCC

 

 

 

 

 

 

 

 

 

 

N/C

2

13

 

N/C

 

 

 

 

 

 

 

N/C

3

12

 

N/C

 

 

 

 

 

 

 

N/C

4

11

 

N/C

 

 

 

 

 

 

 

N/C

5

10

 

C2

 

 

 

 

10

 

C2

N/C

6

9

 

N/C

 

 

 

 

 

GND

7

8

 

GB

 

 

 

 

 

 

 

 

GND

 

 

7

8

 

GB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DLO32F-xx

 

DIP

Military SMD

 

DLO32F-xxA2

Gull-Wing

DLO32F-xxMD1

DLO32F-xxB2

J-Lead

DLO32F-xxMD4

DLO32F-xxM

 

Military DIP

 

 

 

 

 

FUNCTIONAL DESCRIPTION

The DLO32F-series device is a gated delay line oscillator. The device produces a stable square wave which is synchronized with the falling edge of the Gate Input (GB). The frequency of oscillation is given by the device dash number (See Table). The two outputs (C1,C2) are in complementary during oscillation, but both return to logic low when the device is disabled.

PIN DESCRIPTIONS

GB

Gate Input

C1

Clock Output 1

C2

Clock Output 2

VCC

+5 Volts

GND

Ground

SERIES SPECIFICATIONS

 

DASH NUMBER

 

 

 

Frequency accuracy:

2%

 

SPECIFICATIONS

Inherent delay (TE0):

3ns typical

 

Part

Frequency

Output skew:

2.5ns typical

 

Number

(MHz)

Output rise/fall time:

2ns typical

 

DLO32F-2

2.0 ± 0.04

Supply voltage:

5VDC ± 5%

 

DLO32F-2.5

2.5 ± 0.05

Supply current:

40ma typical (7ma when disabled)

 

DLO32F-3

3.0

± 0.06

Operating temperature:

0° to 70° C

 

DLO32F-3.5

3.5

± 0.07

 

DLO32F-4

Temperature coefficient: 100 PPM/°C (See text)

 

 

4.0 ± 0.08

 

DLO32F-4.5

4.5 ± 0.09

 

 

 

 

DLO32F-5

5.0

± 0.10

 

 

 

 

DLO32F-5.5

5.5

± 0.11

 

 

 

 

DLO32F-6

6.0

± 0.12

 

 

 

 

DLO32F-7

7.0

± 0.14

 

GATE

 

 

DLO32F-8

8.0

± 0.16

 

(GB)

tGR

 

DLO32F-9

 

tEO

tDO

9.0

± 0.18

 

 

DLO32F-10

 

 

 

 

10

± 0.20

 

CLOCK 1

 

 

DLO32F-12

12

± 0.24

 

(C1)

 

 

DLO32F-14

 

1/f0

tCS

 

14

± 0.28

 

 

DLO32F-15

 

 

 

15

± 0.30

 

CLOCK 2

 

 

DLO32F-20

 

(C2)

 

 

20

± 0.40

 

 

 

DLO32F-25

 

 

 

 

25

± 0.50

 

Figure 1: Timing Diagram

 

DLO32F-30

30

± 0.60

 

 

DLO32F-35

 

 

 

 

35

± 0.70

 

 

 

 

DLO32F-40

40

± 0.80

 

 

 

 

 

©1998 Data Delay Devices

 

NOTE: Any dash number

 

between 2 and 40 not shown

 

is also available.

Doc #98002

DATA DELAY DEVICES, INC.

1

3/17/98

3 Mt. Prospect Ave. Clifton, NJ 07013

DLO32F

APPLICATION NOTES

THERMAL STABILITY

The delay line used internally to develop the clock signals in the DLO32F has a thermal coefficient of 100ppm/C. For low frequency units, this is also the thermal coefficient of the output frequency. For higher frequency units, however, other internal effects must be considered, and the actual thermal coefficient may be somewhat higher.

POWER SUPPLY BYPASSING

The DLO32F relies on a stable power supply to produce a repeatable frequency within the stated tolerances. A 0.1uf capacitor from VCC to GND, located as close as possible to the VCC pin, is recommended. A wide VCC trace and a clean ground plane should be used.

DEVICE SPECIFICATIONS

TABLE 1: ABSOLUTE MAXIMUM RATINGS

PARAMETER

SYMBOL

MIN

MAX

UNITS

NOTES

DC Supply Voltage

VCC

-0.3

7.0

V

 

Input Pin Voltage

VIN

-0.3

VDD+0.3

V

 

Storage Temperature

TSTRG

-55

150

C

 

Lead Temperature

TLEAD

 

300

C

10 sec

TABLE 2: DC ELECTRICAL CHARACTERISTICS

(0C to 70C, 4.75V to 5.25V)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

High Level Output Voltage

VOH

2.5

3.4

 

V

VCC = MIN, IOH = MAX

 

 

 

 

 

 

VIH = MIN, VIL = MAX

Low Level Output Voltage

VOL

 

0.35

0.5

V

VCC = MIN, IOL = MAX

 

 

 

 

 

 

VIH = MIN, VIL = MAX

High Level Output Current

IOH

 

 

-1.0

mA

 

Low Level Output Current

IOL

 

 

20.0

mA

 

High Level Input Voltage

VIH

2.0

 

 

V

 

Low Level Input Voltage

VIL

 

 

0.8

V

 

Input Clamp Voltage

VIK

 

 

-1.2

V

VCC = MIN, II = IIK

Input Current at Maximum

IIHH

 

 

0.1

mA

VCC = MAX, VI = 7.0V

Input Voltage

 

 

 

 

 

 

High Level Input Current

IIH

 

 

20

μA

VCC = MAX, VI = 2.7V

Low Level Input Current

IIL

 

 

-0.6

mA

VCC = MAX, VI = 0.5V

Short-circuit Output Current

IOS

-60

 

-150

mA

VCC = MAX

Output High Fan-out

 

 

 

25

Unit

 

Output Low Fan-out

 

 

 

12.5

Load

 

TABLE 3: AC ELECTRICAL CHARACTERISTICS

(0C to 70C, 4.75V to 5.25V)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

Enable to Clock On (Inherent Delay)

tEO

1.5

3.0

4.5

ns

Disable to Clock Off

tDO

1.5

2.5

3.5

ns

Clock Skew

tCS

1.5

2.5

3.5

ns

Gate Recovery Time

tGR

50

 

 

% of Clock Period

Doc #98002 DATA DELAY DEVICES, INC. 2

3/17/98

Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com

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