DADD DDU224F-20, DDU224F-150M, DDU224F-150, DDU224F-10M, DDU224F-100M Datasheet

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DDU224F

10-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU224F)

data 3 ® delay

devices, inc.

FEATURES

Ten equally spaced outputs

Very narrow device (SIP package)

Stackable for PC board economy

Input & outputs fully TTL interfaced & buffered

10 T2L fan-out capability

PACKAGES

1 2 3 4 5 6 7 8 9 10 11 12 13 14

VCC N/C IN T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 GND

DDU224F-xx Commercial

DDU224F-xxM Military

FUNCTIONAL DESCRIPTION

PIN DESCRIPTIONS

The DDU224F-series device is a 10-tap digitally buffered delay line. The

IN

Signal Input

signal input (IN) is reproduced at the outputs (T1-T10), shifted in time by

T1-T10

Tap Outputs

an amount determined by the device dash number. The nominal tap-to-

VCC

+5 Volts

tap delay increment is given by 1/10 of the dash number. For dash

GND

Ground

numbers less than 50, the total delay of the line is measured from T1 to

 

 

T10, with the nominal value given by 9 times the increment. The inherent delay from IN to T1 is nominally 3.5ns. For dash numbers greater than or equal to 50, the total delay of the line is measured from IN to T10, with the nominal value given by the dash number.

SERIES SPECIFICATIONS

Minimum input pulse width: 20% of total delay

Output rise time: 2ns typical

Supply voltage: 5VDC ± 5%

Supply current: ICCL = 50ma typical

ICCH = 15ma typical

Operating temperature: 0° to 70° C

Temp. coefficient of total delay: 100 PPM/°C

©1997 Data Delay Devices

DASH NUMBER SPECIFICATIONS

Part

Total

Delay Per

Number

Delay (ns)

Tap (ns)

DDU224F-10

9 ± 2.0 *

1.0 ± 0.5

DDU224F-20

18 ± 2.0 *

2.0 ± 1.0

DDU224F-25

22.5 ± 2.0 *

2.5 ± 1.0

DDU224F-50

50

± 2.5

5.0 ± 2.0

DDU224F-100

100 ± 5.0

10.0 ± 3.0

DDU224F-150

150 ± 7.5

15.0 ± 3.0

DDU224F-200

200

± 10.0

20.0 ± 3.0

DDU224F-250

250

± 12.5

25.0 ± 3.0

DDU224F-300

300

± 15.0

30.0 ± 3.0

DDU224F-400

400

± 20.0

40.0 ± 4.0

DDU224F-500

500

± 25.0

50.0 ± 5.0

*Total delay is referenced to first tap output Input to first tap = 3.5ns ± 1ns

NOTE: Any dash number between 10 and 500 not shown is also available.

Doc #97015

DATA DELAY DEVICES, INC.

1

1/29/97

3 Mt. Prospect Ave. Clifton, NJ 07013

DADD DDU224F-20, DDU224F-150M, DDU224F-150, DDU224F-10M, DDU224F-100M Datasheet

DDU224F

APPLICATION NOTES

HIGH FREQUENCY RESPONSE

The DDU224F tolerances are guaranteed for input pulse widths and periods greater than those specified in the test conditions. Although the device will function properly for pulse widths as small as 20% of the total delay and periods as small as 40% of the total delay (for a symmetric input), the delays may deviate from their values at low frequency. However, for a given input condition, the deviation will be repeatable from pulse to pulse. Contact technical support at Data

Delay Devices if your application requires device testing at a specific input condition.

POWER SUPPLY BYPASSING

The DDU224F relies on a stable power supply to produce repeatable delays within the stated tolerances. A 0.1uf capacitor from VCC to GND, located as close as possible to the VCC pin, is recommended. A wide VCC trace and a clean ground plane should be used.

3.5ns 10% 10% 10% 10% 10% 10% 10% 10% 10%

VCC IN

T1

T2

T3

T4

T5

T6

T7

T8

T9

T10 GND

Functional diagram for dash numbers < 50

10% 10% 10% 10% 10% 10% 10% 10% 10% 10%

VCC IN

T1

T2

T3

T4

T5

T6

T7

T8

T9

T10 GND

Functional diagram for dash numbers >= 50

Doc #97015

DATA DELAY DEVICES, INC.

2

1/29/97

Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com

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