CTLST CAT22C10JA-20TE13, CAT22C10J-30TE13, CAT22C10J-20TE13, CAT22C10PI-30TE13, CAT22C10PI-20TE13 Datasheet

1

CAT22C10

256-Bit Nonvolatile CMOS Static RAM

FEATURES

■ Single 5V Supply

■ Fast RAM Access Times:

–200ns

–300ns

■ Infinite E

2

PROM to RAM Recall

■ CMOS and TTL Compatible I/O

■ Power Up/Down Protection

■ 100,000 Program/Erase Cycles (E

2

PROM)

■ Low CMOS Power Consumption:

–Active: 40mA Max.

–Standby: 30 µA Max.

■ JEDEC Standard Pinouts:

–18-pin DIP

–16-pin SOIC

■ 10 Year Data Retention

■ Commercial, Industrial and Automotive

Temperature Ranges

DESCRIPTION

The CAT22C10 NVRAM is a 256-bit nonvolatile memory

organized as 64 words x 4 bits. The high speed Static

RAM array is bit for bit backed up by a nonvolatile

E

2

PROM array which allows for easy transfer of data

from RAM array to E

2

PROM (STORE) and from

E

2

PROM to RAM (RECALL). STORE operations are

completed in 10ms max. and RECALL operations typi-

cally within 1.5µs. The CAT22C10 features unlimited

RAM write operations either through external RAM

PIN CONFIGURATION

PIN FUNCTIONS

Pin Name Function

A

0

–A

5

Address

I/O

0

–I/O

3

Data In/Out

WE Write Enable

CS Chip Select

RECALL Recall

STORE Store

V

CC

+5V

V

SS

Ground

NC No Connect

writes or internal recalls from E

2

PROM. Internal false

store protection circuitry prohibits STORE operations

when V

CC

is less than 3.0V.

The CAT22C10 is manufactured using Catalyst’s ad-

vanced CMOS floating gate technology. It is designed

to endure 100,000 program/erase cycles (E

2

PROM)

and has a data retention of 10 years. The device is

available in JEDEC approved 18-pin plastic DIP and 16-

pin SOIC packages.

SOIC Package (J)DIP Package (P)

© 1998 by Catalyst Semiconductor, Inc.

Characteristics subject to change without notice

NC

A

4

A

3

A

2

V

ss

A

1

CS

STORE

A

0

NC

V

cc

A

5

I/O

3

I/O

2

I/O

1

I/O

0

WE

RECALL

1

2

3

4

5

6

7

8

9

14

13

11

10

12

15

16

17

18

1

2

3

4

5

6

7

8

14

13

11

10

9

12

15

16

A

1

A

2

A

3

A

4

A

0

A

5

V

cc

I/O

4

I/O

3

I/O

2

I/O

1

V

ss

WE

CS

STORE RECALL

22C10 F01 22C10 F02

Doc. No. 25018-0A 2/98 N-1

CAT22C10

2

Doc. No. 25018-0A 2/98 N-1

MODE SELECTION

(1)(2)(3)

Input

Mode

CSCS

CSCS

CS

WEWE

WEWE

WE

RECALLRECALL

RECALLRECALL

RECALL

STORESTORE

STORESTORE

STORE I/O

Standby H X H H Output High-Z

RAM Read L H H H Output Data

RAM Write L L H H Input Data

(E

2

PROM→RAM) X H L H Output High-Z RECALL

(E

2

PROM→RAM) H X L H Output High-Z RECALL

(RAM→E

2

PROM) X H H L Output High-Z STORE

(RAM→E

2

PROM) H X H L Output High-Z STORE

BLOCK DIAGRAM

POWER-UP TIMING

(4)

Symbol Parameter Min. Max. Units

VCCSR V

CC

Slew Rate 0.5 0.005 V/ms

Note:

(1) RECALL signal has priority over STORE signal when both are applied at the same time.

(2) STORE is inhibited when RECALL is active.

(3) The store operation is inhibited when V

CC

is below ≈ 3.0V.

(4) This parameter is tested initially and after a design or process change that affects the parameter.

ROW

SELECT

COLUMN SELECT

CONTROL

LOGIC

READ/WRITE

CIRCUITS

RECALL

E

2

PROM ARRAY

STORE

A

0

A

1

A

2

A

3

A

4

A

5

STORE

RECALL

CS WE

I/O

0

I/O

1

I/O

2

I/O

3

STATIC RAM

ARRAY

5153 FHD F02

CAT22C10

3

Doc. No. 25018-0A 2/98 N-1

ABSOLUTE MAXIMUM RATINGS*

Temperature Under Bias ................. –55°C to +125°C

Storage Temperature....................... –65°C to +150°C

Voltage on Any Pin with

Respect to Ground

(2)

..............-2.0 to +VCC +2.0V

V

CC

with Respect to Ground ................ -2.0V to +7.0V

Package Power Dissipation

Capability (Ta = 25°C)................................... 1.0W

Lead Soldering Temperature (10 secs) ............ 300°C

Output Short Circuit Current

(3)

........................ 100 mA

*COMMENT

Stresses above those listed under “Absolute Maximum

Ratings” may cause permanent damage to the device.

These are stress ratings only, and functional operation

of the device at these or any other conditions outside of

those listed in the operational sections of this specifica-

tion is not implied. Exposure to any absolute maximum

rating for extended periods may affect device perfor-

mance and reliability.

RELIABILITY CHARACTERISTICS

Symbol Parameter Min. Max. Units Reference Test Method

N

END

(1)

Endurance 100,000 Cycles/Byte MIL-STD-883, Test Method 1033

T

DR

(1)

Data Retention 10 Years MIL-STD-883, Test Method 1008

V

ZAP

(1)

ESD Susceptibility 2000 Volts MIL-STD-883, Test Method 3015

I

LTH

(1)(4)

Latch-Up 100 mA JEDEC Standard 17

D.C. OPERATING CHARACTERISTICS

V

CC

= +5V ±10%, unless otherwise specified.

Limits

Symbol Parameter Min. Typ. Max. Unit Conditions

I

CC

Current Consumption 40 mA All Inputs = 5.5V

(Operating) T

A

= 0°C

All I/O’s Open

I

SB

Current Consumption 30 µA CS = V

CC

(Standby) All I/O’s Open

I

LI

Input Current 10 µA0 ≤ V

IN

≤ 5.5V

I

LO

Output Leakage Current 10 µA0 ≤ V

OUT

≤ 5.5V

V

IH

High Level Input Voltage 2 V

CC

V

V

IL

Low Level Input Voltage 0 0.8 V

V

OH

High Level Output Voltage 2.4 V I

OH

= –2mA

V

OL

Low Level Output Voltage 0.4 V I

OL

= 4.2mA

V

DH

RAM Data Holding Voltage 1.5 5.5 V V

CC

CAPACITANCE T

A

= 25°C, f = 1.0 MHz, V

CC

= 5V

Symbol Parameter Max. Unit Conditions

C

I/O

(1)

Input/Output Capacitance 10 pF V

I/O

= 0V

C

IN

(1)

Input Capacitance 6 pF V

IN

= 0V

Note:

(1) This parameter is tested initially and after a design or process change that affects the parameter.

(2) The minimum DC input voltage is -0.5V. During transitions, inputs may undershoot to -2.0V for periods of less than 20 ns. Maximum DC

voltage on output pins is V

CC

+0.5V, which may overshoot to V

CC

+2.0V for periods of less than 20 ns.

(3) Output shorted for no more than one second. No more than one output shorted at a time.

(4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from -1V to V

CC

+1V.