Features
∙Industry Standard Architecture
∙12 ns Maximum Pin-to-Pin Delay
∙Zero Power - 25 μA Maximum Standby Power
∙CMOS and TTL Compatible Inputs and Outputs
∙Advanced Electrically Erasable Technology Reprogrammable
100% Tested
∙Latch Feature Holds Inputs to Previous Logic State
∙High Reliability CMOS Process
20 Year Data Retention
100 Erase/Write Cycles
2,000V ESD Protection
∙Commercial and Industrial Temperature Ranges
∙Dual-in-Line and Surface Mount Packages in Standard Pinouts200 mA Latchup Immunity
Block Diagram
Description
The ATF22V10CZ is a high performance CMOS (Electrically Erasable) Programmable Logic Device (PLD) which utilizes Atmel’s proven electrically erasable Flash memory technology. Speeds down to 12 ns with zero standby power dissipation are offered. All speed ranges are specified over the full 5V ±10% range for industrial temperature ranges; 5V ± 5% for commercial range 5-volt devices.
Pin Configurations |
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TSSOP Top View |
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Pin Name |
Function |
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CLK |
Clock |
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CLK/IN |
1 |
24 |
VCC |
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IN |
Logic Inputs |
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IN |
2 |
23 |
I/O |
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IN |
3 |
22 |
I/O |
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I/O |
Bidirectional Buffers |
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IN |
4 |
21 |
I/O |
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IN |
5 |
20 |
I/O |
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VCC |
+5V Supply |
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IN |
6 |
19 |
I/O |
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IN |
7 |
18 |
I/O |
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IN |
8 |
17 |
I/O |
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DIP/SOIC |
PLCC Top View (1) |
IN |
9 |
16 |
I/O |
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IN |
10 |
15 |
I/O |
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IN |
11 |
14 |
I/O |
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GND |
12 |
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13 |
IN |
Note: 1. For PLCC, P1, P8, P15 and P22 can be left unconnected. Connect VCC to pin 1 and GND to 8, 15, and 22.
High |
Performance |
E2 PLD |
ATF22V10CZ
Preliminary
Rev. 0778B/V10CZ-B–04/98
The ATF22V10CZ provides a “zero” power CMOS PLD solution with 5V operating voltages. The ATF22V10CZ powers down automatically to the zero power mode through Atmel’s patented Input Transition Detection (ITD) circuitry when the device is idle. The ATF22V10CZ has an edge-sensing power down feature, offering “zero” (25 μA worst case) standby power. This feature allows the user to manage total system power to meet specific application requirements and enhance reliability. Pin “keeper”
Absolute Maximum Ratings*
...................Temperature Under Bias |
-40°C to +85°C |
Storage Temperature...................... |
-65°C to +150°C |
Voltage on Any Pin with |
-2.0V to +7.0V (1) |
Respect to Ground......................... |
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Voltage on Input Pins |
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with Respect to Ground |
-2.0V to +14.0V (1) |
During Programming.................... |
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Programming Voltage with |
-2.0V to +14.0V (1) |
Respect to Ground....................... |
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circuits on input and output pins eliminate static power consumed by pull-up resistors.
The ATF22V10CZ incorporates a superset of the generic architectures, which allows direct replacement of the 22V10 family and most 24-pin combinatorial PLDs. Ten outputs are each allocated 8 to 16 product terms. Three different modes of operation, configured automatically with software, allow highly complex logic functions to be realized.
*NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Note: 1. Minimum voltage is -0.6V dc, which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is Vcc + 0.75V dc, which may overshoot to 7.0V for pulses of less than 20 ns.
DC and AC Operating Conditions
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Commercial |
Industrial |
Operating Temperature (Case) |
0°C - 70°C |
-40°C - 85°C |
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VCC Power Supply |
5V ± 5% |
5V ± 10% |
2 ATF22V10CZ
ATF22V10CZ
Functional Logic Diagram Description
T h e F u n c t i o n a l L o g i c D i a g r a m d e s c r i b e s t h e ATF22V10CZ architecture.
The ATF22V10CZ has 12 inputs and 10 I/O macrocells. Each macrocell can be configured into one of four output configurations: active high/low, registered/combinatorial output. The universal architecture of the ATF22V10CZ can be programmed to emulate most 24-pin PAL devices.
DC Characteristics
Unused product terms are automatically disabled by the compiler to decrease power consumption. A Security Fuse, when programmed, protects the contents of the ATF22V10CZ. Eight bytes (64 fuses) of User Signature are accessible to the user for purposes such as storing project name, part number, revision or date. The User Signature is accessible regardless of the state of the Security Fuse.
Symbol |
Parameter |
Condition |
Min |
Typ |
Max |
Units |
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IIL |
Input or I/O Low |
0 ≤ VIN ≤ VIL(max) |
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-10 |
μA |
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Leakage Current |
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IIH |
Input or I/O High |
3.5 ≤ VIN ≤ VCC |
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10 |
μA |
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Leakage Current |
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ICC |
Clocked Power |
VCC = MAX, |
Com. |
90 |
150 |
mA |
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Outputs Open, |
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Supply Current |
Ind. |
90 |
180 |
mA |
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f = 15 MHz |
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ISB |
Power Supply Current, |
VCC = MAX, |
Com. |
5 |
25 |
μA |
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Standby |
VIN = MAX, |
Ind. |
5 |
50 |
μA |
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Outputs Open |
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IOS (1) |
Output Short Circuit |
VOUT = 0.5V |
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-150 |
mA |
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Current |
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VIL |
Input Low Voltage |
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-0.5 |
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0.8 |
V |
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VIH |
Input High Voltage |
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2.0 |
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VCC + 0.75 |
V |
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VIN = VIH or VIL |
Com. |
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0.5 |
V |
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VOL |
Output Low Voltage |
VCC = MIN, |
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Ind. |
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IOL = 16 mA |
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VOH |
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VIN = VIH or VIL, |
2.4 |
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V |
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Output High Voltage |
VCC = MIN, |
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IOH = -4.0 mA |
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Note: 1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec.
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