ATMEL AT90S4414-8AI, AT90S4414-8AC, AT90S4414-4PI, AT90S4414-4JI, AT90S4414-4JC Datasheet

Features

•AVR® - High Performance and Low Power RISC Architecture

•118 Powerful Instructions - Most Single Clock Cycle Execution

•4K bytes of In-System Reprogrammable Flash

–SPI Serial Interface for Program Downloading

–Endurance: 1,000 Write/Erase Cycles

•256 bytes EEPROM

–Endurance: 100,000 Write/Erase Cycles

•256 bytes Internal SRAM

•32 x 8 General Purpose Working Registers

•32 Programmable I/O Lines

•Programmable Serial UART

•SPI Serial Interface

•VCC: 2.7 - 6.0V

•Fully Static Operation

–0 - 8 MHz, 4.0 - 6.0V

–0 - 4 MHz, 2.7 - 4.0V

•Up to 8 MIPS Throughput at 8 MHz

•One 8-Bit Timer/Counter with Separate Prescaler

•One 16-Bit Timer/Counter with Separate Prescaler and Compare and Capture Modes

•Dual PWM

•External and Internal Interrupt Sources

•Programmable Watchdog Timer with On-Chip Oscillator

•On-Chip Analog Comparator

•Low Power Idle and Power Down Modes

•Programming Lock for Software Security

Description

The AT90S4414 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the AT90S4414 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.

The AVR core is based on an enhanced RISC architecture that combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. (continued)

Pin Configurations

8-Bit

Microcontroller

with 4K bytes

In-System

Programmable

Flash

AT90S4414

Preliminary

Rev. 0840DS–07/98

Note: This is a summary document. For the complete 76 page datasheet, please visit our web site at www.atmel.com or e- mail at [e-mail] and request literature #0840D.1

Block Diagram

Figure 1. The AT90S4414 Block Diagram

The AT90S4414 provides the following features: 4K bytes of In-System Programmable Flash, 256 bytes EEPROM, 256 bytes SRAM, 32 general purpose I/O lines, 32 general purpose working registers, flexible timer/counters with compare modes, internal and external interrupts, a programmable serial UART, programmable Watchdog Timer with internal oscillator, an SPI serial port and two software selectable power saving modes. The Idle Mode stops the CPU while allowing the SRAM, timer/counters, SPI port and interrupt system to continue functioning. The power down mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.

The device is manufactured using Atmel’s high density non-volatile memory technology. The on-chip In-System Programmable Flash allows the program memory to be reprogrammed in-system through an SPI serial interface or by a conventional nonvolatile memory programmer. By combining an enhanced RISC 8-bit CPU with In-System Programmable Flash on a monolithic chip, the Atmel AT90S4414 is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications.

The AT90S4414 AVR is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, incircuit emulators, and evaluation kits.

2	AT90S4414

Pin Descriptions

VCC

Supply voltage

GND

Ground

Port A (PA7..PA0)

Port A is an 8-bit bidirectional I/O port. Port pins can provide internal pull-up resistors (selected for each bit). The Port A output buffers can sink 20mA and can drive LED displays directly. When pins PA0 to PA7 are used as inputs and are externally pulled low, they will source current if the internal pull-up resistors are activated.

Port A serves as Multiplexed Address/Data input/output when using external SRAM.

Port B (PB7..PB0)

Port B is an 8-bit bidirectional I/O pins with internal pull-up resistors. The Port B output buffers can sink 20 mA. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated.

Port B also serves the functions of various special features of the AT90S4414 as listed on page 45.

Port C (PC7..PC0)

Port C is an 8-bit bidirectional I/O port with internal pull-up resistors. The Port C output buffers can sink 20 mA. As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are activated.

Port C also serves as Address output when using external SRAM.

Port D (PD7..PD0)

Port D is an 8-bit bidirectional I/O port with internal pull-up resistors. The Port D output buffers can sink 20 mA. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated.

Port D also serves the functions of various special features of the AT90S4414 as listed on page 51.

RESET

Reset input. A low on this pin for two machine cycles while the oscillator is running resets the device.

XTAL1

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2

Output from the inverting oscillator amplifier

ICP

ICP is the input pin for the Timer/Counter1 Input Capture function.

AT90S4414

OC1B

OC1B is the output pin for the Timer/Counter1 Output CompareB function

ALE

ALE is the Address Latch Enable used when the External Memory is enabled. The ALE strobe is used to latch the low-order address (8 bits) into an address latch during the first access cycle, and the AD0-7 pins are used for data during the second access cycle.

Crystal Oscillator

XTAL1 and XTAL2 are input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 2. Either a quartz crystal or a ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 3.

Figure 2. Oscillator Connections

Figure 3. External Clock Drive Configuration

3