ATMEL AT90LS2333-4PI, AT90LS2333-4PC, AT90LS2333-4AC, AT90S2333-8PI, AT90S2333-8AI Datasheet

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Features

High-performance and Low-power AVR® 8-bit RISC Architecture

118 Powerful Instructions - Most Single Cycle Execution

32 x 8 General Purpose Working Registers

Up to 8 MIPS Throughput at 8 MHz

Data and Nonvolatile Program Memory

2K/4K Bytes of In-System Programmable Flash

Endurance 1,000 Write/Erase Cycles

128 Bytes of SRAM

128/256 Bytes of In-System Programmable EEPROM Endurance: 100,000 Write/Erase Cycles

Programming Lock for Flash Program and EEPROM Data Security

Peripheral Features

One 8-bit Timer/Counter with Separate Prescaler

Expanded 16-bit Timer/Counter with Separate Prescaler, Compare, Capture Modes and 8-, 9- or 10-bit PWM

On-chip Analog Comparator

Programmable Watchdog Timer with Separate On-chip Oscillator

Programmable UART

6-channel, 10-bit ADC

Master/Slave SPI Serial Interface

Special Microcontroller Features

Brown-Out Reset Circuit

Enhanced Power-on Reset Circuit

Low-Power Idle and Power Down Modes

External and Internal Interrupt Sources

Specifications

Low-power, High-speed CMOS Process Technology

Fully Static Operation

Power Consumption at 4 MHz, 3V, 25°C

Active: 3.4 mA

Idle Mode: 1.4 mA

Power Down Mode: <1 µA

I/O and Packages

20 Programmable I/O Lines

28-pin PDIP and 32-pin TQFP

Operating Voltage

2.7V - 6.0V (AT90LS2333 and AT90LS4433)

4.0V - 6.0V (AT90S2333 and AT90S4433)

Speed Grades

0 - 4 MHz (AT90LS2333 and AT90LS4433)

0 - 8 MHz (AT90S2333 and AT90S4433)

Pin Configurations

 

TQFP Top View

 

 

 

 

 

 

PDIP

 

 

(INT0)PD2

(TXD)PD1

(RDX)PD0

 

(ADC5)PC5

(ADC4)PC4

(ADC3)PC3

(ADC2)PC2

 

 

 

 

 

 

 

 

 

 

RESET

 

RESET

 

1

 

28

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(RXD) PD0

 

2

 

27

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

32

31

30

29

28

27

26

25

 

(TXD) PD1

 

3

 

26

 

 

 

 

 

 

 

 

(INT0) PD2

 

4

 

25

 

 

 

 

 

 

 

 

 

 

 

(INT1) PD3

1

 

 

 

 

 

 

24

PC1 (ADC1)

(INT1) PD3

 

5

 

24

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(T0) PD4

 

6

 

23

 

(T0) PD4

2

 

 

 

 

 

 

23

PC0 (ADC0)

 

 

 

 

 

 

 

 

 

 

 

 

NC

3

 

 

 

 

 

 

22

NC

VCC

 

7

 

22

 

 

 

 

 

 

 

 

 

 

VCC

4

 

 

 

 

 

 

21

AGND

GND

 

8

 

21

 

 

 

 

 

 

 

 

 

 

GND

5

 

 

 

 

 

 

20

AREF

XTAL1

 

9

 

20

 

NC

6

 

 

 

 

 

 

19

NC

XTAL2

 

10

19

 

XTAL1

7

 

 

 

 

 

 

18

AVCC

 

 

 

 

 

 

 

 

(T1) PD5

 

11

18

 

XTAL2

8

 

 

 

 

 

 

17

PB5 (SCK)

 

 

 

 

 

 

 

 

 

 

 

9

10

11

12

13

14

15

16

 

(AIN0) PD6

 

12

17

 

 

 

 

 

 

 

(AIN1) PD7

 

13

16

 

 

PD5(T1)

PD6(AIN0)

PD7(AIN1)

PB0(ICP)

PB1(OC1)

PB2(SS)

PB3(MOS1)

PB4(MOS0)

 

 

 

 

 

(ICP) PB0

 

14

15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PC5 (ADC5) PC4 (ADC4) PC3 (ADC3) PC2 (ADC2) PC1 (ADC1) PC0 (ADC0) AGND AREF AVCC

PB5 (SCK) PB4 (MISO) PB3 (MOSI) PB2 (SS) PB1 (OC1)

8-bit

Microcontroller

with 2K/4K bytes

In-System

Programmable

Flash

AT90S2333

AT90LS2333

AT90S4433

AT90LS4433

Preliminary

Rev. 1042DS–04/99

Note: This is a summary document. For the complete 103 page

document, please visit our Web site at www.atmel.com or e-mail

1

at literature@atmel.com and request literature #1042D.

Description

The AT90S2333/4433 is a low-power CMOS 8-bit microcontroller based on the AVR RISC architecture. By executing powerful instructions in a single clock cycle, the AT90S2333/4433 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.

The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.

The AT90S2333/4433 provides the following features: 2K/4K bytes of In-System Programmable Flash, 128/256 bytes EEPROM, 128 bytes SRAM, 20 general purpose I/O lines, 32 general purpose working registers, two flexible timer/counters with compare modes, internal and external interrupts, a programmable serial UART, 6-channel, 10-bit ADC, programmable Watchdog Timer with internal oscillator, an SPI serial port and two software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, timer/counters, SPI port and interrupt system to continue functioning. The Power Down mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.

The device is manufactured using Atmel’s high density nonvolatile memory technology. The on-chip Flash program memory can be reprogrammed in-system through an SPI serial interface or by a conventional nonvolatile memory programmer. By combining a RISC 8-bit CPU with In-System Programmable Flash on a monolithic chip, the Atmel AT90S2333/4433 is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications.

The AT90S2333/4433 AVR is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation kits.

Table 1. Comparison Table

Device

Flash

EEPROM

SRAM

Voltage Range

Frequency

 

 

 

 

 

 

AT90S2333

2K

128B

128B

4.0V - 6.0V

0 - 8 MHz

 

 

 

 

 

 

AT90LS2333

2K

128B

128B

2.7V - 6.0V

0 - 4 MHz

 

 

 

 

 

 

AT90S4433

4K

256B

128B

4.0V - 6.0V

0 - 8 MHz

 

 

 

 

 

 

AT90LS4433

4K

256B

128B

2.7V - 6.0V

0 - 4 MHz

 

 

 

 

 

 

2 AT90S/LS2333 and AT90S/LS4433

ATMEL AT90LS2333-4PI, AT90LS2333-4PC, AT90LS2333-4AC, AT90S2333-8PI, AT90S2333-8AI Datasheet

AT90S/LS2333 and AT90S/LS4433

Block Diagram

Figure 1. The AT90S2333/4433 Block Diagram

 

PC0 - PC5

 

 

 

VCC

 

 

 

 

 

PORTC DRIVERS

 

 

GND

 

 

 

 

 

DATA REGISTER

DATA DIR.

 

 

 

PORTC

REG. PORTC

 

 

 

8-BIT DATA BUS

 

 

AVCC

 

 

 

 

ANALOG MUX

ADC

 

 

 

AGND

 

 

 

XTAL1

AREF

 

 

 

 

 

 

 

 

 

INTERNAL

OSCILLATOR

 

 

 

OSCILLATOR

 

 

 

 

 

PROGRAM

STACK

WATCHDOG

TIMING AND

XTAL2

RESET

COUNTER

POINTER

TIMER

CONTROL

 

PROGRAM

SRAM

MCU CONTROL

 

 

FLASH

REGISTER

 

 

 

 

 

INSTRUCTION

GENERAL

TIMER/

 

 

REGISTER

PURPOSE

COUNTERS

 

 

 

REGISTERS

 

 

 

INSTRUCTION

X

INTERRUPT

 

 

Y

 

 

DECODER

Z

UNIT

 

 

CONTROL

ALU

EEPROM

 

 

LINES

 

 

 

 

 

 

 

STATUS

 

 

 

 

REGISTER

 

 

 

PROGRAMMING

SPI

UART

 

 

LOGIC

 

 

 

 

 

 

DATA REGISTER

DATA DIR.

DATA REGISTER

DATA DIR.

 

PORTB

REG. PORTB

PORTD

REG. PORTD

- +

 

 

 

 

ANALOG

 

 

 

 

COMPARATOR

PORTB DRIVERS

PORTD DRIVERS

 

PB0 - PB5

PD0 - PD7

 

3

Pin Descriptions

VCC

Supply voltage

GND

Ground

Port B (PB5..PB0)

Port B is a 6-bit bi-directional I/O port with internal pullup resistors. The Port B output buffers can sink 20 mA. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated.

Port B also serves the functions of various special features of the AT90S2333/4433.

The port B pins are tristated when a reset condition becomes active, even if the clock is not running.

Port C (PC5..PC0)

Port C is a 6-bit bi-directional I/O port with internal pullup resistors. The Port C output buffers can sink 20 mA. As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are activated. Port C also serves as the analog inputs to the A/D Converter.

The port C pins are tristated when a reset condition becomes active, even if the clock is not running.

Port D (PD7..PD0)

Port D is an 8-bit bi-directional I/O port with internal pull-up resistors. The Port D output buffers can sink 20 mA. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated.

Port D also serves the functions of various special features of the AT90S2333/4433.

The port D pins are tristated when a reset condition becomes active, even if the clock is not running.

RESET

Reset input. An external reset is generated by a low level on the RESET pin. Reset pulses longer than 50 ns will generate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset.

XTAL1

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2

Output from the inverting oscillator amplifier

AVCC

This is the supply voltage pin for the A/D Converter. It should be externally connected to VCC via a low-pass filter. See Datasheet for details on operation of the ADC.

AREF

This is the analog reference input for the A/D Converter. For ADC operations, a voltage in the range 2.7V to AVCC must be applied to this pin.

AGND

If the board has a separate analog ground plane, this pin should be connected to this ground plane. Otherwise, connect to GND.

4 AT90S/LS2333 and AT90S/LS4433

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