Features |
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• 8-Bit Multiplexed Addresses/Outputs |
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• Fast Read Access Time - 90 ns |
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• Dual Voltage Range Operation |
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– Low-Voltage Power Supply Range, 3.0V to 3.6V, or |
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– Standard 5V ± 10% Supply Range |
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• Low Power CMOS Operation |
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– 20 μA max. Standby for ALE = VIH and VCC = 3.6V |
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– 29 mW max. Active at 5 MHz for V CC = 3.6V |
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• 20-Lead TSSOP Package |
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512K (64K x 8) |
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• High Reliability CMOS Technology |
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– 2,000V ESD Protection |
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μs/byte (typical) |
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Multiplexed |
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• Rapid™ Programming Algorithm - 50 |
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– 200 mA Latchup Immunity |
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• CMOS and TTL Compatible Inputs and Outputs |
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Addresses/ |
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– JEDEC Standard for LVTTL |
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• Integrated Product Identification Code |
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Outputs |
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• Commercial and Industrial Temperature Range |
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Description |
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Low Voltage |
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The AT27LV520 is a low-power, high-performance 524,288-bit one-time programma- |
OTP EPROM |
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ble read only memory (OTP EPROM) organized 64K by 8 bits. It incorporates latches |
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for the 8 lower order address bits to multiplex with the 8 data bits. This minimizes sys- |
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tem chip count, reduces cost, and simplifies the design of multiplexed bus systems. It |
AT27LV520 |
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requires only one power supply in the range of 3.0V to 3.6V for normal read mode |
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operation, making it ideal for fast, portable systems using battery power. Any byte can |
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be accessed in less than 90 ns. |
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The AT27LV520 is available in 173 mil, 20-pin TSSOP, 300 mil, 20-pin SOIC and 28- |
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pin TSOP, one-time programmable (OTP) plastic packages. |
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(continued) |
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Pin Configurations |
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TSSOP Top View |
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Pin Name |
Function |
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A8 - A15 |
Addresses |
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A10 |
1 |
20 |
A8 |
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A12 |
2 |
19 |
AD1 |
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AD0 - AD7 |
Addresses/Outputs |
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A14 |
3 |
18 |
AD3 |
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ALE |
4 |
17 |
AD5 |
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OE /VPP |
Output Enable/VPP |
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VCC |
5 |
16 |
AD7 |
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OE/VPP |
6 |
15 |
GND |
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A15 |
7 |
14 |
AD6 |
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ALE |
Address Latch Enable |
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A13 |
8 |
13 |
AD4 |
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A11 |
9 |
12 |
AD2 |
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A9 |
10 |
11 |
AD0 |
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TSOP Top View |
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A10 |
22 |
21 |
A8 |
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SOIC Top View |
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NC |
23 |
20 |
NC |
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NC |
24 |
19 |
NC |
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A12 |
25 |
18 |
AD1 |
OE/VPP |
1 |
20 |
VCC |
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A14 |
26 |
17 |
AD3 |
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A15 |
2 |
19 |
ALE |
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ALE |
27 |
16 |
AD5 |
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A13 |
3 |
18 |
A14 |
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VCC |
28 |
15 |
AD7 |
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A11 |
4 |
17 |
A12 |
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OE/VPP |
1 |
14 |
GND |
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A9 |
5 |
16 |
A10 |
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A15 |
2 |
13 |
AD6 |
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AD0 |
6 |
15 |
A8 |
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A13 |
3 |
12 |
AD4 |
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AD2 |
7 |
14 |
AD1 |
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A11 |
4 |
11 |
AD2 |
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AD4 |
8 |
13 |
AD3 |
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NC |
5 |
10 |
NC |
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AD6 |
9 |
12 |
AD5 |
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NC |
6 |
9 |
NC |
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GND |
10 |
11 |
AD7 |
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A9 |
7 |
8 |
AD0 |
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Rev. 0911B-B–01/98 |
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1 |
Atmel’s innovative design techniques provide fast speeds that rival 5V parts while keeping the low power consumption of a 3.3V supply. At VCC = 3.0V, any byte can be accessed in less than 90 ns. With a typical power dissipation of only 18 mW at 5 MHz and VC C = 3.3V, the AT27LV520 consumes less than one fifth the power of a standard 5V EPROM. Standby mode is acheived by asserting ALE high. Standby mode supply current is typically less than 1 μA at 3.3V.
The AT27LV520 operating with VCC at 3.0V produces TTL level outputs that are compatible with standard TTL logic devices operating at VCC = 5.0V. The device is also capable of standard 5-volt operation making it ideally suited for dual supply range systems or card products that are pluggable in both 3-volt and 5-volt hosts.
Atmel’s AT27LV520 has additional features to ensure high quality and efficient production use. The Rapid™ Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programing time is typically only 50 μs/byte. The Integrated Product Identification Code electronically identifies the device and
manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. The AT27LV520 programs exactly the same way as a standard 5V AT27C520 and uses the same programming equipment.
System Considerations
Switching under active conditions may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 μF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 μF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array.
Block Diagram
VCC |
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8 |
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GND |
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OE/VPP |
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OE, ALE, AND |
OUTPUT |
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ALE |
PROGRAM LOGIC |
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BUFFERS |
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LATCHES |
Y DECODER |
Y-GATING |
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AD7 - AD0 |
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X DECODER |
CELL MATRIX |
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8 |
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A15 - A8 |
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IDENTIFICATION |
2 |
AT27LV520 |
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Absolute Maximum Ratings*
Temperature Under Bias |
................................ -55°C to +125°C |
Storage Temperature ..................................... |
-65°C to +150°C |
Voltage on Any Pin with |
-2.0V to +7.0V(1) |
Respect to Ground ........................................ |
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Voltage on A9 with |
-2.0V to +14.0V(1) |
Respect to Ground ..................................... |
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VPP Supply Voltage with |
-2.0V to +14.0V(1) |
Respect to Ground ...................................... |
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AT27LV520
*NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Note: 1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns.
Operating Modes
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Mode/Pin |
ALE |
OE/VPP |
A8 - A15 |
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AD0 - AD7 |
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Read(2) |
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V |
IL |
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V |
Ai |
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D |
OUT |
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IL |
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Output Disable(2) |
V |
IL |
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V |
IH |
X(1) |
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High Z/A0 - A7 |
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IH |
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Standby |
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VIH |
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VIH |
Ai |
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A0 - A7 |
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Address Latch Enable(2) |
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V |
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V |
IH |
X |
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A0 - A7 |
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IH |
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Rapid Program(3) |
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V |
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V |
PP |
Ai |
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D |
IN |
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IH |
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Product Identification(4) |
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A9 = VH(5) |
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V |
IL |
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A8 = V |
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or V |
IL |
Identification Code |
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IL |
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A10 - A15 = VIL |
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Notes: 1. X can be VIL or VIH.
2.Read, output disable, and standby modes require 3.0V ≤ VCC ≤ 3.6V, or 4.5V ≤ VCC ≤ 5.5V.
3.Refer to Programming Characteristics.
4.VH = 12.0 ± 0.5V.
5.Two identifier bytes may be selected. All A8 - A15 inputs are held low (VIL), except A9 which is set to VH and A8 which is toggled low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
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