Features
•Fast Read Access Time - 70 ns
•Word-wide or Byte-wide Configurable
•4 Megabit Flash and Mask ROM Compatible
•Low Power CMOS Operation
–100 μA Maximum Standby
–50 mA Maximum Active at 5 MHz
•Wide Selection of JEDEC Standard Packages
–40-Lead 600 mil PDIP
–40-Lead SOIC (SOP)
–48-Lead TSOP (12 mm x 20 mm)
•5V ± 10% Power Supply
•High Reliability CMOS Technology
–2,000V ESD Protection
–200 mA Latchup Immunity
•Rapid™ Programming Algorithm - 50 μs/word (typical)
•CMOS and TTL Compatible Inputs and Outputs
•Integrated Product Identification Code
•Commercial and Industrial Temperature Ranges
Description
The AT27C400 is a low-power, high-performance 4,194,304-bit one-time programmable read only memory (OTP EPROM) organized as either 256K by 16 or 512K by 8 bits. It requires a single 5V power supply in normal read mode operation. Any word can be accessed in less than 70 ns, eliminating the need for speed-reducing WAIT states. The by-16 organization makes this part ideal for high-performance 16and 32bit microprocessor systems.
Pin Configurations
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Pin Name |
Function |
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A0 - A17 |
Addresses |
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O0 - O15 |
Outputs |
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O15/A-1 |
Output/Address |
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Byte Mode/ |
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BYTE/VPP |
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Program Supply |
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Chip Enable |
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CE |
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Output Enable |
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OE |
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NC |
No Connect |
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Note: Both GND pins must be connected.
PDIP Top View |
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SOIC (SOP) |
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A17 |
1 |
40 |
A8 |
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A17 |
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1 |
40 |
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A8 |
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A7 |
2 |
39 |
A9 |
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A7 |
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2 |
39 |
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A9 |
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A6 |
3 |
38 |
A10 |
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A6 |
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3 |
38 |
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A10 |
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A5 |
4 |
37 |
A11 |
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A5 |
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4 |
37 |
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A11 |
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A4 |
5 |
36 |
A12 |
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A4 |
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5 |
36 |
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A12 |
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A3 |
6 |
35 |
A13 |
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A3 |
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6 |
35 |
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A13 |
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A2 |
7 |
34 |
A14 |
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A2 |
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7 |
34 |
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A14 |
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A1 |
8 |
33 |
A15 |
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A1 |
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8 |
33 |
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A15 |
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A0 |
9 |
32 |
A16 |
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A0 |
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9 |
32 |
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A16 |
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CE |
10 |
31 |
BYTE/VPP |
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CE |
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10 |
31 |
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BYTE/VPP |
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GND |
11 |
30 |
GND |
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GND |
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11 |
30 |
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GND |
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OE |
12 |
29 |
015/A-1 |
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OE |
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12 |
29 |
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015/A-1 |
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O0 |
13 |
28 |
O7 |
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O0 |
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13 |
28 |
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O7 |
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O8 |
14 |
27 |
O14 |
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O8 |
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14 |
27 |
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O14 |
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O1 |
15 |
26 |
O6 |
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O1 |
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15 |
26 |
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O6 |
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O9 |
16 |
25 |
O13 |
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O9 |
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16 |
25 |
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O13 |
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O2 |
17 |
24 |
O5 |
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O2 |
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17 |
24 |
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O5 |
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O10 |
18 |
23 |
O12 |
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O10 |
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18 |
23 |
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O12 |
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O3 |
19 |
22 |
O4 |
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O3 |
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19 |
22 |
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O4 |
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O11 |
20 |
21 |
VCC |
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O11 |
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20 |
21 |
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VCC |
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TSOP |
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Type 1 |
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A15 |
1 |
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48 |
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A16 |
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A14 |
2 |
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47 |
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BYTE/VPP |
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A13 |
3 |
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46 |
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GND |
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A12 |
4 |
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45 |
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015/A-1 |
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A11 |
5 |
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44 |
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I/O7 |
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A10 |
6 |
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43 |
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O14 |
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A9 |
7 |
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42 |
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O6 |
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A8 |
8 |
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41 |
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O13 |
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NC |
9 |
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40 |
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O5 |
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NC |
10 |
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39 |
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O12 |
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NC |
11 |
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38 |
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O4 |
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NC |
12 |
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37 |
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VCC |
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NC |
13 |
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36 |
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O11 |
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NC |
14 |
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35 |
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O3 |
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NC |
15 |
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34 |
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O10 |
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NC |
16 |
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33 |
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O2 |
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A17 |
17 |
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32 |
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O9 |
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A7 |
18 |
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31 |
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O1 |
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A6 |
19 |
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30 |
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O8 |
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A5 |
20 |
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29 |
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O0 |
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A4 |
21 |
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28 |
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OE |
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A3 |
22 |
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27 |
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GND |
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A2 |
23 |
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26 |
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CE |
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A1 |
24 |
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25 |
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A0 |
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AT27C400
4-Megabit
(256K x 16 or
512K x 8) OTP EPROM
AT27C400
Preliminary
0844A-A–7/97
1
Description (Continued)
The AT27C400 can be organized as either word-wide or byte-wide. The organization is selected via the BYTE/VPP
pin. When BYTE/VPP is asserted high (VIH), the word-wide organization is selected and the O15/A-1 pin is used for O15 data output. When BYTE/VPP is asserted low (VIL), the byte-wide organization is selected and the O15/A-1 pin is used for the address pin A-1. When the AT27C400 is logically regarded as x16 (word-wide), but read in the bytewide mode, then with A-1 = VIL the lower 8 bits of the 16-bit word are selected and with A-1 = VIH the upper 8 bits of the 16-bit word are selected.
In read mode, the AT27C400 typically consumes 15 mA. Standby mode supply current is typically less than 10 μA.
The AT27C400 is available in industry standard JEDEC-approved one-time programmable (OTP) PDIP, SOIC (SOP), and TSOP packages. The device features two-line control (CE, OE) to eliminate bus contention in high-speed systems.
With high density 256K word or 512K byte storage capability, the AT27C400 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media.
Atmel’s AT27C400 has additional features that ensure high quality and efficient production use. The Rapid™ Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 50 μs/word. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages.
System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 μF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 μF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array.
2 |
AT27C400 |
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AT27C400
Block Diagram
Absolute Maximum Ratings*
Temperature Under Bias ......................-55°C to +125°C |
*NOTICE: |
Stresses beyond those listed under “Absolute Maxi- |
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mum Ratings” may cause permanent damage to the |
Storage Temperature............................-65°C to +150°C |
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device. This is a stress rating only and functional |
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operation of the device at these or any other condi- |
Voltage on Any Pin with |
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tions beyond those indicated in the operational sec- |
Respect to Ground ..............................-2.0V to +7.0V (1) |
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tions of this specification is not implied. Exposure to |
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absolute maximum rating conditions for extended |
Voltage on A9 with |
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periods may affect device reliability. |
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Respect to Ground ...........................-2.0V to +14.0V (1) |
Note: 1. |
Minimum voltage is -0.6V dc which undershoot to - |
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VPP Supply Voltage with |
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2.0V for pulses of less than 20 ns. Maximum output |
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pin voltage is VCC + 0.75V dc which may overshoot to |
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Respect to Ground ............................-2.0V to +14.0V (1) |
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+7.0V for pulses of less than 20 ns. |
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Integrated UV Erase Dose...................7258 W •sec/cm2 |
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Operating Modes
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Outputs |
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Mode/Pin |
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Ai |
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O0 - O7 |
O8 - O14 |
O15/A-1 |
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CE |
OE |
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BYTE/VPP |
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Read Word-wide |
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V |
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V |
IL |
X(1) |
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V |
IH |
D |
OUT |
D |
OUT |
D |
OUT |
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IL |
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Read Byte-wide Upper |
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V |
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V |
IL |
X(1) |
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V |
IL |
D |
OUT |
High Z |
V |
IH |
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IL |
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Read Byte-wide Lower |
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V |
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V |
IL |
X(1) |
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V |
IL |
D |
OUT |
High Z |
V |
IL |
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IL |
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Output Disable |
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X(1) |
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VIH |
X(1) |
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X |
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High Z |
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Standby |
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V |
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X(1) |
X(1) |
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X(5) |
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High Z |
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IH |
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Rapid Program(2) |
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VIL |
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VIH |
Ai |
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VPP |
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DIN |
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PGM Verify |
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X |
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VIL |
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VPP |
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DOUT |
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PGM Inhibit |
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V |
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V |
IH |
X(1) |
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V |
PP |
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High Z |
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IH |
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A9 = V |
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Identificatio |
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Product Identification(4) |
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H |
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VIL |
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VIL |
A0 = VIH or VIL |
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VIH |
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n |
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A1 - A17 = VIL |
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Code |
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Notes: 1. X can be VIL or VIH.
2.Refer to the programming characteristics tables in this data sheet.
3.VH = 12.0 ± 0.5V.
4.Two identifier words may be selected. All inputs are held low (VIL), except A9, which is set to VH, and A0, which is toggled low (VIL) to select the Manufacturer’s Identification word and high (VIH) to select the Device Code word.
5.Standby VCC current (ISB) is specified with VPP = VCC. VCC > VPP will cause a slight increase in ISB.
3