ATMEL AT25128N1-10SI-2.7, AT25128N1-10SI-1.8, AT25128N1-10SI, AT25128N1-10SC-2.7, AT25128N1-10SC-1.8 Datasheet

Features

∙Serial Peripheral Interface (SPI) Compatible

∙Supports SPI Modes 0 (0,0) and 3 (1,1)

∙Low Voltage and Standard Voltage Operation

5.0(VCC = 4.5V to 5.5V)

2.7 (VCC = 2.7V to 5.5V)

1.8(VCC = 1.8V to 3.6V)

∙2.1 MHz Clock Rate

∙32-Byte Page Mode

∙Block Write Protection

∙Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software Data Protection

∙Self-Timed Write Cycle (5 ms Typical)

∙High ReliabilityProtect 1/4, 1/2, or Entire Array

Endurance: 100,000 Cycles

∙Automotive Grade and Extended Temperature Devices Available

∙8-Pin PDIP, 14-pin, 16-pin JEDEC SOIC, and 20-Pin TSSOP PackagesData Retention: 100 Years

Description

The AT25128 provides 131,072 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 16,384 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT25128 is available in space saving 8-pin PDIP, JEDEC SOIC, and 14-pin and 20-pin TSSOP packages.

(continued)

Pin Configurations

Pin Name Function

8-Pin PDIP

14-Pin SOIC

CS

Chip Select

SCK

Serial Data Clock

CS

1

14

VCC

SI

Serial Data Input

SO

2

13

HOLD

CS

1

8

VCC

NC

3

12

NC

SO

Serial Data Output

SO

2

7

HOLD

NC

4

11

NC

WP

3

6

SCK

GND

Ground

NC

5

10

NC

GND

4

5

SI

WP

6

9

SCK

VCC

Power Supply

GND

7

8

SI

WP

Write Protect

HOLD

Suspends Serial Input

NC

No Connect

DC

Don’t Connect

			16-Lead SOIC															20-Lead TSSOP*
														NC					1	20	NC
																			2	19	VCC
															CS
	CS					1	16			VCC
														SO					3	18
																						HOLD
	SO					2	15			HOLD
														SO					4	17
	NC					3	14			NC												HOLD
	NC					4	13			NC				NC					5	16	NC
	NC					5	12			NC				NC					6	15	NC
	NC					6	11			NC				WP					7	14	SCK
													GND						8	13	SI
	WP					7	10			SCK
GND						8	9			SI				DC					9	12	DC
														NC					10	11	NC

* Note: Pins 3, 4 and 17, 18 are internally connected for 14-lead TSSOP socket compatibility.

SPI Serial

E2PROMs

128K (16384 x 8)

AT25128

Preliminary

Description (Continued)

The AT25128 is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self-timed, and no separate ERASE cycle is required before WRITE.

BLOCK WRITE protection is enabled by programming the status register with one of four blocks of write protection. Separate program enable and program disable instruc-

tions are provided for additional data protection. Hardware data protection is provided via the WP pin to protect against inadvertent write attempts to the status register. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence.

Absolute Maximum Ratings*

...................Operating Temperature	-55°C to +125°C
Storage Temperature......................	-65°C to +150°C
Voltage on Any Pin
with Respect to Ground .....................	-1.0V to +7.0V
Maximum Operating Voltage ...........................	6.25V
DC Output Current .........................................	5.0 mA

Block Diagram

*NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

2 AT25128

AT25128

Pin Capacitance (1)

Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted).

	Test Conditions							Max	Units	Conditions
COUT	Output Capacitance (SO)							8	pF	VOUT = 0V
CIN	Input Capacitance (CS, SCK, SI, WP, HOLD)							6	pF	VIN = 0V

Note: 1. This parameter is characterized and is not 100% tested.

DC Characteristics

Applicable over recommended operating range from: TAI = -40°C to +85°C, V CC = +1.8V to +5.5V, TAC = 0°C to +70°C, V CC = +1.8V to +5.5V (unless otherwise noted).

Symbol	Parameter	Test Condition				Min	Typ	Max	Units
VCC1	Supply Voltage					1.8		3.6	V
VCC2	Supply Voltage					2.7		5.5	V
VCC3	Supply Voltage					4.5		5.5	V
ICC1	Supply Current	VCC = 5.0V at 1 MHz,						3.0	mA
		SO = Open
ICC2	Supply Current	VCC = 5.0V at 2 MHz,						5.0	mA
		SO = Open
									μA
ISB1	Standby Current	VCC = 1.8V		CS = VCC				0.1
ISB2									μA
	Standby Current	VCC = 2.7V		CS = VCC			0.2	0.5
ISB3									μA
	Standby Current	VCC = 5.0V		CS = VCC			0.5	2.0
IIL	Input Leakage	VIN = 0V to VCC				-3.0		3.0	μA
IOL	Output Leakage	VIN = 0V to VCC,				-3.0		3.0	μA
		TAC = 0°C to 70°C
VIL (1)	Input Low Voltage					-1.0		VCC x 0.3	V
VIH (1)	Input High Voltage					VCC x 0.7		VCC + 0.5	V
VOL1	Output Low Voltage	4.5V ≤ VCC ≤ 5.5V		IOL = 3.0 mA				0.4	V
VOH1	Output High Voltage			IOH = -1.6 mA		VCC - 0.8			V
VOL2	Output Low Voltage	1.8V ≤ VCC ≤ 3.6V		IOL = 0.15 mA				0.2	V
VOH2	Output High Voltage			IOH = -100 μA		VCC - 0.2			V

Note: 1. VIL min and VIH max are reference only and are not tested.

3

AC Characteristics

Applicable over recommended operating range from TA = -40°C to +85°C, V CC = As Specified, CL = 1 TTL Gate and 100 pF (unless otherwise noted).

Symbol	Parameter				Voltage	Min	Max	Units
					4.5 - 5.5	0	2.1
fSCK		SCK Clock Frequency			2.7 - 5.5	0	2.1	MHz
					1.8 - 3.6	0	0.5
tRI					4.5 - 5.5		2	μs
		Input Rise Time			2.7 - 5.5		2
					1.8 - 3.6		2
tFI					4.5 - 5.5		2	μs
		Input Fall Time			2.7 - 5.5		2
					1.8 - 3.6		2
tWH					4.5 - 5.5	200
		SCK High Time			2.7 - 5.5	300		ns
					1.8 - 3.6	800
tWL					4.5 - 5.5	200
		SCK Low Time			2.7 - 5.5	200		ns
					1.8 - 3.6	800
tCS					4.5 - 5.5	250		ns
		CS High Time			2.7 - 5.5	250
					1.8 - 3.6	1000
tCSS					4.5 - 5.5	250		ns
		CS Setup Time			2.7 - 5.5	250
					1.8 - 3.6	1000
tCSH					4.5 - 5.5	250
		CS Hold Time			2.7 - 5.5	250		ns
					1.8 - 3.6	1000
tSU					4.5 - 5.5	50
		Data In Setup Time			2.7 - 5.5	50		ns
					1.8 - 3.6	100
tH					4.5 - 5.5	50
		Data In Hold Time			2.7 - 5.5	50		ns
					1.8 - 3.6	100
tHD					4.5 - 5.5	100
		Hold Setup Time			2.7 - 5.5	100		ns
					1.8 - 3.6	400
tCD					4.5 - 5.5	100
		Hold Hold Time			2.7 - 5.5	100		ns
					1.8 - 3.6	400
					4.5 - 5.5	0	200
tV		Output Valid			2.7 - 5.5	0	200	ns
					1.8 - 3.6	0	800
tHO		Output Hold Time			4.5 - 5.5	0		ns
					2.7 - 5.5	0
					1.8 - 3.6	0
tLZ					4.5 - 5.5	0	100	ns
		Hold to Output Low Z			2.7 - 5.5	0	100
					1.8 - 3.6	0	100

(continued)

4 AT25128