Dual-Channel, 3.3V/500mA and 2.5V/300mA Linear Regulator
Copyright ANPEC Electronics Corp.
Rev. A.5 - Oct., 2003
APL5521
www.anpec.com.tw1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Features General Description
The APL5521 is a dual low dropout regulator with
output 1 with 3.3V/0.5A and output2 with 2.5V/0.3A
output capability. In order to obtain lower dropout
voltage and faster transient response, which is critical for low voltage applications, the APL5221 has
been optimized. The dropout voltages are guaranteed at 1.25V at 0.5A for output1 and 1.2V at 0.3A
for output 2. Current limit is trimmed to ensure specified output current and controlled short-circuit current.
On-chip thermal limiting provides protection against
any combination of overload that would create excessive junction temperatures. The APL5521 regu-
lator comes in a SOP-8 package.
Applications
• Desktop Computer
• Networking Systems
• Optical Data Storage Systems
••
••
• Fixed Output Voltage :
VOUT1=3.3V/500mA
VOUT2=2.5V/300mA
••
••
• Low Dropout Voltage (defined as the minimum
input/output voltage difference):
Output 1 Dropout Voltage : 1.25V (at 500mA)
Output 2 Dropout Voltage : 1.2V (at 300mA)
••
••
• Stable with 10uF Output Capacitor(at VOUT1)
Stable with 10uF Output Capacitor(at VOUT2)
••
••
• No Protection Diodes Needed
••
••
• Built in Thermal Protection
••
••
• Built in Current Limit Protection
••
••
• Fast transient Response
••
••
• Short Setting Time
••
••
• SOP-8 Package Available
Pin Configuration
APL5521
1
2
3
45
6
7
8V
OUT1
V
IN
V
IN
V
OUT2
GND
GND
GND
GND
SOP − 8
Ordering and Marking Information
APL5521
Handling Code
Temp. Range
Package Code
Package Code
K : S O-8
Operating Junction Temp. Range
C : 0 to 1 5 0 °C
Handling Code
TU : T u be T R : T ap e & R e e l
Lead Free Code
L : Le a d F re e D e vice B lan k : O rig ina l De v ice
APL5521 K :
APL5521
XXXXX
XXXXX - Date Code
Lead Free Code
Copyright ANPEC Electronics Corp.
Rev. A.5 - Oct., 2003
APL5521
www.anpec.com.tw2
Pin Description
PIN
No. Name
I/O Description
1V
OUT1
OV
OUT1
output Voltage 3.3V. sources up to 500 mA.
2VINI Supply Vol tage. Voltage can range from 4.75V to 8V
3VINI Supply Vol tage. Voltage can range from 4.75V to 8V
4V
OUT2
OV
OUT2
output Voltage 2.5V. sources up to 300 mA.
5GND
6GND
7GND
8GND
Ground also functions as a heatsink. Solder to the ground plane to
maximize thermal dissipation
Symbol Parameter Rating Unit
VIN, V
OUT
Input Voltage or Out Voltage 9 V
RTH,JA
Thermal Resistance – Junction to Ambient 80
°
C/W
PD
Power Dissipation Internally Limited W
TJ
Operating Junction Temperature
°
C
Control Section 0 to 125
Power Transistor 0 to 150
TSTG Storage Temperature Range -65 to +150
°
C
TL Lead Temperature (Soldering, 10 second) 260
°
C
Absolute Maximum Ratings
Electrical Characteristics
Unless otherwise noted these specifications apply over full temperature, TJ=0 to 125°C. Typical values refer to
TJ=25°C.
APL5521
Symbol Parameter Test Conditions
Min. Typ. Max.
Unit
V
IN
Input Voltage 4.75 8 V
I
Q
Quiescent Current I
OUT1
=0mA, I
OUT2
=0mA 10 16 mA
OTS
Over Temperature
Shutdown
150 °C
Over Temperature
Shutdown Hysteresis
Hysteresis 10 °C
TC
Output Voltage
Temperature
Coefficient
50 ppm/°C
Copyright ANPEC Electronics Corp.
Rev. A.5 - Oct., 2003
APL5521
www.anpec.com.tw3
Electrical Characteristics (Cont.)
Unless otherwise noted these specifications apply over full temperature, TJ=0 to 125°C. Typical values refer to
T
J=25°C.
APL5521
Symbol Parameter Test Conditions
Min. Typ. Max.
Unit
Output1 (500mA)
V
OUT1
Output 1 Voltage 4.75< VIN<8.0V, 0mA< I
OUT1
< 500mA 3.234 3.3 3.366 V
I
OUT1
Output 1 Current
Capability
VIN=5V 500 mA
REG
LINE
Line Regulation 4.75< V
IN1
<8.0V, I
OUT1
=0mA 1 10 mV
REG
LOAD
Load Regulation VIN=5V, 0mA< I
OUT1
< 500mA 14 24 mV
Load Transient VIN= 5V, I
OUT1
=1mA~500mA in 30us 70 150 mV
V
DROP
Dropout Voltage
(Note)
I
OUT1
=500mA 1.25 1.4 V
PSRR Ripple Rejection F≤1kHz, 1Vpp at VIN = 5V 55 65 dB
C
OUT
Output Capacitor C
OUT1
10 µF
Output2 (300mA)
V
OUT2
Output 2 Voltage 4.75< VIN<8.0V, 0mA< I
OUT 2
< 300mA 2.450 2.5 2.550 V
I
OUT2
Output 2 Current
Capability
VIN=5 V 300 mA
REG
LINE
Line Regulation 4.75< VIN<8.0V, I
OUT2
=0mA 1 10 mV
REG
LOAD
Load Regulation V
IN
=5V, 0mA< I
OUT2
< 300mA 8 18 mV
Load Transient VIN=5V, I
OUT2
=1mA~300mA in 20us 70 150 mV
V
DROP
Dropout Voltage
(Note)
I
OUT1
=300mA 1.2 1.35 V
PSRR Ripple Rejection F≤1kHz, 1Vpp at VIN = 5V 55 65 dB
C
OUT
Output Capacitor C
OUT2
10 µF
Note: Dropout voltage definition : VIN-VOUT when VOUT is 2% below the value of VOUT for VIN = VOUT + 1.4V
Application Circuit
V
OUT1
5
6
7
8
1
2
3
4
V
OUT2
V
IN
10µF
4.7
µ
F
10
µ
F
APL5521
Copyright ANPEC Electronics Corp.
Rev. A.5 - Oct., 2003
APL5521
www.anpec.com.tw4
0
0.5
1
1.5
2
2.5
3
3.5
0123456789
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3
-50 -25 0 25 50 75 100 125
3
3.1
3.2
3.3
3.4
-50 -25 0 25 50 75 100 125
Output2 Voltage (V)
-50 -25 0 25 50 75 100 125 150
1
1.05
1.1
1.15
1.2
1.25
1.3
1.35
1.4
1.45
1.5
Typical Characteristics
Output Voltage vs. Input V oltage
Input Voltage (V)
Output Voltage (V)
Output 1 Voltage vs. Temperature
T emperature (°C)
Output Voltage (V)
Output2 Voltage vs. Temperature
Temperature (°C)
Dropout Voltage vs. Temperature
T emperature ( °C)
Drpout Voltage (V)
I
OUT
=500mA
Copyright ANPEC Electronics Corp.
Rev. A.5 - Oct., 2003
APL5521
www.anpec.com.tw5
0.6
0.8
1
1.2
1.4
1.6
0 100 200 300 400 500
0
2
4
6
8
10
12
14
0 100 200 300 400 500
-30
-25
-20
-15
-10
-5
0
5
10
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
-0.5
0
0.5
1
1.5
2
2.5
3
3.5
-20
-10
0
10
20
30
40
50
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
0
1
2
3
4
5
6
7
Load Regulation (mV)
Typical Characteristics (Cont.)
Line Transient
Time (ms)
Line Regulation (mV)
Load Transient
Time (ms)
Load Regulation (mV)
Load Regulation vs. Output Current
Output Current (mA)
Dropout Voltage vs. IOUT
IOUT (mA)
Dropout Voltage (V)
Line Current (A)
Load Current (A)
Copyright ANPEC Electronics Corp.
Rev. A.5 - Oct., 2003
APL5521
www.anpec.com.tw6
Packaging Information
Millimeters Inches
Dim
Min. Max. Min. Max.
A 1.35 1.75 0.053 0.069
A1 0.10 0.25 0.004 0.010
D 4.80 5.00 0.189 0.197
E 3.80 4.00 0.150 0.157
H 5.80 6.20 0.228 0.244
L 0.40 1.27 0.016 0.050
e1 0.33 0.51 0.013 0. 020
e2 1.27BSC 0.50BSC
φ
18
°
8
°
HE
e1 e2
0.015X45
D
A
A1
0.004max.
1
L
SOP-8 pin ( Reference JEDEC Registration MS-012)
Copyright ANPEC Electronics Corp.
Rev. A.5 - Oct., 2003
APL5521
www.anpec.com.tw7
Physical Specifications
Reference JEDEC Standard J-STD-020A APRIL 1999
Reflow Condition (IR/Convection or VPR Reflow)
Pre-heat temperature
183 C
Peak temperature
Time
°
temperature
Classification Reflow Profiles
Convection or IR/
Convection
VPR
Average ramp-up rate(183°C to Peak) 3°C/second max. 10 °C /second max .
Preheat temperature 125 ± 25°C)
120 seconds max
Temperature maintained above 183°C
60 – 150 seconds
Time within 5°C of actual peak temperature
10 –20 seconds 60 seconds
Peak temperature range
220 +5/-0°C or 235 +5/-0°C 215-219°C or 235 +5/-0°C
Ramp-down rate
6 °C /second max. 10 °C /second max .
Time 25°C to peak temperature
6 minutes max.
Package Reflow Conditions
pkg. thickness
≥≥≥≥
2.5mm
and all bgas
pkg. thickness < 2.5mm and
pkg. volume
≥≥≥≥
350 mm³
pkg. thickness < 2.5mm and pkg.
volume < 350mm³
Convection 220 +5/-0 °C Convection 235 +5/-0 °C
VPR 215-219 °C VPR 235 +5/-0 °C
IR/Convection 220 +5/-0 °C IR/Convection 235 +5/-0 °C
Terminal Material Solder-Plated Copp er (So lder Material : 90/10 or 63/37 SnPb)
Lead Solderab ility Meets EIA Specification RSI86-91, A NSI/J-STD-002 Category 3.
Copyright ANPEC Electronics Corp.
Rev. A.5 - Oct., 2003
APL5521
www.anpec.com.tw8
R e lia bilit y te s t p r o g r a m
Test item Method Description
SOLDERABILITY M IL-STD-883D-2003
245°C , 5 SEC
HO LT MIL-STD-883D-1005.7
1000 Hrs Bias @ 125 °C
PCT JESD-22-B, A102
168 Hrs, 100 % RH , 121°C
TST MIL-STD-883D-1011.9
-65°C ~ 150°C, 200 Cycles
ESD MIL-STD-883D-3015.7 VHBM > 2KV, VMM > 200V
La tc h -Up JES D 7 8 10 ms , Itr > 100mA
Carrier Tape
A
J
B
T2
T1
C
t
Ao
E
W
Po
P
Ko
Bo
D1
D
F
P1
Application
A B C J T1 T2 W P E
SOP-8
330±1 62 ± 1.5
12.75 +
0.1 5
2 + 0.5 12.4 +0.2
2± 0.2
12 + 0.3
- 0.1
8± 0.1 1.75± 0.1
Application
F D D1 Po P1 Ao Bo Ko t
SOP-8
5.5 ± 0.1 1.55±0.1
1.55+ 0.25
4.0 ± 0.1 2.0 ± 0.1 6.4 ± 0.1 5.2± 0.1 2.1± 0.1 0.3±0.013
(mm)
Copyright ANPEC Electronics Corp.
Rev. A.5 - Oct., 2003
APL5521
www.anpec.com.tw9
Cover Tape Dimensions
Anpec Electronics Corp.
Head Office :
5F, No. 2 Li-Hsin Road, SBIP,
Hsin-Chu, T aiwan, R.O.C.
T el : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, T aipei Hsien, Taiwan, R. O. C.
T el : 886-2-89191368
Fax : 886-2-89191369
Customer Service
Application Carrier Width Cover Tape Width Devices Per Reel
SOP- 8
12 9.3 2500
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