ANPEC APA2120, APA2121 handbook

Loading...

APA2069

APA2120/2121

Stereo 2-W Audio Power Amplifier (with DC_Volume Control)

Features

General Description

Low operating current with 14mA

Improved depop circuitry to eliminate turn-on and turn off transients in outputs

High PSRR

32 steps volume adjustable by DC voltage with hysteresis

2W per channel output power into 4Ω load at 5V, BTL mode

Two output modes allowable with BTL and SE modes selected by SE/BTL pin

Low current consumption in shutdown mode (50μA)

Short Circuit Protection

Power off depop circuit integration

TSSOP-24 with or without thermal pad package

Applications

NoteBook PC

LCD Monitor or TV

APA2120/1 is a monolithic integrated circuit, which provides precise DC volume control, and a stereo bridged audio power amplifiers capable of producing 2.7W(2.0W) into 3Ω with less than 10% (1.0%) THD+N. The attenuator range of the volume control in APA2120/1 is from 20dB (DC_Vol=0V) to -80dB (DC_Vol=3.54V) with 32 steps. The advantage of internal gain setting can be less components and PCB area. Both of the depop circuitry and the thermal shutdown protection circuitry are integrated in APA2120/1, that reduce pops and clicks noise during power up or shutdown mode operation. It also improves the power off pop noise and protects the chip from being destroyed by over temperature and short current failure. To simplify the audio system design, APA2120/1 combines a stereo bridge-tied loads (BTL) mode for speaker drive and a stereo single-end (SE) mode for headphone drive into a single chip, where both modes are easily switched by the SE/BTL input control pin signal. Besides, the multiple input selection is used for portable audio system.

Ordering and Marking Information

APA2120/1

 

 

 

 

 

 

 

 

 

 

 

Package Code

 

 

 

 

 

 

 

 

 

 

 

 

R : TSSOP-P *

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Lead Free Code

Temp. Range

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I : - 40 to 85 °C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Handling Code

Handling Code

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Temp. Range

TU : Tube

TR : Tape & Reel

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TY : Tray

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Package Code

Lead Free Code

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L : Lead Free Device

Blank : Original Device

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

APA2120/1 R :

 

 

 

 

APA2120/1

 

XXXXX - Date Code

 

 

 

 

 

XXXXX

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

* TSSOP-P is a standard TSSOP package with a thermal pad exposure on the bottom of the package.

ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders.

Copyright ã ANPEC Electronics Corp.

1

www.anpec.com.tw

Rev. A.1 - Mar., 2003

 

 

APA2120/2121

Block Diagram

LLINEIN

 

LOUT+

 

 

LHPIN

MUX

 

 

Volume

LOUT-

RLINEIN

Control

 

RHPIN

MUX

LBYPASS

VOLUME

 

BYPASS

 

BYPASS

 

 

ROUT+

HP/LINE

HP/LINE

 

 

 

SE/BTL

SE/BTL

ROUT-

 

 

 

 

RBYPASS

SHUTDOWN

Shutdown

 

 

ckt

 

PCBEEP

PC-BEEP

CLK

 

Clock Gen

 

ckt

 

 

For APA2121

Absolute Maximum Ratings

(Over operating free-air temperature range unless otherwise noted.)

Symbol

Parameter

Rating

Unit

 

 

 

 

 

 

 

 

VDD

Supply Voltage Range

-0.3 to 6

V

VIN

 

 

 

 

 

 

 

Input Voltage Range, SE/BTL,

HP/LINE,

 

-0.3 to VDD+0.3

V

 

SHUTDOWN, PCBEN

 

 

 

TA

Operating Ambient Temperature Range

-40 to 85

°C

TJ

Maximum Junction Temperature

Intermal Limited*1

°C

TSTG

Storage Temperature Range

-65 to +150

°C

TS

Soldering Temperature,10 seconds

260

°C

VESD

Electrostatic Discharge

-3000 to 3000*2

V

-200 to 200*3

PD

Power Dissipation

Intermal Limited

 

Note:

1.APA2120/1 integrated internal thermal shutdown protection when junction temperature ramp up to 150°C 2.Human body model: C=100pF, R=1500W, 3 positives pulse plus 3 negative pulses

3.Machine model: C=200pF, L=0.5mF, 3 positive pulses plus 3 negative pulses

Copyright ã ANPEC Electronics Corp.

2

www.anpec.com.tw

Rev. A.1 - Mar., 2003

 

 

APA2120/2121

Recommended Operating Conditions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Min.

Max.

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Supply Voltage, VDD

 

 

 

 

 

 

 

 

 

 

 

4.5

 

5.5

 

V

 

High level threshold voltage, VIH

 

 

SHUTDOWN,

 

 

PCBEN

 

2

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SE/BTL , HP/LINE

 

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCBEN

 

 

 

1.0

 

 

 

Low level threshold voltage, VIL

 

SHUTDOWN,

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SE/BTL , HP/LINE

 

 

 

3

 

 

 

 

 

 

 

 

 

 

Common mode input voltage, VICM

 

 

 

 

 

 

 

 

 

 

 

VDD-1.0

 

 

V

Thermal Characteristics

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

 

Parameter

Value

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

RTHJA

Thermal Resistance from Junction to Ambient in Free Air

 

 

 

 

 

 

 

 

 

TSSOP-P*

45

 

°C/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

* 5 in2 printed circuit board with 2oz trace and copper pad through 9 25mil diameter vias. The thermal pad on the TSSOP_P package with solder on the printed circuit board.

Electrical Characteristics

VDD=5V, -20°C<TA<85°C (unless otherwise noted)

Symbol

Parameter

 

 

 

 

Test Condition

APA2120/1

Unit

 

 

 

 

 

 

 

Min.

Typ.

Max.

 

 

 

 

 

 

 

 

 

 

 

 

VDD

Supply Voltage

 

 

 

 

 

 

4.5

 

5.5

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

14

25

 

IDD

Supply Current

SE/BTL=0V

 

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SE/BTL=5V

 

8.0

15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ISD

Supply Current in Shutdown

SE/BTL=5V

 

50

 

μA

Mode

 

 

 

 

 

 

 

 

SHUTDOWN=0V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IIH

High input Current

 

 

 

 

 

 

 

900

 

nA

 

 

 

 

 

 

 

 

 

 

 

 

IIL

Low Input Current

 

 

 

 

 

 

 

900

 

nA

 

 

 

 

 

 

 

 

 

 

 

 

VOS

Output Differential Voltage

 

 

 

 

 

 

 

5

 

mV

 

 

 

 

 

 

 

 

 

 

 

 

Copyright ã ANPEC Electronics Corp.

3

www.anpec.com.tw

Rev. A.1 - Mar., 2003

 

 

APA2120/2121

Electrical Characteristics (Cont.)

Operating Characteristics, BTL mode

VDD=5V,TA=25°C,RL=4Ω, Gain=2V/V (unless otherwise noted)

Symbol

Parameter

Test Condition

APA2120/1

Unit

Min.

Typ.

Max.

 

 

 

 

 

 

 

 

 

 

 

 

 

THD=10%, RL=3Ω, Fin=1kHz

 

2.7

 

 

 

 

 

 

 

 

 

 

 

THD=10%, RL=4Ω, Fin=1kHz

 

2.3

 

 

 

 

 

 

 

 

 

PO

Maximum Output Power

THD=10%, RL=8Ω, Fin=1kHz

 

1.5

 

W

 

 

 

 

THD=1%, RL=3Ω, Fin=1kHz

 

2.0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

THD=1%, RL=4Ω, Fin=1kHz

 

1.9

 

 

 

 

 

 

 

 

 

 

 

THD=0.5%, RL=8Ω, Fin=1kHz

1

1.1

 

 

 

 

 

 

 

 

 

THD+N

Total Harmonic Distortion Plus

PO=1.5W, RL=4Ω, Fin=1kHz

 

0.05

 

%

 

 

 

 

Noise

PO=1W, RL=8Ω, Fin=1kHz

 

0.07

 

 

 

 

 

 

 

 

 

 

 

 

PSRR

Power Ripple Rejection Ratio

VIN=0.1Vrms, RL=8Ω, CB=1μF,

 

60

 

dB

Fin=120Hz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Xtalk

Channel Separation

CB=1μF, RL=8Ω, Fin=1kHz

 

90

 

dB

 

 

 

 

 

 

 

S/N

Signal to Noise Ratio

PO=1.1W, RL=8Ω, A_wieght

 

95

 

dB

 

 

 

 

 

 

 

Operating Characteristics, SE mode

VDD=5V,TA=25°C,RL=4Ω, Gain=1V/V (unless otherwise noted)

Symbol

Parameter

Test Condition

APA2120/1

Unit

 

 

 

Min.

Typ.

Max.

 

 

 

 

 

 

 

 

 

 

 

 

 

THD=10%, RL=8Ω, Fin=1kHz

 

400

 

 

 

 

 

 

 

 

 

PO

Maximum Output Power

THD=10%, RL=32Ω, Fin=1kHz

 

110

 

mW

 

 

 

 

THD=1%, RL=8Ω, Fin=1kHz

 

320

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

THD=1%, RL=32Ω, Fin=1kHz

 

90

 

 

 

 

 

 

 

 

 

THD+N

Total Harmonic Distortion Plus

PO=250mW, RL=8Ω, Fin=1kHz

 

0.08

 

%

Noise

Ω

 

0.08

 

 

 

PO=75mW, RL=32 , Fin=1kHz

 

 

 

PSRR

Power Ripple Rejection Ratio

VIN=0.1Vrms, RL=8Ω, CB=1μF,

 

48

 

dB

Fin=120Hz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Xtalk

Channel Separation

CB=1μF, RL=32Ω, Fin=1kHz

 

100

 

dB

 

 

 

 

 

 

 

S/N

Signal to Noise Ratio

PO=75mW, SE, RL=32Ω, A_wieght

 

100

 

dB

 

 

 

 

 

 

 

Copyright ã ANPEC Electronics Corp.

4

www.anpec.com.tw

Rev. A.1 - Mar., 2003

 

 

APA2120/2121

Pin Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

24

 

 

 

GND

GND

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

PCBEN

 

 

 

 

 

23

 

 

 

RLINEIN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOLUME

 

 

 

 

3

 

22

 

 

 

 

SHUTDOWN

 

LOUT+

 

 

 

 

4

 

21

 

 

 

ROUT+

 

 

 

 

 

 

 

 

LLINEIN

 

 

5

 

20

 

 

 

RHPIN

 

 

 

 

 

 

 

LHPIN

 

 

 

6

APA2120

19

 

 

 

VDD

 

 

 

 

 

 

PVDD

 

 

 

7

TOP View

18

 

 

 

PVDD

 

 

 

 

 

 

RBYPASS

 

 

 

8

 

17

 

 

 

CLK

 

 

 

 

 

 

 

LOUT-

 

 

 

9

 

16

 

 

 

ROUT-

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LBYPASS

 

 

 

10

 

15

 

 

 

SE/BTL

 

 

BYPASS

 

 

 

 

 

 

 

PC-BEEP

 

 

 

11

 

14

 

 

 

GND

 

 

 

12

 

13

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Thermal

Pad

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

24

 

 

 

GND

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

23

 

 

 

RLINEIN

HP/LINE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VOLUME

 

 

 

 

3

 

22

 

 

 

 

SHUTDOWN

 

LOUT+

 

 

 

 

4

 

21

 

 

 

ROUT+

 

 

 

 

 

 

 

 

LLINEIN

 

 

5

 

20

 

 

 

RHPIN

 

 

 

 

 

 

 

LHPIN

 

 

 

6

APA2121

19

 

 

 

VDD

 

 

 

 

 

 

PVDD

 

 

 

7

TOP View

18

 

 

 

PVDD

 

 

 

 

 

 

RBYPASS

 

 

 

8

 

17

 

 

 

CLK

 

 

 

 

 

 

 

LOUT-

 

 

 

9

 

16

 

 

 

ROUT-

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LBYPASS

 

 

 

10

 

15

 

 

 

SE/BTL

 

 

BYPASS

 

 

 

 

 

 

 

PC-BEEP

 

 

 

11

 

14

 

 

 

 

GND

 

 

 

12

 

13

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

APA2120/1

Bottom View

 

Multiple Input Selection

PCBEEP Control Input

APA2120

SE/BTL

PCBEN

APA2121

HP/LINE

-

Copyright ã ANPEC Electronics Corp.

5

www.anpec.com.tw

Rev. A.1 - Mar., 2003

 

 

APA2120/2121

Pin Function Description

 

 

 

Pin

 

Config.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Description

 

Name

No

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

1,12,

 

Ground connection, Connected to thermal pad.

 

13,24

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCBEN

2

I/P

BEEP mode control input, active H, for APA2120 only

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Multi-input selection input, headphone mode when held high, line-in

 

HP/LINE

2

I/P

 

mode when held low for APA2121 only.

 

 

 

 

 

 

 

 

 

 

VOLUME

3

 

Input signal for internal volume gain setting.

 

LOUT+

4

O/P

Left channel positive output in BTL mode and SE mode.

 

LLINEIN

5

I/P

 

 

 

is held low.

Left channel line input terminal, selected when HP/LINE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

is

 

LHPIN

6

O/P

Left channel headphone input terminal, selected when HP/LINE

 

held high.

 

 

 

 

 

 

 

 

 

 

PVDD

7,18

 

Supply voltage only for power amplifier.

 

RBYPASS

8

I/P

Right channel bypass voltage.

 

LOUT-

9

O/P

Left channel negative output in BTL mode and high impedance in

 

SE mode.

 

 

 

 

 

 

 

 

 

 

LBYPASS

10

I/P

Left channel bias voltage generator.

 

BYPASS

11

 

Bias voltage generator

 

PC_BEEP

14

I/P

PCBEP signal input

 

 

 

 

 

 

 

 

 

Output mode control input, high for SE output mode and low for

 

SE/BTL

15

I/P

 

BTL mode.

 

 

 

 

 

 

 

 

 

 

ROUT-

16

O/P

Right channel negative output in BTL mode and high impedance in

 

SE mode.

 

 

 

 

 

 

 

 

 

 

CLK

17

 

Clock signal generator

 

VDD

19

 

Supply voltage for internal circuit excepting power amplifier.

 

 

 

 

 

 

 

 

 

 

 

 

 

is

 

RHPIN

20

I/P

Right channel headphone input terminal, selected when HP/LINE

 

held high.

 

 

 

 

 

 

 

 

 

 

ROUT+

21

O/P

Right channel positive output in BTL mode and SE mode.

 

SHUTDOWN

 

22

I/P

It will be into shutdown mode when pull low.

 

 

 

 

 

 

 

 

 

 

 

is held

 

RLINEIN

23

I/P

Right channel line input terminal, selected when HP/LINE

 

low.

 

 

 

 

 

 

 

 

 

Copyright ã ANPEC Electronics Corp.

6

www.anpec.com.tw

Rev. A.1 - Mar., 2003

 

 

APA2120/2121

Control Input Table

For APA2120

 

SE/BTL

 

 

SHUTDOWN

 

PC-BEEP

Operating mode

 

 

X

 

 

 

L

 

Disable

Shutdown mode

 

 

L

 

 

 

H

 

Disable

Line input, BTL out

 

 

H

 

 

 

H

 

Disable

HP input, SE out

 

 

X

 

 

 

X

 

Enable

PCBEEP input, BTL out

For APA2121

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SE/BTL

 

HP/LINE

 

 

SHUTDOWN

 

PC-BEEP

Operating mode

 

X

 

 

X

 

 

L

 

Disable

Shutdown mode

 

L

 

 

L

 

 

H

 

Disable

Line input, BTL out

 

L

 

H

 

 

H

 

Disable

HP input, BTL out

 

H

 

 

L

 

 

H

 

Disable

Line input, SE out

 

H

 

H

 

 

H

 

Disable

HP input, BTL out

 

X

 

 

X

 

 

X

 

Enable

PCBEEP input, BTL out

Copyright ã ANPEC Electronics Corp.

7

www.anpec.com.tw

Rev. A.1 - Mar., 2003

 

 

ANPEC APA2120, APA2121 handbook

APA2120/2121

 

 

 

 

 

Typical Application Circuit

 

 

 

 

APA2120

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

0Ω

 

 

 

 

 

 

 

0.1μF

100μF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD

GND

PVDD

 

 

 

 

1μF

LLINEIN

 

 

LOUT+

 

 

L-LINE

 

 

 

 

 

 

 

 

 

LHPIN

MUX

 

 

220μF

 

 

 

 

 

 

 

 

1μF

 

 

 

 

 

1kΩ

 

L-HP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4Ω

Control

 

 

 

 

 

Volume

 

LOUT-

 

 

 

1μF

 

 

Pin

Ring

 

 

RLINEIN

Control

 

 

R-LINE

 

 

 

 

 

 

 

 

RHPIN

MUX

 

LBYPASS

SE/BTL

 

 

 

 

 

 

 

1μF

VDD

 

 

2.2μF

 

R-HP

 

 

BYPASS

 

Sleeve

 

 

 

 

 

 

 

 

 

 

Tip

 

 

 

 

 

 

BYPASS

 

 

 

 

 

 

 

 

 

Headphone Jack

 

50kΩ

 

VOLUME

 

 

ROUT+

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

220μF

 

 

 

 

 

 

 

 

1kΩ

 

 

 

VDD

 

 

 

 

 

 

100kΩ

100kΩ SE/BTL

 

 

4Ω

 

 

 

 

SE/BTL

 

ROUT-

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RBYPASS

 

 

 

Shutdown

 

SHUTDOWN

Shutdown

 

 

 

 

 

Signal

 

 

ckt

 

 

 

 

 

 

0.47μF

 

 

 

 

 

 

BEEP

 

PCBEEP

 

 

CLK

 

 

 

Signal

 

 

PC-BEEP

 

Clock Gen

 

 

 

 

 

 

 

 

 

 

PCBEN

PCBEN

ckt

 

47nF

 

 

 

 

Signal

 

 

 

 

 

 

Copyright ã ANPEC Electronics Corp.

8

www.anpec.com.tw

Rev. A.1 - Mar., 2003

APA2120/2121

 

 

 

 

 

Typical Application Circuit

 

 

 

 

APA2121

 

 

 

 

 

 

 

 

 

VDD

0Ω

 

 

 

 

 

0.1μF

100μF

 

 

 

 

VDD

GND

PVDD

 

 

 

1μF

 

 

LOUT+

 

 

L-LINE

LLINEIN

 

 

 

 

 

LHPIN

MUX

 

 

220μF

 

 

 

 

 

1μF

 

 

 

 

1kΩ

 

 

 

 

 

 

 

L-HP

 

 

 

 

 

 

 

 

 

 

4Ω

Control

 

 

 

Volume

 

LOUT-

 

 

1μF

 

Pin

Ring

 

Control

 

 

R-LINE

RLINEIN

 

 

 

 

RHPIN

MUX

 

LBYPASS

SE/BTL

 

 

 

 

1μF

VDD

 

 

2.2μF

 

 

 

 

 

Sleeve

R-HP

 

 

 

BYPASS

 

 

 

 

 

Tip

 

 

 

 

BYPASS

 

 

 

VOLUME

 

 

 

Headphone Jack

 

 

 

ROUT+

 

 

 

50kΩ

 

 

 

 

 

 

 

 

 

220μF

 

HP/LINE

HP/LINE

 

 

 

1kΩ

 

HP/LINE

 

 

 

 

 

 

 

 

 

Signal

VDD

 

 

 

 

 

 

 

 

 

100kΩ

 

 

4Ω

 

 

 

 

 

 

 

 

100kΩ SE/BTL

SE/BTL

 

ROUT-

 

 

 

 

 

 

RBYPASS

 

 

Shutdown

SHUTDOWN

Shutdown

 

 

 

 

Signal

 

ckt

 

 

 

 

BEEP

PCBEEP

PC-BEEP

 

CLK

 

 

Signal

 

ckt

 

Clock Gen

 

 

0.47μF

 

47nF

 

 

 

 

 

 

 

Copyright ã ANPEC Electronics Corp.

9

www.anpec.com.tw

Rev. A.1 - Mar., 2003

APA2120/2121

Volume Control Table_BTL Mode

Supply Voltage Vdd=5V

Gain(dB)

High(V)

Low(V)

Hysteresis(mV)

Recommended Voltage(V)

20

0.12

0.00

 

0

 

 

 

 

 

18

0.23

0.17

52

0.20

16

0.34

0.28

51

0.31

14

0.46

0.39

50

0.43

 

 

 

 

 

12

0.57

0.51

49

0.54

10

0.69

0.62

47

0.65

8

0.80

0.73

46

0.77

6

0.91

0.84

45

0.88

4

1.03

0.96

44

0.99

 

 

 

 

 

2

1.14

1.07

43

1.10

0

1.25

1.18

41

1.22

-2

1.37

1.29

40

1.33

 

 

 

 

 

-4

1.48

1.41

39

1.44

-6

1.59

1.52

38

1.56

-8

1.71

1.63

37

1.67

-10

1.82

1.74

35

1.78

-12

1.93

1.85

34

1.89

 

 

 

 

 

-14

2.05

1.97

33

2.01

-16

2.16

2.08

32

2.12

-18

2.28

2.19

30

2.23

 

 

 

 

 

-20

2.39

2.30

29

2.35

-22

2.50

2.42

28

2.46

-24

2.62

2.53

27

2.57

-26

2.73

2.64

26

2.69

-28

2.84

2.75

24

2.80

 

 

 

 

 

-30

2.96

2.87

23

2.91

-32

3.07

2.98

22

3.02

-34

3.18

3.09

21

3.14

 

 

 

 

 

-36

3.30

3.20

20

3.25

-38

3.41

3.32

18

3.36

-40

3.52

3.43

17

3.48

-80

5.00

3.54

16

5

 

 

 

 

 

Copyright ã ANPEC Electronics Corp.

10

www.anpec.com.tw

Rev. A.1 - Mar., 2003

 

 

+ 21 hidden pages