a |
Matched Monolithic |
|
Quad Transistor |
||
|
|
MAT04 |
|
|
|
Low Offset Voltage: 200 V max
High Current Gain: 400 min
Excellent Current Gain Match: 2% max
Low Noise Voltage at 100 Hz, 1 mA: 2.5 nV/√Hz max Excellent Log Conformance: rBE = 0.6 max
Matching Guaranteed for All Transistors Available in Die Form
The MAT04 is a quad monolithic NPN transistor that offers excellent parametric matching for precision amplifier and nonlinear circuit applications. Performance characteristics of the MAT04 include high gain (400 minimum) over a wide range of collector current, low noise (2.5 nV/√Hz maximum at 100 Hz, IC = 1 mA) and excellent logarithmic conformance. The MAT04 also features a low offset voltage of 200 V and tight current gain matching, to within 2%. Each transistor of the MAT04 is individually tested to data sheet specifications. For matching parameters (offset voltage, input offset current, and gain match), each of the dual transistor combinations are
PIN CONNECTIONS
14-Lead Cerdip (Y Suffix)
14-Lead Plastic DIP (P Suffix)
14-Lead SO (S Suffix)
verified to meet stated limits. Device performance is guaranteed at 25°C and over the industrial and military temperature ranges.
The long-term stability of matching parameters is guaranteed by the protection diodes across the base-emitter junction of each transistor. These diodes prevent degradation of beta and matching characteristics due to reverse bias base-emitter current.
The superior logarithmic conformance and accurate matching characteristics of the MAT04 makes it an excellent choice for use in log and antilog circuits. The MAT04 is an ideal choice in applications where low noise and high gain are required.
REV. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 |
www.analog.com |
Fax: 781/326-8703 |
© Analog Devices, Inc., 2002 |
MAT04–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ TA = 25 C unless otherwise noted. Each transistor is individually tested. For matching parameters (VOS, IOS, ∆hFE) each dual transistor combination is verified to meet stated limits. All tests made at endpoints unless otherwise noted.)
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
MAT04E |
|
|
MAT04F |
|
|
|
Parameter |
|
Symbol |
Conditions |
Min |
Typ |
Max |
Min |
Typ |
Max |
Unit |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
Current Gain |
|
hFE |
10 µA ≤ IC ≤ 1 mA |
|
|
|
|
|
|
|
||
|
|
∆hFE |
0 V ≤ VCB ≤ 30 V1 |
400 |
800 |
|
300 |
600 |
|
|
||
Current Gain Match |
|
IC = 100 µA |
|
|
|
|
|
|
|
|||
|
|
|
|
0 V ≤ VCB ≤ 30 V2 |
|
0.5 |
2 |
|
1 |
4 |
% |
|
Offset Voltage |
|
VOS |
10 µA ≤ IC ≤ 1 mA |
|
|
|
|
|
|
|
||
|
|
∆VOS/∆IC |
0 V ≤ VCB ≤ 30 V3 |
|
50 |
200 |
|
100 |
400 |
µV |
||
Offset Voltage Change vs. |
|
10 µA ≤ IC ≤ 1 mA |
|
|
|
|
|
|
µV |
|||
Collector Current |
|
|
|
VCB = 0 V3 |
|
5 |
25 |
|
10 |
50 |
||
Offset Voltage Change vs. VCB |
|
∆VOS/∆VCB |
10 µA ≤ IC ≤ 1 mA |
|
|
|
|
|
|
|
||
|
|
|
|
0 V ≤ VCB ≤ 30 V3 |
|
50 |
100 |
|
100 |
200 |
µV |
|
Bulk Emitter Resistance |
|
rBE |
10 µA ≤ IC ≤ 1 mA |
|
|
|
|
|
|
Ω |
||
|
|
|
|
VCB = 0 V4 |
|
0.4 |
0.6 |
|
0.4 |
0.6 |
||
Input Bias Current |
|
IB |
IC = 100 µA |
|
|
|
|
|
|
|
||
|
|
|
|
0 V ≤ VCB ≤ 30 V |
|
125 |
250 |
|
165 |
330 |
nA |
|
Input Offset Current |
|
IOS |
IC = 100 µA; VCB = 0 V |
|
0.6 |
5 |
|
2 |
13 |
nA |
||
Breakdown Voltage |
|
BVCEO |
IC = 10 µA |
40 |
|
|
40 |
|
|
V |
||
Collector Saturation Voltage |
|
VCE(SAT) |
IB = 100 µA; IC = 1 mA |
|
0.03 |
0.06 |
|
0.03 |
0.06 |
V |
||
Collector-Base Leakage Current |
|
ICBO |
VCB = 40 V |
|
5 |
|
|
5 |
|
pA |
||
Noise Voltage Density |
|
en |
VCB = 0 V; fO = 10 Hz |
|
2 |
3 |
|
2 |
4 |
nV/√Hz |
||
|
|
|
|
IC = 1 mA; fO = 100 Hz |
|
1.8 |
2.5 |
|
1.8 |
3 |
nV/√Hz |
|
Gain Bandwidth Product |
|
fT |
fO = 1 kHz5 |
|
1.8 |
2.5 |
|
1.8 |
3 |
nV/√Hz |
||
|
IC = 1 mA; VCE = 10 V |
|
300 |
|
|
300 |
|
MHz |
||||
Output Capacitance |
|
COBO |
VCB = 15 V; IE = 0 |
|
|
|
|
|
|
|
||
|
|
|
|
f = 1 MHz |
|
10 |
|
|
10 |
|
pF |
|
Input Capacitance |
|
CEBO |
VBE = 0 V; IC = 0 |
|
|
|
|
|
|
|
||
|
|
|
|
f = 1 MHz |
|
40 |
|
|
40 |
|
pF |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
NOTES |
|
|
|
|
|
|
|
|
|
|
|
|
1Current gain measured at IC = 10 A, 100 A and 1 mA. |
|
|
|
|
|
|
|
|
|
|||
2 |
|
100(∆IB )(hFE MIN ) |
|
|
|
|
|
|
|
|||
Current gain match is defined as: ∆hFE |
= |
|
|
|
|
|
|
|
|
|
|
|
|
IC |
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
3Measured at IC = 10 A and guaranteed by design over the specified range of IC. 4Guaranteed by design.
5Sample tested.
Specifications subject to change without notice.
–2– |
REV. D |
MAT04
ELECTRICAL CHARACTERISTICS (at –25 C ≤ TA 85 C for MAT04E, –40 C ≤ TA 85 C for MAT04F, unless otherwise noted. Each transistor is individually tested. For matching parameters (VOS, IOS) each dual transistor combination is verified to meet stated limits. All tests made at endpoints unless otherwise noted.)
|
|
|
|
MAT04E |
|
MAT04F |
|
||
Parameter |
Symbol |
Conditions |
Min |
Typ |
Max |
Min |
Typ |
Max |
Unit |
|
|
|
|
|
|
|
|
|
|
Current Gain |
hFE |
10 A ≤ IC ≤ 1 mA |
|
|
|
|
|
|
|
|
|
0 V ≤ VCB ≤ 30 V1 |
225 |
625 |
|
200 |
500 |
|
|
Offset Voltage |
VOS |
10 A ≤ IC ≤ 1 mA |
|
|
|
|
|
|
V |
|
|
0 V ≤ VCB ≤ 30 V2 |
|
60 |
260 |
|
120 |
520 |
|
Average Offset |
TCVOS |
IC = 100 A |
|
|
|
|
|
|
V/°C |
Voltage Drift |
|
VCB = 0 V3 |
|
0.2 |
1 |
|
0.4 |
2 |
|
Input Bias Current |
IB |
IC = 100 A |
|
|
|
|
|
|
|
|
|
0 V ≤ VCB ≤ 30 V |
|
160 |
445 |
|
200 |
500 |
nA |
Input Offset Current |
IOS |
IC = 100 A |
|
|
|
|
|
|
|
|
|
VCB = 0 V |
|
4 |
20 |
|
8 |
40 |
nA |
Average Offset |
TCIOS |
IC = 100 A |
|
|
|
|
|
|
pA/°C |
Current Drift |
|
VCB = 0 V |
|
50 |
|
|
100 |
|
|
Breakdown Voltage |
BVCEO |
IC = 10 A |
40 |
|
|
40 |
|
|
V |
Collector-Base |
ICBO |
VCB = 40 V |
|
|
|
|
|
|
|
Leakage Current |
|
|
|
0.5 |
|
|
0.5 |
|
nA |
Collector-Emitter |
ICES |
VCE = 40 V |
|
|
|
|
|
|
|
Leakage Current |
|
|
|
5 |
|
|
5 |
|
nA |
Collector-Substrate |
ICS |
VCS = 40 V |
|
|
|
|
|
|
|
Leakage Current |
|
|
|
0.7 |
|
|
0.7 |
|
nA |
|
|
|
|
|
|
|
|
|
|
REV. D |
–3– |
MAT04
ABSOLUTE MAXIMUM RATINGS1 |
|
|
||
Collector-Base Voltage (BVCBO) |
. . . . . . . |
. . . . . . . . . |
. . . 40 V |
|
Collector-Emitter Voltage (BVCEO) . . . . . |
. . . . . . . . . |
. . . 40 V |
||
Collector-Collector Voltage (BVCC) . . . . . |
. . . . . . . . . |
. . . 40 V |
||
Emitter-Emitter Voltage (BVEE) |
. . . . . . . |
. . . . . . . . . |
. . . 40 V |
|
Collector Current . . . . . . . . . . |
. . . . . . . . |
. . . . . . . . . |
. . 30 mA |
|
Emitter Current . . . . . . . . . . . . |
. . . . . . . . |
. . . . . . . . . |
. . 30 mA |
|
Substrate (Pin-4 to Pin-11) Current . . . . |
. . . . . . . . . |
. . 30 mA |
||
Operating Temperature Range |
|
–25°C to +85°C |
||
MAT04EY . . . . . . . . . . . . . . |
. . . . . . . . |
|||
MAT04FY, FP, FS . . . . . . . . |
. . . . . . . . |
. . . –40°C to +85°C |
||
Storage Temperature |
|
–65°C to +150°C |
||
Y Package . . . . . . . . . . . . . . . |
. . . . . . . . |
|||
P Package . . . . . . . . . . . . . . . |
. . . . . . . . |
. . –65°C to +125°C |
||
Lead Temperature (Soldering, 60 sec) . . |
. . . . . . . . . |
. +300°C |
||
|
|
|
|
|
Package Type |
|
JA2 |
JC |
Units |
14-Lead Cerdip |
|
108 |
16 |
°C/W |
14-Lead Plastic DIP |
|
83 |
39 |
°C/W |
14-Lead SO |
|
120 |
36 |
°C/W |
NOTES
1Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted.
2 JA is specified for worst case mounting conditions, i.e., JA is specified for device in socket for cerdip and P-DIP packages; JA is specified for device soldered to printed circuit board for SO package.
1. |
Q1 COLLECTOR |
2. |
Q1 BASE |
3. |
Q1 EMITTER |
4. |
SUBSTRATE |
5. |
Q2 EMITTER |
6. |
Q2 BASE |
7. |
Q2 COLLECTOR |
8. |
Q3 COLLECTOR |
9. |
Q3 BASE |
10. |
Q3 EMITTER |
11. |
SUBSTRATE |
12. |
Q4 EMITTER |
13. |
Q4 BASE |
14. |
Q4 COLLECTOR |
Die Size 0.060 × 0.060 Inch, 3600 Sq. mm (1.52 × 1.52 mm, 2.31 sq. mm)
|
TA = 25 C |
Temperature |
Package |
Package |
Model |
VOS max |
Range |
Description |
Option |
MAT04EY* |
200 V |
–25°C to +85°C |
Cerdip |
Q-14 |
MAT04FY* |
400 V |
–40°C to +85°C |
Cerdip |
Q-14 |
MAT04FP |
400 V |
–40°C to +85°C |
P-DIP-14 |
N-14 |
MAT04FS |
400 V |
–40°C to +85°C |
14-Lead SO |
SO-14 |
NOTES
*Not for new designs; obsolete April 2002.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the MAT04 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4– |
REV. D |