Analog Devices AD13465AZ, AD13465AF, AD13465-PCB, 5962-0150601HXA Datasheet

0 (0)

aDual Channel, 14-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning

AD13465

FEATURES

Dual, 65 MSPS Minimum Sample Rate Channel-to-Channel Matching, 1% Gain Error

90 dB Channel-to-Channel Isolation DC-Coupled Signal Conditioning

85 dB Spurious-Free Dynamic Range Selectable Bipolar Inputs

( 1 V and 0.5 V Ranges)

Integral Two-Pole Low-Pass Nyquist Filter Two’s Complement Output Format

3.3 V Compatible Outputs

1.8 W per Channel Industrial and Military Grade

APPLICATIONS

Radar Processing

Optimized for I/Q Baseband Operation

Phased Array Receivers

Multichannel, Multimode Receivers

GPS Antijamming Receivers

Communications Receivers

PRODUCT DESCRIPTION

The AD13465 is a complete dual channel signal processing solution including on-board amplifiers, references, ADCs, and output termination components to provide optimized system performance. The AD13465 has on-chip track-and-hold circuitry and utilizes an innovative multipass architecture to achieve 14-bit, 65 MSPS performance. The AD13465 uses

state-of-the-art high-density circuit design and laser-trimmed thin-film resistor networks to achieve exceptional channel matching and impedance control, and provide for significant board area savings.

Multiple options are provided for driving the analog input, including single-ended, differential, and optional series filtering. The AD13465 also offers the user a choice of analog input signal ranges to further minimize additional external signal conditioning, while remaining general-purpose. The AD13465 operates with ±5.0 V for the analog signal conditioning, 5.0 V supply for the analog-to-digital conversion, and 3.3 V digital supply for the output stage. Each channel is completely independent, allowing operation with independent Encode and Analog Inputs, while maintaining minimal crosstalk and interference.

The AD13465 is packaged in a 68-lead ceramic gull wing package. Manufacturing is done on Analog Devices’ MIL38534 Qualified Manufacturers Line (QML) and components are available up to Class-H (–40°C to +85°C). The components are manufactured using Analog Devices’ high-speed complementary bipolar process (XFCB).

PRODUCT HIGHLIGHTS

1.Guaranteed sample rate of 65 MSPS.

2.Input signal conditioning included; gain and impedance matching.

3.Single-ended, differential, or off-module filter options.

4.Fully tested/characterized full channel performance

5.Pin compatible with 12-bit AD13280 product family.

 

 

FUNCTIONAL BLOCK DIAGRAM

 

 

AMP-IN-A-2

AMP-IN-A-1

 

AMP-IN-B-2

AMP-IN-B-1

 

AMP-OUT-A

 

 

 

 

 

AMP-OUT-B

A–IN

 

 

 

 

 

 

A+IN

 

 

 

 

 

B+IN

 

 

 

 

 

 

B–IN

DROUTA

 

 

 

 

 

 

(LSB) D0A

 

 

 

AD13465

 

DROUTB

D1A

 

 

 

 

 

 

 

 

 

 

ENC

D2A

 

 

 

 

TIMING

 

 

 

 

 

 

 

 

 

 

ENC

D3A

 

 

 

 

 

 

 

 

 

 

 

D4A

 

VREF

 

 

VREF

 

D5A

 

 

 

 

 

 

 

DROUT

 

 

 

 

 

D13B (MSB)

D6A

 

DROUT

 

 

 

 

 

 

14

 

 

 

 

 

D12B

D7A

 

14

 

 

11

 

 

5

D11B

D8A

 

 

100 OUTPUT TERMINATORS

100 OUTPUT TERMINATORS

 

 

D10B

D9A

 

 

 

 

9

TIMING

3

 

 

 

 

 

 

D9B

 

 

 

 

D10A

 

 

 

 

 

 

 

 

 

 

REV. 0

ENC ENC

D11A D12A

D13A

D0B D1B D2B D3B D4B D5B D6B D7B D8B

 

 

 

(MSB)

(LSB)

 

 

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

www.analog.com

Fax: 781/326-8703

© Analog Devices, Inc., 2001

AD13465–TARGET SPECIFICATIONS (AVCC = 5 V; AVEE = –5 V; DVCC = 3.3 V applies to each ADC with Front End Amplifier unless otherwise noted.)

 

 

Test

Mil Sub-

 

AD13465AZ/BZ

 

 

Parameter

Temp

Level

Group

Min

Typ

Max

Unit

 

 

 

 

 

 

 

 

RESOLUTION

 

 

 

 

14

 

Bits

 

 

 

 

 

 

 

 

DC ACCURACY

 

 

 

 

 

 

 

No Missing Codes

Full

IV

12

 

Guaranteed

 

 

Offset Error

25°C

I

1

–2.2

± 0.2

+2.2

% FS

 

Full

VI

2, 3

–2.2

± 1.0

+2.2

% FS

Offset Error Channel Match

Full

VI

1, 2, 3

–1.0

± 0.1

+1.0

% FS

Gain Error1

25°C

I

1

–3.0

–1.0

+1.0

% FS

 

Full

VI

2, 3

–5.0

± 2.0

+5.0

% FS

Gain Error Channel Match

25°C

I

1

+1.5

± 0.5

+1.5

% FS

 

Max

VI

2

–3.0

± 1.0

+3.0

% FS

 

Min

VI

3

–5.0

± 1.0

+5.0

% FS

SINGLE-ENDED ANALOG INPUT

 

 

 

 

 

 

 

Input Voltage Range

 

 

 

 

± 0.5

 

 

AMP-IN-X-1

Full

V

 

 

 

V

AMP-IN-X-2

Full

V

 

 

± 1.0

 

V

Input Resistance

 

 

 

 

 

 

AMP-IN-X-1

Full

IV

12

99

100

101

AMP-IN-X-2

Full

IV

12

198

200

202

Input Capacitance2

 

 

 

 

4.0

7.0

pF

Analog Input Bandwidth3

Full

V

 

 

100

 

MHz

DIFFERENTIAL ANALOG INPUT

 

 

 

 

 

 

 

Analog Signal Input Range

 

 

 

 

± 1.0

 

 

A+IN to A–IN and B+IN to B–IN4

Full

V

 

 

 

V

Input Impedance

Full

V

 

 

618

 

Analog Input Bandwidth3

Full

V

 

 

50

 

MHz

ENCODE INPUT (ENC, ENC)5

 

 

 

 

 

 

 

Differential Input Voltage

Full

IV

12

0.4

 

 

V p-p

Differential Input Resistance

25°C

V

 

 

10

 

k

Differential Input Capacitance

25°C

V

 

 

2.5

 

pF

 

 

 

 

 

 

 

 

SWITCHING PERFORMANCE

 

 

 

 

 

 

 

Maximum Conversion Rate6

Full

VI

4, 5, 6

65

 

 

MSPS

Minimum Conversion Rate6

Full

IV

12

 

 

20

MSPS

Aperture Delay (tA)

25°C

V

 

 

1.5

 

ns

Aperture Delay Matching

25°C

IV

12

 

250

500

ps

Aperture Uncertainty (Jitter)

25°C

V

 

 

0.3

 

ps rms

ENCODE Pulse with High

25°C

IV

12

5.0

7.7

9.5

ns

ENCODE Pulse with Low

25°C

IV

12

5.0

7.7

9.5

ns

Output Delay (tOD)

Full

IV

12

 

7.5

 

ns

Encode, Rising to Data Ready,

Full

V

 

 

11.5

 

ns

Rising Delay

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SNR7

25°C

 

 

 

 

 

 

Analog Input @ 4.98 MHz

V

 

 

72

 

dBFS

Analog Input @ 9.9 MHz

25°C

I

4

70

72

 

dBFS

 

Full

II

5, 6

69

71

 

dBFS

Analog Input @ 21 MHz

25°C

I

4

69

71

 

dBFS

 

Full

II

5, 6

68

70

 

dBFS

Analog Input @ 32 MHz

25°C

V

 

 

70

 

dBFS

 

Full

V

 

 

69

 

dBFS

 

 

 

 

 

 

 

 

SINAD8

25°C

 

 

 

 

 

 

Analog Input @ 4.98 MHz

V

 

 

72

 

dBFS

Analog Input @ 9.9 MHz

25°C

I

4

69

72

 

dBFS

 

Full

II

5, 6

68.5

70.5

 

dBFS

Analog Input @ 21 MHz

25°C

I

4

66.5

70

 

dBFS

 

Full

II

5, 6

66

69

 

dBFS

Analog Input @ 32 MHz

25°C

V

 

 

63

 

dBFS

 

Full

V

 

 

61

 

dBFS

 

 

 

 

 

 

 

 

–2–

REV. 0

 

 

 

 

 

 

 

AD13465

 

 

Test

Mil Sub-

 

AD13465AZ/BZ

 

 

 

Parameter

Temp

Level

Group

Min

Typ

Max

 

Unit

 

 

 

 

 

 

 

 

 

SPURIOUS-FREE DYNAMIC RANGE9

25°C

 

 

 

 

 

 

 

Analog Input @ 4.98 MHz

V

 

 

85

 

 

dBFS

Analog Input @ 9.9 MHz

25°C

I

4

80

86

 

 

dBFS

 

Full

II

5, 6

78

84

 

 

dBFS

Analog Input @ 21 MHz

25°C

I

4

70

76

 

 

dBFS

 

Full

II

5, 6

69

74

 

 

dBFS

Analog Input @ 32 MHz

25°C

V

 

 

63

 

 

dBFS

 

Full

V

 

 

62

 

 

dBFS

 

 

 

 

 

 

 

 

 

SINGLE-ENDED ANALOG INPUT

25°C

 

 

 

 

 

 

 

Pass Band Ripple to 10 MHz

V

 

 

0.05

 

 

dB

Pass Band Ripple to 25 MHz

25°C

V

 

 

0.1

 

 

dB

 

 

 

 

 

 

 

 

 

DIFFERENTIAL ANALOG INPUT

25°C

 

 

 

 

 

 

 

Pass Band Ripple to 10 MHz

V

 

 

0.3

 

 

dB

Pass Band Ripple to 25 MHz

25°C

V

 

 

0.82

 

 

dB

 

 

 

 

 

 

 

 

 

TWO-TONE IMD REJECTION10

25°C

 

 

 

 

 

 

 

fIN = 9.1 MHz and 10.1 MHz

I

4

77.5

82

 

 

dBc

f1 and f2 are –7 dB

Full

II

5, 6

76.5

80

 

 

 

fIN = 19.1 MHz and 20.7 MHz

25°C

V

 

 

72

 

 

dBc

f1 and f2 are –7 dB

 

 

 

 

 

 

 

 

CHANNEL-TO-CHANNEL ISOLATION11

25°C

IV

12

90

 

 

 

dB

TRANSIENT RESPONSE

25°C

V

 

 

15.3

 

 

ns

 

 

 

 

 

 

 

 

 

DIGITAL OUTPUTS12

 

 

 

 

 

 

 

 

Logic Compatibility

 

 

 

 

CMOS

 

 

 

DVCC = 3.3 V

 

 

 

 

 

 

 

 

Logic 1 Voltage

Full

I

1, 2, 3

2.5

DVCC – 0.2

 

 

V

Logic 0 Voltage

Full

I

1, 2, 3

 

0.2

0.5

 

V

DVCC = 5 V

 

 

 

 

 

 

 

 

Logic 1 Voltage

Full

V

 

 

DVCC – 0.3

 

 

V

Logic 0 Voltage

Full

V

 

 

0.35

 

 

V

Output Coding

 

 

 

Two’s Complement

 

 

 

 

 

 

 

 

 

 

 

 

POWER SUPPLY

 

 

 

 

 

 

 

 

AVCC Supply Voltage13

Full

VI

 

4.85

5.0

5.25

 

V

I (AVCC) Current

Full

V

 

 

270

308

 

mA

AVEE Supply Voltage13

Full

VI

 

–5.25

–5.0

–4.75

 

V

I (AVEE) Current

Full

V

 

 

38

49

 

mA

DVCC Supply Voltage13

Full

VI

 

3.135

3.3

3.465

 

V

I (DVCC) Current

Full

V

 

 

34

46

 

mA

(Total) Supply Current per Channel

Full

I

1, 2, 3

 

369

403

 

mA

Power Dissipation (Total)

Full

I

1, 2, 3

 

3.57

3.9

 

W

Power Supply Rejection Ratio (PSRR)

Full

V

 

 

0.02

 

 

% FSR/

 

 

 

 

 

 

 

 

% VS

NOTES

1Gain tests are performed on AMP-IN-X-1 input voltage range.

2Input capacitance spec. combines AD8037 capacitance and ceramic package capacitance.

3Full Power Bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.

4For differential input: +IN = 1 V p-p and –IN = 1 V p-p (signals are 180° out of phase). For single ended input: +IN = 2 V p-p and –IN = GND. 5All AC specifications tested by driving ENCODE and ENCODE differentially. AMP-IN-X-1 = 1 V p-p, AMP-IN-X-2 = GND.

6Minimum and Maximum conversion rates allow for variation in Encode Duty Cycle of 50% ± 5%.

7Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). Encode = 65 MSPS. SNR is reported in dBFS, related back to converter full scale.

8Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 65 MSPS. SINAD is reported in dBFS, related back to converter full scale.

9Analog Input signal power at –1 dBFS; SFDR is ratio of converter full scale to worst spur.

10Both input tones at –7 dBFS; two tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product. 11Channel-to-channel isolation tested with A Channel grounded and a full-scale signal applied to B Channel.

12Digital output logic levels: DVCC = 3.3 V, CLOAD = 10 pF. Capacitive loads > 10 pF will degrade performance.

13Supply voltage recommended operating range. AVCC may be varied from 4.85 V to 5.25 V. However, rated ac (harmonics) performance is valid only over the range AVCC = 5.0 V to 5.25 V.

Specifications subject to change without notice.

REV. 0

–3–

AD13465

ABSOLUTE MAXIMUM RATINGS1

ELECTRICAL

AVCC Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 7 V AVEE Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . –7 V to 0 V DVCC Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 7 V Analog Input Voltage . . . . . . . . . . . . . . . . . . . . . VEE to VCC Analog Input Current . . . . . . . . . . . . . . –10 mA to +10 mA

Digital Input Voltage (ENCODE) . . . . . . . . . . . . . 0 to VCC ENCODE, ENCODE Differential Voltage . . . . . . . . . . 4 V

Digital Output Current . . . . . . . . . . . . –10 mA to +10 mA ENVIRONMENTAL2

Operating Temperature (Case) . . . . . . . . . –40°C to +85°C Maximum Junction Temperature . . . . . . . . . . . . . . . 175°C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . 300°C Storage Temperature Range (Ambient) . . –65°C to +150°C

NOTES

1Absolute maximum ratings are limiting values applied individually, and beyond which the serviceability of the circuit may be impaired. Functional operability is not necessarily implied. Exposure to absolute maximum rating conditions for an extended period of time may affect device reliability.

2Typical thermal impedance for “ES” package: θJC, 2.2°C/W; θJA, 24.3°C/W.

TEST LEVEL

I 100% Production Tested.

II100% Production Tested at 25°C, and sample tested at specified temperatures. AC testing done on sample basis.

III Sample Tested Only.

IV Parameter is guaranteed by design and characterization testing.

V Parameter is a typical value only.

VI 100% production tested at temperature at 25°C: sample tested at temperature extremes.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD13465 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

ORDERING GUIDE

WARNING!

ESD SENSITIVE DEVICE

Model

Temperature Range (Case)

Package Description

Package Option

 

 

 

 

AD13465AZ

–25°C to +85°C

68-Lead Ceramic Leaded Chip Carrier

ES-68C

AD13465AF

–25°C to +85°C

68-Lead Ceramic Leaded Chip Carrier

ES-68C

 

–40°C to +85°C

with Nonconductive Tie-Bar

 

5962-0150601HXA

68-Lead Ceramic Leaded Chip Carrier

ES-68C

AD13465/PCB

25°C

Evaluation Board with AD13465AZ

 

–4–

REV. 0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AD13465

 

 

 

 

 

 

 

 

 

 

 

PIN FUNCTION DESCRIPTIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin No.

Mnemonic

 

Function

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1, 35

SHIELD

 

Internal Ground Shield Between Channels.

 

 

2, 3, 9, 10, 13, 16

AGNDA

 

A Channel Analog Ground. A and B grounds should be connected as close to the

 

 

 

device as possible.

 

 

 

 

 

 

 

 

 

 

 

 

4

A–IN

 

Inverting Differential Input (Gain = 1).

 

 

5

A+IN

 

Noninverting Differential Input (Gain = 1).

 

 

6

AMP-OUT-A

 

Single-Ended Amplifier Output (Gain = 2).

 

 

7

AMP-IN-A-1

 

Analog Input for A Side ADC (Nominally ±0.5 V).

8

AMP-IN-A-2

 

Analog Input for A Side ADC (Nominally ±1.0 V).

11

AVEEA

 

A Channel Analog Negative Supply Voltage (Nominally –5.0 V or –5.2 V).

12

AVCCA

 

A Channel Analog Positive Supply Voltage (Nominally 5.0 V).

14

ENCA

 

Complement of Encode; Differential Input.

 

 

15

ENCA

 

Encode Input; Conversion Initiated on Rising Edge.

17

DVCCA

 

A Channel Digital Positive Supply Voltage (Nominally 5.0 V/3.3 V).

18–25, 28–33

D0A–D13A

 

Digital Outputs for ADC A. D0 (LSB).

 

 

26, 27

DGNDA

 

A Channel Digital Ground.

 

 

 

 

 

 

 

 

34

DROUTA

 

Data Ready A Output.

 

 

 

 

 

 

 

 

 

 

 

36

DROUTB

 

Data Ready B Output.

 

 

 

 

 

 

 

 

 

 

 

37–42, 45–52

D0B–D13B

 

Digital Outputs for ADC B. D0 (LSB).

 

 

43, 44

DGNDB

 

B Channel Digital Ground.

 

 

 

 

 

 

 

 

53

DVCCB

 

B Channel Digital Positive Supply Voltage (Nominally 5.0 V/3.3 V).

54, 57, 60, 61, 67, 68

AGNDB

 

B Channel Analog Ground.

 

 

 

 

 

 

 

 

55

ENCB

 

Encode Input; Conversion Initiated on Rising Edge.

56

ENCB

 

Complement of Encode; Differential Input.

 

 

58

AVCCB

 

B Channel Analog Positive Supply Voltage (Nominally 5.0 V).

59

AVEEB

 

B Channel Analog Negative Supply Voltage (Nominally –5.0 V or –5.2 V).

62

AMP-IN-B-2

 

Analog Input for B Side ADC (Nominally ±1.0 V).

63

AMP-IN-B-1

 

Analog Input for B Side ADC (Nominally ±0.5 V).

64

AMP-OUT-B

 

Single-Ended Amplifier Output (Gain = 2).

 

 

65

B+IN

 

Noninverting Differential Input (Gain = 1).

 

 

66

B–IN

 

Inverting Differential Input (Gain = 1).

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PIN CONFIGURATION

 

 

 

 

 

 

 

 

 

AGNDA

AMP-IN-A-2

AMP-IN-A-1

AMP-OUT-A

A+IN

A–IN

AGNDA

AGNDA

SHIELD

AGNDB

AGNDB

B–IN

B+IN

AMP-OUT-B

AMP-IN-B-1

AMP-IN-B-2

AGNDB

 

 

 

 

 

9

8

7

6

5

4

3

2

1

68

67

66

65

64

63

62

61

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AGNDA 10

 

 

 

 

 

 

 

 

 

PIN 1

 

 

 

 

 

60

AGNDB

 

AVEEA 11

 

 

 

 

 

 

 

 

 

IDENTIFIER

 

 

 

59

AV

B

 

AVCCA 12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

58

AV

B

 

AGNDA 13

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

57

AGNDB

 

ENCA 14

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

56

ENCB

 

ENCA 15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

55

ENCB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AGNDA 16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

54

AGNDB

 

DVCCA 17

 

 

 

 

 

 

 

AD13465

 

 

 

 

 

53

DVCCB

 

D0A(LSB) 18

 

 

 

 

 

 

 

TOP VIEW

 

 

 

 

 

52

D13B(MSB)

 

D1A 19

 

 

 

 

 

 

(Not to Scale)

 

 

 

 

 

51

D12B

 

D2A 20

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50

D11B

 

D3A 21

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

49

D10B

 

D4A 22

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

48

D9B

 

D5A 23

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

47

D8B

 

D6A 24

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

46

D7B

 

D7A 25

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

45

D6B

 

DGNDA 26

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

44

DGNDB

 

 

 

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

 

 

 

 

 

 

DGNDA

D8A

D9A

D10A

D11A

D12A

D13A(MSB)

DROUTA

SHIELD

DROUTB

D0B(LSB)

D1B

D2B

D3B

D4B

D5B

DGNDB

 

 

REV. 0

–5–

Analog Devices AD13465AZ, AD13465AF, AD13465-PCB, 5962-0150601HXA Datasheet

AD13465–Typical Performance Characteristics

 

0

 

 

 

 

 

 

–10

 

 

 

ENCODE = 65MSPS

 

 

 

 

AIN = 5MHz(–1dBFS)

 

 

 

 

 

 

–20

 

 

 

SNR = 72.12dBFS

 

–30

 

 

 

SFDR = 86.05dBc

 

 

 

 

 

 

 

–40

 

 

 

 

 

 

–50

 

 

 

 

 

dB

–60

 

 

 

 

 

–70

 

 

 

 

 

 

 

 

 

 

 

 

–80

 

 

 

 

 

 

–90

 

 

 

 

 

 

–100

 

 

 

 

 

 

–110

 

 

 

 

 

 

–120

 

 

 

 

 

 

–130

 

 

 

 

 

 

0

2.5

5.0

7.5

10.0 12.5 15.0 17.5 20.0 22.5

25.0 27.5 30.0 32.5

FREQUENCY – MHz

TPC 1. Single Tone @ 5 MHz

 

0

 

 

 

 

 

 

–10

ENCODE = 65MSPS

 

 

AIN = 21MHz(–1dBFS)

 

 

–20

 

 

SNR = 71.74dBFS

 

 

–30

SFDR = 73.07dBc

 

 

 

 

 

 

 

 

–40

 

 

 

 

 

 

–50

 

 

 

 

 

dB

–60

 

 

 

 

 

–70

 

 

 

 

 

 

 

 

 

 

 

 

–80

 

 

 

 

 

 

–90

 

 

 

 

 

 

–100

 

 

 

 

 

 

–110

 

 

 

 

 

 

–120

 

 

 

 

 

 

–130

 

 

 

 

 

 

0

2.5

5.0

7.5

10.0 12.5 15.0 17.5 20.0 22.5

25.0 27.5 30.0 32.5

FREQUENCY – MHz

TPC 2. Single Tone @ 21 MHz

 

0

 

 

 

 

 

 

–10

 

 

 

ENCODE = 65MSPS

 

 

–20

 

 

 

AIN = 9.1MHz AND 10.1MHz(–1dBFS)

 

 

 

 

SFDR = 85.01dBc

 

 

 

 

 

 

 

 

–30

 

 

 

 

 

 

–40

 

 

 

 

 

 

–50

 

 

 

 

 

dB

–60

 

 

 

 

 

–70

 

 

 

 

 

 

 

 

 

 

 

 

–80

 

 

 

 

 

 

–90

 

 

 

 

 

 

–100

 

 

 

 

 

 

–110

 

 

 

 

 

 

–120

 

 

 

 

 

 

–130

 

 

 

 

 

 

0

2.5

5.0

7.5

10.0 12.5 15.0 17.5 20.0 22.5

25.0 27.5 30.0 32.5

FREQUENCY – MHz

TPC 3. Two-Tone @ 9.1 MHz/10.1 MHz

 

0

 

 

 

ENCODE = 65MSPS

 

–10

 

 

 

 

 

 

 

AIN = 9.9MHz(–1dBFS)

 

 

 

 

 

 

–20

 

 

 

SNR = 72.09dBFS

 

–30

 

 

 

SFDR = 84.04dBc

 

 

 

 

 

 

 

–40

 

 

 

 

 

 

–50

 

 

 

 

 

dB

–60

 

 

 

 

 

–70

 

 

 

 

 

 

 

 

 

 

 

 

–80

 

 

 

 

 

 

–90

 

 

 

 

 

 

–100

 

 

 

 

 

 

–110

 

 

 

 

 

 

–120

 

 

 

 

 

 

–130

 

 

 

 

 

 

0

2.5

5.0

7.5

10.0 12.5 15.0 17.5 20.0 22.5

25.0 27.5 30.0 32.5

FREQUENCY – MHz

TPC 4. Single Tone @ 9.9 MHz

 

0

 

 

 

 

 

 

–10

ENCODE = 65MSPS

 

 

AIN = 32MHz(–1dBFS)

 

 

–20

 

 

SNR = 70.8dBFS

 

 

–30

SFDR = 62.57dBc

 

 

 

 

 

 

 

 

–40

 

 

 

 

 

 

–50

 

 

 

 

 

dB

–60

 

 

 

 

 

–70

 

 

 

 

 

 

 

 

 

 

 

 

–80

 

 

 

 

 

 

–90

 

 

 

 

 

 

–100

 

 

 

 

 

 

–110

 

 

 

 

 

 

–120

 

 

 

 

 

 

–130

 

 

 

 

 

 

0

2.5

5.0

7.5

10.0 12.5 15.0 17.5 20.0 22.5

25.0 27.5 30.0 32.5

FREQUENCY – MHz

TPC 5. Single Tone @ 32 MHz

 

0

 

 

 

 

 

 

–10

ENCODE = 65MSPS

 

 

AIN = 19MHz AND

 

 

–20

 

 

20.7MHz(–1dBFS)

 

 

–30

SNR = 70.8dBFS

 

 

SFDR = 75.40dBc

 

 

 

 

 

–40

 

 

 

 

 

 

–50

 

 

 

 

 

dB

–60

 

 

 

 

 

–70

 

 

 

 

 

 

 

 

 

 

 

 

–80

 

 

 

 

 

 

–90

 

 

 

 

 

 

–100

 

 

 

 

 

 

–110

 

 

 

 

 

 

–120

 

 

 

 

 

 

–130

 

 

 

 

 

 

0

2.5

5.0

7.5

10.0 12.5 15.0 17.5 20.0 22.5

25.0 27.5 30.0 32.5

FREQUENCY – MHz

TPC 6. Two-Tone @ 19 MHz/20.7 MHz

–6–

REV. 0

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