aDual Channel, 14-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning
AD13465
Dual, 65 MSPS Minimum Sample Rate Channel-to-Channel Matching, 1% Gain Error
90 dB Channel-to-Channel Isolation DC-Coupled Signal Conditioning
85 dB Spurious-Free Dynamic Range Selectable Bipolar Inputs
( 1 V and 0.5 V Ranges)
Integral Two-Pole Low-Pass Nyquist Filter Two’s Complement Output Format
3.3 V Compatible Outputs
1.8 W per Channel Industrial and Military Grade
Radar Processing
Optimized for I/Q Baseband Operation
Phased Array Receivers
Multichannel, Multimode Receivers
GPS Antijamming Receivers
Communications Receivers
The AD13465 is a complete dual channel signal processing solution including on-board amplifiers, references, ADCs, and output termination components to provide optimized system performance. The AD13465 has on-chip track-and-hold circuitry and utilizes an innovative multipass architecture to achieve 14-bit, 65 MSPS performance. The AD13465 uses
state-of-the-art high-density circuit design and laser-trimmed thin-film resistor networks to achieve exceptional channel matching and impedance control, and provide for significant board area savings.
Multiple options are provided for driving the analog input, including single-ended, differential, and optional series filtering. The AD13465 also offers the user a choice of analog input signal ranges to further minimize additional external signal conditioning, while remaining general-purpose. The AD13465 operates with ±5.0 V for the analog signal conditioning, 5.0 V supply for the analog-to-digital conversion, and 3.3 V digital supply for the output stage. Each channel is completely independent, allowing operation with independent Encode and Analog Inputs, while maintaining minimal crosstalk and interference.
The AD13465 is packaged in a 68-lead ceramic gull wing package. Manufacturing is done on Analog Devices’ MIL38534 Qualified Manufacturers Line (QML) and components are available up to Class-H (–40°C to +85°C). The components are manufactured using Analog Devices’ high-speed complementary bipolar process (XFCB).
PRODUCT HIGHLIGHTS
1.Guaranteed sample rate of 65 MSPS.
2.Input signal conditioning included; gain and impedance matching.
3.Single-ended, differential, or off-module filter options.
4.Fully tested/characterized full channel performance
5.Pin compatible with 12-bit AD13280 product family.
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FUNCTIONAL BLOCK DIAGRAM |
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AMP-IN-A-2 |
AMP-IN-A-1 |
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AMP-IN-B-2 |
AMP-IN-B-1 |
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AMP-OUT-A |
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AMP-OUT-B |
A–IN |
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A+IN |
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B+IN |
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B–IN |
DROUTA |
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(LSB) D0A |
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AD13465 |
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DROUTB |
D1A |
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ENC |
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D2A |
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TIMING |
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ENC |
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D3A |
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D4A |
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VREF |
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VREF |
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D5A |
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DROUT |
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D13B (MSB) |
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D6A |
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DROUT |
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14 |
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D12B |
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D7A |
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14 |
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11 |
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5 |
D11B |
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D8A |
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100 OUTPUT TERMINATORS |
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100 OUTPUT TERMINATORS |
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D10B |
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D9A |
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9 |
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TIMING |
3 |
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D9B |
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D10A |
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REV. 0 |
ENC ENC |
D11A D12A |
D13A |
D0B D1B D2B D3B D4B D5B D6B D7B D8B |
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(MSB) |
(LSB) |
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 |
www.analog.com |
Fax: 781/326-8703 |
© Analog Devices, Inc., 2001 |
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Test |
Mil Sub- |
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AD13465AZ/BZ |
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Parameter |
Temp |
Level |
Group |
Min |
Typ |
Max |
Unit |
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RESOLUTION |
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14 |
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Bits |
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DC ACCURACY |
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No Missing Codes |
Full |
IV |
12 |
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Guaranteed |
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Offset Error |
25°C |
I |
1 |
–2.2 |
± 0.2 |
+2.2 |
% FS |
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Full |
VI |
2, 3 |
–2.2 |
± 1.0 |
+2.2 |
% FS |
Offset Error Channel Match |
Full |
VI |
1, 2, 3 |
–1.0 |
± 0.1 |
+1.0 |
% FS |
Gain Error1 |
25°C |
I |
1 |
–3.0 |
–1.0 |
+1.0 |
% FS |
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Full |
VI |
2, 3 |
–5.0 |
± 2.0 |
+5.0 |
% FS |
Gain Error Channel Match |
25°C |
I |
1 |
+1.5 |
± 0.5 |
+1.5 |
% FS |
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Max |
VI |
2 |
–3.0 |
± 1.0 |
+3.0 |
% FS |
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Min |
VI |
3 |
–5.0 |
± 1.0 |
+5.0 |
% FS |
SINGLE-ENDED ANALOG INPUT |
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Input Voltage Range |
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± 0.5 |
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AMP-IN-X-1 |
Full |
V |
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V |
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AMP-IN-X-2 |
Full |
V |
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± 1.0 |
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V |
Input Resistance |
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Ω |
AMP-IN-X-1 |
Full |
IV |
12 |
99 |
100 |
101 |
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AMP-IN-X-2 |
Full |
IV |
12 |
198 |
200 |
202 |
Ω |
Input Capacitance2 |
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4.0 |
7.0 |
pF |
Analog Input Bandwidth3 |
Full |
V |
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100 |
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MHz |
DIFFERENTIAL ANALOG INPUT |
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Analog Signal Input Range |
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± 1.0 |
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A+IN to A–IN and B+IN to B–IN4 |
Full |
V |
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V |
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Input Impedance |
Full |
V |
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618 |
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Ω |
Analog Input Bandwidth3 |
Full |
V |
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50 |
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MHz |
ENCODE INPUT (ENC, ENC)5 |
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Differential Input Voltage |
Full |
IV |
12 |
0.4 |
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V p-p |
Differential Input Resistance |
25°C |
V |
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10 |
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kΩ |
Differential Input Capacitance |
25°C |
V |
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2.5 |
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pF |
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SWITCHING PERFORMANCE |
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Maximum Conversion Rate6 |
Full |
VI |
4, 5, 6 |
65 |
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MSPS |
Minimum Conversion Rate6 |
Full |
IV |
12 |
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20 |
MSPS |
Aperture Delay (tA) |
25°C |
V |
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1.5 |
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ns |
Aperture Delay Matching |
25°C |
IV |
12 |
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250 |
500 |
ps |
Aperture Uncertainty (Jitter) |
25°C |
V |
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0.3 |
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ps rms |
ENCODE Pulse with High |
25°C |
IV |
12 |
5.0 |
7.7 |
9.5 |
ns |
ENCODE Pulse with Low |
25°C |
IV |
12 |
5.0 |
7.7 |
9.5 |
ns |
Output Delay (tOD) |
Full |
IV |
12 |
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7.5 |
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ns |
Encode, Rising to Data Ready, |
Full |
V |
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11.5 |
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ns |
Rising Delay |
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SNR7 |
25°C |
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Analog Input @ 4.98 MHz |
V |
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72 |
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dBFS |
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Analog Input @ 9.9 MHz |
25°C |
I |
4 |
70 |
72 |
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dBFS |
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Full |
II |
5, 6 |
69 |
71 |
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dBFS |
Analog Input @ 21 MHz |
25°C |
I |
4 |
69 |
71 |
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dBFS |
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Full |
II |
5, 6 |
68 |
70 |
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dBFS |
Analog Input @ 32 MHz |
25°C |
V |
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70 |
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dBFS |
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Full |
V |
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69 |
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dBFS |
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SINAD8 |
25°C |
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Analog Input @ 4.98 MHz |
V |
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72 |
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dBFS |
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Analog Input @ 9.9 MHz |
25°C |
I |
4 |
69 |
72 |
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dBFS |
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Full |
II |
5, 6 |
68.5 |
70.5 |
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dBFS |
Analog Input @ 21 MHz |
25°C |
I |
4 |
66.5 |
70 |
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dBFS |
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Full |
II |
5, 6 |
66 |
69 |
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dBFS |
Analog Input @ 32 MHz |
25°C |
V |
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63 |
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dBFS |
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Full |
V |
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61 |
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dBFS |
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–2– |
REV. 0 |
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AD13465 |
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Test |
Mil Sub- |
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AD13465AZ/BZ |
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Parameter |
Temp |
Level |
Group |
Min |
Typ |
Max |
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Unit |
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SPURIOUS-FREE DYNAMIC RANGE9 |
25°C |
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Analog Input @ 4.98 MHz |
V |
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85 |
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dBFS |
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Analog Input @ 9.9 MHz |
25°C |
I |
4 |
80 |
86 |
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dBFS |
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Full |
II |
5, 6 |
78 |
84 |
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dBFS |
Analog Input @ 21 MHz |
25°C |
I |
4 |
70 |
76 |
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dBFS |
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Full |
II |
5, 6 |
69 |
74 |
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dBFS |
Analog Input @ 32 MHz |
25°C |
V |
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63 |
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dBFS |
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Full |
V |
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62 |
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dBFS |
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SINGLE-ENDED ANALOG INPUT |
25°C |
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Pass Band Ripple to 10 MHz |
V |
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0.05 |
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dB |
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Pass Band Ripple to 25 MHz |
25°C |
V |
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0.1 |
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dB |
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DIFFERENTIAL ANALOG INPUT |
25°C |
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Pass Band Ripple to 10 MHz |
V |
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0.3 |
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dB |
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Pass Band Ripple to 25 MHz |
25°C |
V |
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0.82 |
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dB |
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TWO-TONE IMD REJECTION10 |
25°C |
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fIN = 9.1 MHz and 10.1 MHz |
I |
4 |
77.5 |
82 |
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dBc |
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f1 and f2 are –7 dB |
Full |
II |
5, 6 |
76.5 |
80 |
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fIN = 19.1 MHz and 20.7 MHz |
25°C |
V |
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72 |
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dBc |
f1 and f2 are –7 dB |
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CHANNEL-TO-CHANNEL ISOLATION11 |
25°C |
IV |
12 |
90 |
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dB |
TRANSIENT RESPONSE |
25°C |
V |
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15.3 |
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ns |
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DIGITAL OUTPUTS12 |
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Logic Compatibility |
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CMOS |
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DVCC = 3.3 V |
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Logic 1 Voltage |
Full |
I |
1, 2, 3 |
2.5 |
DVCC – 0.2 |
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V |
Logic 0 Voltage |
Full |
I |
1, 2, 3 |
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0.2 |
0.5 |
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V |
DVCC = 5 V |
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Logic 1 Voltage |
Full |
V |
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DVCC – 0.3 |
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V |
Logic 0 Voltage |
Full |
V |
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0.35 |
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V |
Output Coding |
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Two’s Complement |
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POWER SUPPLY |
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AVCC Supply Voltage13 |
Full |
VI |
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4.85 |
5.0 |
5.25 |
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V |
I (AVCC) Current |
Full |
V |
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270 |
308 |
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mA |
AVEE Supply Voltage13 |
Full |
VI |
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–5.25 |
–5.0 |
–4.75 |
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V |
I (AVEE) Current |
Full |
V |
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38 |
49 |
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mA |
DVCC Supply Voltage13 |
Full |
VI |
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3.135 |
3.3 |
3.465 |
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V |
I (DVCC) Current |
Full |
V |
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34 |
46 |
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mA |
(Total) Supply Current per Channel |
Full |
I |
1, 2, 3 |
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369 |
403 |
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mA |
Power Dissipation (Total) |
Full |
I |
1, 2, 3 |
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3.57 |
3.9 |
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W |
Power Supply Rejection Ratio (PSRR) |
Full |
V |
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0.02 |
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% FSR/ |
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% VS |
NOTES
1Gain tests are performed on AMP-IN-X-1 input voltage range.
2Input capacitance spec. combines AD8037 capacitance and ceramic package capacitance.
3Full Power Bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.
4For differential input: +IN = 1 V p-p and –IN = 1 V p-p (signals are 180° out of phase). For single ended input: +IN = 2 V p-p and –IN = GND. 5All AC specifications tested by driving ENCODE and ENCODE differentially. AMP-IN-X-1 = 1 V p-p, AMP-IN-X-2 = GND.
6Minimum and Maximum conversion rates allow for variation in Encode Duty Cycle of 50% ± 5%.
7Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). Encode = 65 MSPS. SNR is reported in dBFS, related back to converter full scale.
8Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 65 MSPS. SINAD is reported in dBFS, related back to converter full scale.
9Analog Input signal power at –1 dBFS; SFDR is ratio of converter full scale to worst spur.
10Both input tones at –7 dBFS; two tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product. 11Channel-to-channel isolation tested with A Channel grounded and a full-scale signal applied to B Channel.
12Digital output logic levels: DVCC = 3.3 V, CLOAD = 10 pF. Capacitive loads > 10 pF will degrade performance.
13Supply voltage recommended operating range. AVCC may be varied from 4.85 V to 5.25 V. However, rated ac (harmonics) performance is valid only over the range AVCC = 5.0 V to 5.25 V.
Specifications subject to change without notice.
REV. 0 |
–3– |
AD13465
ELECTRICAL
AVCC Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 7 V AVEE Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . –7 V to 0 V DVCC Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 7 V Analog Input Voltage . . . . . . . . . . . . . . . . . . . . . VEE to VCC Analog Input Current . . . . . . . . . . . . . . –10 mA to +10 mA
Digital Input Voltage (ENCODE) . . . . . . . . . . . . . 0 to VCC ENCODE, ENCODE Differential Voltage . . . . . . . . . . 4 V
Digital Output Current . . . . . . . . . . . . –10 mA to +10 mA ENVIRONMENTAL2
Operating Temperature (Case) . . . . . . . . . –40°C to +85°C Maximum Junction Temperature . . . . . . . . . . . . . . . 175°C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . 300°C Storage Temperature Range (Ambient) . . –65°C to +150°C
NOTES
1Absolute maximum ratings are limiting values applied individually, and beyond which the serviceability of the circuit may be impaired. Functional operability is not necessarily implied. Exposure to absolute maximum rating conditions for an extended period of time may affect device reliability.
2Typical thermal impedance for “ES” package: θJC, 2.2°C/W; θJA, 24.3°C/W.
TEST LEVEL
I 100% Production Tested.
II100% Production Tested at 25°C, and sample tested at specified temperatures. AC testing done on sample basis.
III Sample Tested Only.
IV Parameter is guaranteed by design and characterization testing.
V Parameter is a typical value only.
VI 100% production tested at temperature at 25°C: sample tested at temperature extremes.
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD13465 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
Model |
Temperature Range (Case) |
Package Description |
Package Option |
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AD13465AZ |
–25°C to +85°C |
68-Lead Ceramic Leaded Chip Carrier |
ES-68C |
AD13465AF |
–25°C to +85°C |
68-Lead Ceramic Leaded Chip Carrier |
ES-68C |
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–40°C to +85°C |
with Nonconductive Tie-Bar |
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5962-0150601HXA |
68-Lead Ceramic Leaded Chip Carrier |
ES-68C |
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AD13465/PCB |
25°C |
Evaluation Board with AD13465AZ |
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–4– |
REV. 0 |
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AD13465 |
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PIN FUNCTION DESCRIPTIONS |
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Pin No. |
Mnemonic |
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Function |
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1, 35 |
SHIELD |
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Internal Ground Shield Between Channels. |
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2, 3, 9, 10, 13, 16 |
AGNDA |
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A Channel Analog Ground. A and B grounds should be connected as close to the |
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device as possible. |
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4 |
A–IN |
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Inverting Differential Input (Gain = 1). |
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5 |
A+IN |
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Noninverting Differential Input (Gain = 1). |
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6 |
AMP-OUT-A |
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Single-Ended Amplifier Output (Gain = 2). |
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7 |
AMP-IN-A-1 |
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Analog Input for A Side ADC (Nominally ±0.5 V). |
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8 |
AMP-IN-A-2 |
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Analog Input for A Side ADC (Nominally ±1.0 V). |
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11 |
AVEEA |
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A Channel Analog Negative Supply Voltage (Nominally –5.0 V or –5.2 V). |
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12 |
AVCCA |
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A Channel Analog Positive Supply Voltage (Nominally 5.0 V). |
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14 |
ENCA |
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Complement of Encode; Differential Input. |
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15 |
ENCA |
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Encode Input; Conversion Initiated on Rising Edge. |
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17 |
DVCCA |
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A Channel Digital Positive Supply Voltage (Nominally 5.0 V/3.3 V). |
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18–25, 28–33 |
D0A–D13A |
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Digital Outputs for ADC A. D0 (LSB). |
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26, 27 |
DGNDA |
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A Channel Digital Ground. |
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34 |
DROUTA |
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Data Ready A Output. |
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36 |
DROUTB |
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Data Ready B Output. |
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37–42, 45–52 |
D0B–D13B |
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Digital Outputs for ADC B. D0 (LSB). |
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43, 44 |
DGNDB |
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B Channel Digital Ground. |
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53 |
DVCCB |
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B Channel Digital Positive Supply Voltage (Nominally 5.0 V/3.3 V). |
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54, 57, 60, 61, 67, 68 |
AGNDB |
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B Channel Analog Ground. |
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55 |
ENCB |
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Encode Input; Conversion Initiated on Rising Edge. |
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56 |
ENCB |
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Complement of Encode; Differential Input. |
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58 |
AVCCB |
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B Channel Analog Positive Supply Voltage (Nominally 5.0 V). |
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59 |
AVEEB |
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B Channel Analog Negative Supply Voltage (Nominally –5.0 V or –5.2 V). |
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62 |
AMP-IN-B-2 |
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Analog Input for B Side ADC (Nominally ±1.0 V). |
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63 |
AMP-IN-B-1 |
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Analog Input for B Side ADC (Nominally ±0.5 V). |
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64 |
AMP-OUT-B |
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Single-Ended Amplifier Output (Gain = 2). |
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65 |
B+IN |
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Noninverting Differential Input (Gain = 1). |
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66 |
B–IN |
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Inverting Differential Input (Gain = 1). |
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PIN CONFIGURATION |
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AGNDA |
AMP-IN-A-2 |
AMP-IN-A-1 |
AMP-OUT-A |
A+IN |
A–IN |
AGNDA |
AGNDA |
SHIELD |
AGNDB |
AGNDB |
B–IN |
B+IN |
AMP-OUT-B |
AMP-IN-B-1 |
AMP-IN-B-2 |
AGNDB |
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9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
68 |
67 |
66 |
65 |
64 |
63 |
62 |
61 |
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AGNDA 10 |
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PIN 1 |
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60 |
AGNDB |
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AVEEA 11 |
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IDENTIFIER |
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59 |
AV |
B |
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AVCCA 12 |
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EE |
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58 |
AV |
B |
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AGNDA 13 |
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CC |
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57 |
AGNDB |
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ENCA 14 |
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56 |
ENCB |
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ENCA 15 |
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55 |
ENCB |
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AGNDA 16 |
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54 |
AGNDB |
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DVCCA 17 |
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AD13465 |
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53 |
DVCCB |
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D0A(LSB) 18 |
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TOP VIEW |
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52 |
D13B(MSB) |
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D1A 19 |
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(Not to Scale) |
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51 |
D12B |
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D2A 20 |
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50 |
D11B |
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D3A 21 |
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49 |
D10B |
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D4A 22 |
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48 |
D9B |
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D5A 23 |
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47 |
D8B |
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D6A 24 |
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46 |
D7B |
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D7A 25 |
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45 |
D6B |
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DGNDA 26 |
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44 |
DGNDB |
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27 |
28 |
29 |
30 |
31 |
32 |
33 |
34 |
35 |
36 |
37 |
38 |
39 |
40 |
41 |
42 |
43 |
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DGNDA |
D8A |
D9A |
D10A |
D11A |
D12A |
D13A(MSB) |
DROUTA |
SHIELD |
DROUTB |
D0B(LSB) |
D1B |
D2B |
D3B |
D4B |
D5B |
DGNDB |
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REV. 0 |
–5– |
AD13465–Typical Performance Characteristics
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0 |
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–10 |
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ENCODE = 65MSPS |
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AIN = 5MHz(–1dBFS) |
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–20 |
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SNR = 72.12dBFS |
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–30 |
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SFDR = 86.05dBc |
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–40 |
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–50 |
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dB |
–60 |
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–70 |
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–80 |
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–90 |
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–100 |
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–110 |
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–120 |
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–130 |
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0 |
2.5 |
5.0 |
7.5 |
10.0 12.5 15.0 17.5 20.0 22.5 |
25.0 27.5 30.0 32.5 |
FREQUENCY – MHz
TPC 1. Single Tone @ 5 MHz
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0 |
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–10 |
ENCODE = 65MSPS |
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AIN = 21MHz(–1dBFS) |
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–20 |
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SNR = 71.74dBFS |
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–30 |
SFDR = 73.07dBc |
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–40 |
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–50 |
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dB |
–60 |
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–70 |
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–80 |
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–90 |
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–100 |
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–110 |
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–120 |
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–130 |
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0 |
2.5 |
5.0 |
7.5 |
10.0 12.5 15.0 17.5 20.0 22.5 |
25.0 27.5 30.0 32.5 |
FREQUENCY – MHz
TPC 2. Single Tone @ 21 MHz
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0 |
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–10 |
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ENCODE = 65MSPS |
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–20 |
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AIN = 9.1MHz AND 10.1MHz(–1dBFS) |
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SFDR = 85.01dBc |
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–30 |
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–40 |
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–50 |
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dB |
–60 |
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–70 |
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–80 |
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–90 |
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–100 |
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–110 |
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–120 |
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–130 |
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0 |
2.5 |
5.0 |
7.5 |
10.0 12.5 15.0 17.5 20.0 22.5 |
25.0 27.5 30.0 32.5 |
FREQUENCY – MHz
TPC 3. Two-Tone @ 9.1 MHz/10.1 MHz
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0 |
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ENCODE = 65MSPS |
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–10 |
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AIN = 9.9MHz(–1dBFS) |
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–20 |
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SNR = 72.09dBFS |
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–30 |
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SFDR = 84.04dBc |
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–40 |
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–50 |
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dB |
–60 |
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–70 |
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–80 |
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–90 |
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–100 |
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–110 |
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–120 |
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–130 |
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0 |
2.5 |
5.0 |
7.5 |
10.0 12.5 15.0 17.5 20.0 22.5 |
25.0 27.5 30.0 32.5 |
FREQUENCY – MHz
TPC 4. Single Tone @ 9.9 MHz
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0 |
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–10 |
ENCODE = 65MSPS |
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AIN = 32MHz(–1dBFS) |
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–20 |
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SNR = 70.8dBFS |
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–30 |
SFDR = 62.57dBc |
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–40 |
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–50 |
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dB |
–60 |
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–70 |
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–80 |
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–90 |
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–100 |
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–110 |
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–120 |
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–130 |
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0 |
2.5 |
5.0 |
7.5 |
10.0 12.5 15.0 17.5 20.0 22.5 |
25.0 27.5 30.0 32.5 |
FREQUENCY – MHz
TPC 5. Single Tone @ 32 MHz
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0 |
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–10 |
ENCODE = 65MSPS |
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AIN = 19MHz AND |
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–20 |
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20.7MHz(–1dBFS) |
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–30 |
SNR = 70.8dBFS |
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SFDR = 75.40dBc |
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–40 |
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–50 |
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dB |
–60 |
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–70 |
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–80 |
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–90 |
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–100 |
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–110 |
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–120 |
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–130 |
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0 |
2.5 |
5.0 |
7.5 |
10.0 12.5 15.0 17.5 20.0 22.5 |
25.0 27.5 30.0 32.5 |
FREQUENCY – MHz
TPC 6. Two-Tone @ 19 MHz/20.7 MHz
–6– |
REV. 0 |