Texas Instruments TPS65023B User Manual
Size:
484.83 Kb
Download

User's Guide

SLVU394 – October 2010

TPS65023B/TPS650231EVM

The characteristics, operation, and use of the TPS65023B/TPS650231EVM-664evaluation module (EVM) are described in this document. This EVM is designed to help the user evaluate and test the various operating modes of the TPS65023B/TPS650231. This user’s guide includes setup instructions for the hardware and software, a schematic diagram, a bill of materials, and PCB layout drawings for the evaluation module.

 

Contents

 

1

Introduction ..................................................................................................................

1

2

Electrical Performance Specification .....................................................................................

2

3

Input/Output Connector Description ......................................................................................

3

4

Board Layout ................................................................................................................

6

5

Schematic and Bill of Materials ..........................................................................................

11

 

List of Figures

 

1

Assembly Layer .............................................................................................................

6

2

Top Layer Routing ..........................................................................................................

7

3

Layer-2 Routing, GND Plane ..............................................................................................

8

4

Layer-3 Routing, Vin Plane ................................................................................................

9

5

Bottom Layer Routing.....................................................................................................

10

6

TPS65023B/TPS650231EVM-664 Schematic.........................................................................

11

 

List of Tables

 

1

EVM Ordering Options .....................................................................................................

2

2

Default LDO Output Voltages TPS65023B ..............................................................................

2

3

Default LDO Output Voltages TPS650231 ..............................................................................

2

4

TPS65023B/TPS650231EVM-664 Bill of Materials ...................................................................

12

1Introduction

The Texas Instruments TPS65023B/TPS650231EVM is an integrated power management integrated circuit (IC) for applications that are powered with one Li-ionorLi-polymercell and require multiple power rails. The TPS65023B/TPS650231 contains three highly efficient switchingstep-downconverters, two LDOs, and additional status and I/O pins. The device is controlled via an I2C interface (HPA172).

1.1Requirements

In order for this EVM to operate properly, the following components must be connected and properly configured.

1.1.1Personal Computer

A personal computer with a USB port is required to operate this EVM. The TPS65023B/TPS650231 interface software, which is run on the personal computer (PC), communicates with the EVM via the PC USB port. The user sends commands to the EVM as well as reads the contents of the TPS65023B/TPS650231 internal registers through the USB port.

SLVU394–October2010

TPS65023B/TPS650231EVM

1

Submit Documentation Feedback

 

 

Copyright © 2010, Texas Instruments Incorporated

Electrical Performance Specification

www.ti.com

1.1.2Printed-CircuitBoard Assembly

The TPS65023B/TPS650231EVM-664PCB contains the TPS65023B/TPS650231 IC and its required external components. This board contains several jumpers and connectors that allow the user to customize the board for specific operating conditions.

1.1.3USB-to-I2C Adapter

The USB-to-I2CAdapter, also known as the HPA172, is the link that allows the PC and the EVM to communicate. The adapter connects to the PC with the supplied USB cable on one side and to the EVM though the supplied ribbon cable on the other. When the user writes a command to the EVM, the interface program, which is run from the PC, sends the command to the PC USB port. The adapter receives the USB command and converts the signal to an I2C protocol. It then sends the I2C signal to the TPS65023B/TPS650231 board. When the user reads a status register from the EVM, the PC sends a command to read a register on the EVM. When the EVM receives the command, it reports the status of the register via the I2C interface. The adapter receives the information on the I2C interface, converts it to a USB protocol, and sends it to the PC.

1.1.4Software

Texas Instruments provides software to assist the user in evaluating this EVM. To install the software, go to the Texas Instruments Web page and download the latest software version from the TPS65023B or TPS650231 product folder. Once you have downloaded the software, execute the setup file, and follow the instructions given.

1.2Features

Three high-efficiencyDC/DCstep-downconverters (1.7 A/1.2 A/1 A)

2 x 200-mAlow-dropout(LDO) regulators

30-mARTC (Reel Time Clock) LDO

I2C Interface (100-nssetup and hold time)

Dynamic voltage scaling DCDC1

2 Electrical Performance Specification

Table 1. EVM Ordering Options

Orderable EVM

Device Part

 

Default Output Voltages

 

Number

Number

DCDC1

DCDC2

DCDC3

LDO1

LDO2

 

 

 

 

 

 

 

TPS65023BEVM-664

TPS65023B

1.2V / 1.6V

1/8V / 3.3V

1.8V / 3.3V

SeeTable 2

SeeTable 2

 

 

 

 

 

 

 

TPS650231EVM-664

TPS650231

1.2V / 1.6V

n/a

1.8V / 3.3V

See Table 3

See Table 3

 

 

 

 

 

 

 

Table 2. Default LDO Output Voltages TPS65023B

DEFLDO2

DEFLDO1

VLDO1

VLDO2

 

 

 

 

0

0

1.3 V

3.3 V

 

 

 

 

0

1

2.8 V

3.3 V

 

 

 

 

1

0

1.3 V

1.8 V

 

 

 

 

1

1

1.8 V

3.3 V

 

 

 

 

Table 3. Default LDO Output Voltages TPS650231

 

 

DEFLDO2

DEFLDO1

VLDO1

VLDO2

 

 

 

 

 

 

 

 

 

 

0

0

1.3 V

3.3 V

 

 

 

 

 

 

 

 

 

 

0

1

2.8 V

3.3 V

 

 

 

 

 

 

 

 

 

 

1

0

1.3 V

1.8 V

 

 

 

 

 

 

 

 

 

 

1

1

2.1 V

3.3 V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

TPS65023B/TPS650231EVM

 

 

SLVU394–October2010

 

 

 

 

 

Submit Documentation Feedback

Copyright © 2010, Texas Instruments Incorporated

www.ti.com

Input/Output Connector Description

3Input/Output Connector Description

This section describes the jumpers and connectors on the EVM, as well as how to properly connect, set up, and use the TPS65023B/TPS650231EVM-664.

J1 – VIN

Input voltage from external power supply, recommended maximum 5.5 V. Input current depends on load but typically is less than 2 A.

J2 – GND

This is the return connection for VIN.

J3 – VINLDO/GND

Input voltage and return for LDO1 and LDO2. Resistor R20 connects this pin to VIN. If an external power supply is used, remove R20. Recommended maximum input voltage is 5.5 V.

J4 – VSYSIN/GND

Input voltage and return for VSYSIN, one of the input voltages for RTC. Resistor R21 can be used to connect this input to VIN. If an external power supply is used, remove R21. Recommended maximum input voltage is 4 V.

J5 – VBACKUP/GND

Input voltage and return for VBACKUP, one of the input voltages for RTC. There are no onboard connections to a voltage input. Recommended maximum input voltage is 4 V.

J6 – VRTC/GND

Output voltage from RTC circuit.

J7 – Fault Outputs

Four fault outputs are available on this connector:

PWRFAIL – Fault occurs when input voltage is less than 3 V. Pulled up to VRTC when safe; low for fail.

INT – Fault occurs when a fail is on an input or output voltage; acts as a sum fail. Pulled up to VIN when safe; low for fail.

RESPWRON – Low reset signal is controlled by SW1, 144 ms. Pulled up to VIN normally.

LOWBAT – Fault occurs when input voltage is less than 3.6 V. Pulled up to VIN when safe; low for fail.

J8 – I2C

This header duplicates the I2C signals from the J20 interface connector. I2C data (SDA) and clock (SCL) can be accessed on this header

J9 – VDCDC1

Output from DCDC1 switching regulator maximum output current 1.7 A; default voltage setting is 3.3 V.

J10 – GND

Return for VDCDC1.

J11 – VDCDC2

Output from DCDC2 switching regulator; maximum output current 1.2 A.

J12 – GND

Return for VDCDC2

J13 – VLDO1

Output from low-dropoutregulator VLDO1; maximum output current 200 mA.

J14 – GND

Return for VLDO1

J15 – VLDO2

Output from low-dropoutregulator VLDO2; maximum output current 200 mA.

J16 – GND

Return for VLDO2.

SLVU394–October2010

TPS65023B/TPS650231EVM

3

Submit Documentation Feedback

 

 

Copyright © 2010, Texas Instruments Incorporated

Input/Output Connector Description

www.ti.com

J17 – VDCDC3

Output from switching regulator DCDC3; maximum output current 1 A.

J18– GND

Return for VDCDC3.

J19 –

J19 is the interface connector for the I2C interface. Connect a 10-pinribbon cable between J13 and theUSB-to-GPIOinterface.

JP1 – DEF1

Sets default voltage for DCDC1, 1.2 V or 1.6 V.

JP2 – DEF2

Sets default voltage for DCDC2, 3.3 V or 1.8 V, in TPS65023B (HPA664-001)configuration. In the TPS650231, no default output voltage options are available. In this case, the output voltage is adjustable with an external voltage divider R3, R2. The default setup is 1.2 V in the factory EVM(HPA664-002)configuration. See section x for advanced voltage scaling options..

JP3 – DEF3

Sets default voltage for DCDC3, 3.3 V or 1.8 V.

JP4 – DCDC1 ON/OFF

EN for DCDC1 converter; default setting is ON

JP5 – DCDC2 ON/OFF

EN for DCDC2 converter; default setting is ON.

JP6 – DCDC3 ON/OFF

EN for DCDC3 converter; default setting is ON.

JP7 – LDO ON/OFF

EN for both LDO1 and LDO2 regulators; default setting is ON.

JP8 – DEFLDO1

Sets default voltage for LDO1 and LDO2 in combination with DEFLDO2. (See Table 2 for TPS65023B andTable 3 for TPS650231 - defaults LDO output voltages.)

JP9 – DEFLDO2

Sets default voltage for LDO1 and LDO2 in combination with DEFLDO1. (See Table 2 for TPS65023B andTable 3 for TPS650231 - defaults LDO output voltages.)

S1 – HOT_RST

S1 is a normally open, momentary pushbutton switch that,when pressed, connects the HOT_RST input of the TPS650231 to GND, generating the HOT_RESET pulse. HOT_RESET pin is pulled up externally.

3.1Setup

The following steps must be followed before the EVM can be operated.

1.Install the TPS65023B/TPS650231EVM software.

2.Connect input voltages and loads to the EVM.

3.Configure all EVM jumpers to factory setting.

JP4–ON

JP1–1.6V

JP3–1.8V

JP2–1.8V

JP5–ON

JP6–ON

JP7–ON

JP9–High

JP8–High

4

TPS65023B/TPS650231EVM

SLVU394–October2010

 

 

Submit Documentation Feedback

Copyright © 2010, Texas Instruments Incorporated

www.ti.com

Input/Output Connector Description

4.Connect the ribbon cable between the EVM and the USB-TO-GPIO(HPA172) adapter.

5.Connect the USB cable between the computer and the HPA172EVM.

6.Turn on all supplies.

7.Run the TPS65023B/TPS650231EVM software

3.2Modifications

3.2.1Setting the Output Voltage

The TPS65023B features two default output voltages. These output voltages can be selected by pulling DEFDCDC2 high – selecting the higher default output voltage – or pulling DEFDCDC2 low – selecting the lower default output voltage.

In addition, the output voltage of DCDC2 can be externally adjusted with the resistor divider network R3 and R6. The default configuration of the TPS65023BEVM-664is that R3 and R6 are not assembled. The default output voltage of DCDC2 can be selected with JP2.

Note that the default output voltage is selected once at startup of the device. Changing logic level of DEFDCDC2 during operation does not affect the output voltage and is not allowed.

3.2.2Setting the Output Voltage for DCDC2, TPS650231

The TPS650231 does not feature these default output voltages. The output voltages of DCDC2 is externally adjustable only. The default configuration of the TPS650231EVM-664is that R3 and R6 are not assembled. JP2 is not assembled.

TPS650231 does not have the default output voltage feature, and this provides the benefit of external voltage scaling options.

3.2.3Simple Two-PointVoltage Scaling, TPS650231

DCDC2 does not have the previously described preset default output voltages. An external voltage scaling circuit is on the EVM, and the output voltage of DCDC2 can be switched between two preset voltages. This useful feature reduces the power consumption of an application processor in Low Power mode.

The voltage scaling circuit consists of JP2,Q1, R3, R6, and R24. The circuit uses a transistor (Q1) to connect a resistor (R24) in parallel to the lower resistor of the feedback network (R6) of DCDC2.

Modifying the resistor network by paralleling R24 and R6 reduces the overall resistance of the lower resistor and therefore increases the output voltage of the DC/DC converter. See Equation 1 andEquation 2 to design R24. In the factory configuration, the components JP2, Q1, and R24 are not assembled on the board.

3.2.4Scaling the Output Voltage of DCDC2 From LDO2

Another approach to scale the DC/DC converter output voltage is to use an external adjustable voltage. Any external adjustable voltage source can be used, e.g., output voltage of an digital-to-analogconverter. In the TPS65023B/TPS650231, LDO1 and LDO2 can be adjusted via I2C. The TPS65023B/TPS650231 provides the ability to feed the output voltage of LDO2 back to the resistor divider network, using R25, and therefore scale the output voltage of DCDC2 based on the LDO2 output voltage.

In this configuration, R25, R3, and R6 need to be assembled. R24, R26, Q1, and R3 need to be removed.

VOUT _ DCDC2 = V _ REF × (1 +R1 )) + (V _ REF − VLDO2) × (R1 )

R2

R3

(1)

From Equation 2 it can be seen that maximum DCDC1 output voltage occurs for minimum VLDO2, and minimum DCDC1 output voltage occurs for maximum VLDO2.

To ensure that the desired DCDC1 output voltages can be adjusted, design the resistors R25, R3, and R6 according to and Equation 2 andEquation 2.

SLVU394–October2010

TPS65023B/TPS650231EVM

5

Submit Documentation Feedback

 

 

Copyright © 2010, Texas Instruments Incorporated

Board Layout www.ti.com

VOUT _ DCDC2,MIN = V _ REF × (1 +R1 )) + (V _ REF − VLDO2,MAX) × (R1 )

R2

R3

 

 

(2)

VOUT _ DCDC2,MAX = V _ REF × (1 +

R1

)) + (V _ REF − VLDO2,MIN) × (

R1

)

 

 

 

R2

 

R3

 

 

(3)

The most straight forward way is to choose a value for R6 according to the recommendations in the converter data sheet.

4Board Layout

This section provides the TPS65023B/TPS650231EVM-664board layout and illustrations.

4.1Layout

Board layout is critical for all switch mode power supplies. Figure 1 throughFigure 5 show the board layout for theTPS65023B/TPS650231EVM-664PCB. The nodes with high switching frequencies and currents are short and are isolated from thenoise-sensitivefeedback circuitry. Careful attention has been given to the routing ofhigh-frequencycurrent loops. See the data sheet for specific layout guidelines.

Figure 1. Assembly Layer

6

TPS65023B/TPS650231EVM

SLVU394–October2010

 

 

Submit Documentation Feedback

Copyright © 2010, Texas Instruments Incorporated

www.ti.com

Board Layout

Figure 2. Top Layer Routing

SLVU394–October2010

TPS65023B/TPS650231EVM

7

Submit Documentation Feedback

 

 

Copyright © 2010, Texas Instruments Incorporated

Board Layout

www.ti.com

Figure 3. Layer-2Routing, GND Plane

8

TPS65023B/TPS650231EVM

SLVU394–October2010

 

 

Submit Documentation Feedback

Copyright © 2010, Texas Instruments Incorporated

www.ti.com

Board Layout

Figure 4. Layer-3Routing, Vin Plane

SLVU394–October2010

TPS65023B/TPS650231EVM

9

Submit Documentation Feedback

 

 

Copyright © 2010, Texas Instruments Incorporated

Board Layout

www.ti.com

Figure 5. Bottom Layer Routing

10

TPS65023B/TPS650231EVM

SLVU394–October2010

 

 

Submit Documentation Feedback

Copyright © 2010, Texas Instruments Incorporated